[v1] RISC-V Spike machine improvements

[PATCH 0/3] RISC-V Spike machine improvements

Anup Patel posted 3 patches 4 years, 2 months ago

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hw/riscv/boot.c         | 13 ++++++++-----
hw/riscv/sifive_u.c     |  2 +-
hw/riscv/spike.c        | 26 ++++++++++++++++++++++++--
hw/riscv/virt.c         |  2 +-
include/hw/riscv/boot.h |  6 ++++--
5 files changed, 38 insertions(+), 11 deletions(-)

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[PATCH 0/3] RISC-V Spike machine improvements

Posted by Anup Patel 4 years, 2 months ago

This series improves QEMU Spike machine to:
1. Allow loading OpenBI firmware using -bios option
2. Allow more than one CPUs

Anup Patel (3):
  hw/riscv: Add optional symbol callback ptr to riscv_load_firmware()
  hw/riscv/spike: Allow loading firmware separately using -bios option
  hw/riscv/spike: Allow more than one CPUs

 hw/riscv/boot.c         | 13 ++++++++-----
 hw/riscv/sifive_u.c     |  2 +-
 hw/riscv/spike.c        | 26 ++++++++++++++++++++++++--
 hw/riscv/virt.c         |  2 +-
 include/hw/riscv/boot.h |  6 ++++--
 5 files changed, 38 insertions(+), 11 deletions(-)

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2.17.1