One last arm pullreq before I stop work for the end of the year...

The following changes since commit 8e5943260a8f765216674ee87ce8588cc4e7463e:

Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging (2019-12-20 12:46:10 +0000)

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20191220

for you to fetch changes up to c8fa6079eb35888587f1be27c1590da4edcc5098:

arm/arm-powerctl: rebuild hflags after setting CP15 bits in arm_set_cpu_on() (2019-12-20 14:03:00 +0000)

* Support emulating the generic timers at frequencies other than 62.5MHz

* Various fixes for SMMUv3 emulation bugs

* Improve assert error message for hflags mismatches

* arm-powerctl: rebuild hflags after setting CP15 bits in arm_set_cpu_on()

Andrew Jeffery (4):

target/arm: Remove redundant scaling of nexttick

target/arm: Abstract the generic timer frequency

target/arm: Prepare generic timer for per-platform CNTFRQ

ast2600: Configure CNTFRQ at 1125MHz

Niek Linnenbank (1):

arm/arm-powerctl: rebuild hflags after setting CP15 bits in arm_set_cpu_on()

Philippe Mathieu-Daudé (1):

target/arm: Display helpful message when hflags mismatch

Simon Veith (6):

hw/arm/smmuv3: Apply address mask to linear strtab base address

hw/arm/smmuv3: Correct SMMU_BASE_ADDR_MASK value

hw/arm/smmuv3: Check stream IDs against actual table LOG2SIZE

hw/arm/smmuv3: Align stream table base address to table size

hw/arm/smmuv3: Use correct bit positions in EVT_SET_ADDR2 macro

hw/arm/smmuv3: Report F_STE_FETCH fault address in correct word position

hw/arm/smmuv3-internal.h | 6 ++---

target/arm/cpu.h | 5 ++++

hw/arm/aspeed_ast2600.c | 3 +++

hw/arm/smmuv3.c | 28 +++++++++++++++-----

target/arm/arm-powerctl.c | 3 +++

target/arm/cpu.c | 65 +++++++++++++++++++++++++++++++++++++++++------

target/arm/helper.c | 42 +++++++++++++++++++++++-------

7 files changed, 125 insertions(+), 27 deletions(-)

From: Philippe Mathieu-Daudé <philmd@redhat.com>

Instead of crashing in a confuse way, give some hint to the user

about why we aborted. He might report the issue without having

to use a debugger.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Message-id: 20191209134552.27733-1-philmd@redhat.com

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Tested-by: Niek Linnenbank <nieklinnenbank@gmail.com>

target/arm/helper.c | 18 +++++++++++++++---

1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c

--- a/target/arm/helper.c

+++ b/target/arm/helper.c

@@ -XXX,XX +XXX,XX @@ void HELPER(rebuild_hflags_a64)(CPUARMState *env, int el)

env->hflags = rebuild_hflags_a64(env, el, fp_el, mmu_idx);

+static inline void assert_hflags_rebuild_correctly(CPUARMState *env)

+#ifdef CONFIG_DEBUG_TCG

+ uint32_t env_flags_current = env->hflags;

+ uint32_t env_flags_rebuilt = rebuild_hflags_internal(env);

+ if (unlikely(env_flags_current != env_flags_rebuilt)) {

+ fprintf(stderr, "TCG hflags mismatch (current:0x%08x rebuilt:0x%08x)\n",

+ env_flags_current, env_flags_rebuilt);

+ abort();

void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,

target_ulong *cs_base, uint32_t *pflags)

@@ -XXX,XX +XXX,XX @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,

uint32_t pstate_for_ss;

*cs_base = 0;

-#ifdef CONFIG_DEBUG_TCG

- assert(flags == rebuild_hflags_internal(env));

-#endif

+ assert_hflags_rebuild_correctly(env);

if (FIELD_EX32(flags, TBFLAG_ANY, AARCH64_STATE)) {

*pc = env->pc;

2.20.1

From: Andrew Jeffery <andrew@aj.id.au>

Prepare for SoCs such as the ASPEED AST2600 whose firmware configures

CNTFRQ to values significantly larger than the static 62.5MHz value

currently derived from GTIMER_SCALE. As the OS potentially derives its

timer periods from the CNTFRQ value the lack of support for running

QEMUTimers at the appropriate rate leads to sticky behaviour in the

guest.

Substitute the GTIMER_SCALE constant with use of a helper to derive the

period from gt_cntfrq_hz stored in struct ARMCPU. Initially set

gt_cntfrq_hz to the frequency associated with GTIMER_SCALE so current

behaviour is maintained.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Message-id: 40bd8df043f66e1ccfb3e9482999d099ac72bb2e.1576215453.git-series.andrew@aj.id.au

target/arm/cpu.h | 5 +++++

target/arm/cpu.c | 8 ++++++++

target/arm/helper.c | 10 +++++++---

3 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/target/arm/cpu.h b/target/arm/cpu.h

--- a/target/arm/cpu.h

+++ b/target/arm/cpu.h

@@ -XXX,XX +XXX,XX @@ struct ARMCPU {

*/

DECLARE_BITMAP(sve_vq_map, ARM_MAX_VQ);

DECLARE_BITMAP(sve_vq_init, ARM_MAX_VQ);

+ /* Generic timer counter frequency, in Hz */

+ uint64_t gt_cntfrq_hz;

};

+unsigned int gt_cntfrq_period_ns(ARMCPU *cpu);

void arm_cpu_post_init(Object *obj);

uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz);

diff --git a/target/arm/cpu.c b/target/arm/cpu.c

--- a/target/arm/cpu.c

+++ b/target/arm/cpu.c

@@ -XXX,XX +XXX,XX @@ static void arm_cpu_initfn(Object *obj)

if (tcg_enabled()) {

cpu->psci_version = 2; /* TCG implements PSCI 0.2 */

+ cpu->gt_cntfrq_hz = NANOSECONDS_PER_SECOND / GTIMER_SCALE;

}

static Property arm_cpu_reset_cbar_property =

@@ -XXX,XX +XXX,XX @@ static void arm_set_init_svtor(Object *obj, Visitor *v, const char *name,

visit_type_uint32(v, name, &cpu->init_svtor, errp);

}

+unsigned int gt_cntfrq_period_ns(ARMCPU *cpu)

+{

+ return NANOSECONDS_PER_SECOND > cpu->gt_cntfrq_hz ?

+ NANOSECONDS_PER_SECOND / cpu->gt_cntfrq_hz : 1;

void arm_cpu_post_init(Object *obj)

ARMCPU *cpu = ARM_CPU(obj);

diff --git a/target/arm/helper.c b/target/arm/helper.c

index XXXXXXX..XXXXXXX 100644

--- a/target/arm/helper.c

+++ b/target/arm/helper.c

@@ -XXX,XX +XXX,XX @@ static CPAccessResult gt_stimer_access(CPUARMState *env,

static uint64_t gt_get_countervalue(CPUARMState *env)

{

- return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / GTIMER_SCALE;

+ ARMCPU *cpu = env_archcpu(env);

+

+ return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / gt_cntfrq_period_ns(cpu);

static void gt_recalc_timer(ARMCPU *cpu, int timeridx)

@@ -XXX,XX +XXX,XX @@ static void gt_recalc_timer(ARMCPU *cpu, int timeridx)

* set the timer for as far in the future as possible. When the

* timer expires we will reset the timer for any remaining period.

*/

- if (nexttick > INT64_MAX / GTIMER_SCALE) {

+ if (nexttick > INT64_MAX / gt_cntfrq_period_ns(cpu)) {

timer_mod_ns(cpu->gt_timer[timeridx], INT64_MAX);

} else {

timer_mod(cpu->gt_timer[timeridx], nexttick);

@@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = {

static uint64_t gt_virt_cnt_read(CPUARMState *env, const ARMCPRegInfo *ri)

{

+ ARMCPU *cpu = env_archcpu(env);

+

/* Currently we have no support for QEMUTimer in linux-user so we

* can't call gt_get_countervalue(env), instead we directly

* call the lower level functions.

*/

- return cpu_get_clock() / GTIMER_SCALE;

+ return cpu_get_clock() / gt_cntfrq_period_ns(cpu);

static const ARMCPRegInfo generic_timer_cp_reginfo[] = {

2.20.1