[Qemu-devel] [PATCH v2 0/4] add Homer/OCC common area emulation for PowerNV

Balamuruhan S posted 4 patches 1 week ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20190911142925.19197-1-bala24@linux.ibm.com
Maintainers: "Cédric Le Goater" <clg@kaod.org>, David Gibson <david@gibson.dropbear.id.au>
hw/ppc/Makefile.objs       |   1 +
hw/ppc/pnv.c               |  87 ++++++++++++---
hw/ppc/pnv_homer.c         | 269 +++++++++++++++++++++++++++++++++++++++++++++
hw/ppc/pnv_occ.c           |  78 +++++++++++++
hw/ppc/pnv_xscom.c         |  34 +++++-
include/hw/ppc/pnv.h       |  21 ++++
include/hw/ppc/pnv_homer.h |  53 +++++++++
include/hw/ppc/pnv_occ.h   |   3 +
8 files changed, 525 insertions(+), 21 deletions(-)
create mode 100644 hw/ppc/pnv_homer.c
create mode 100644 include/hw/ppc/pnv_homer.h

[Qemu-devel] [PATCH v2 0/4] add Homer/OCC common area emulation for PowerNV

Posted by Balamuruhan S 1 week ago
Hi All,

This is follow-up patch that implements HOMER and OCC SRAM device
models to emulate homer memory and occ common area access for pstate
table, occ sensors, runtime data and slw.

Currently skiboot disables the homer/occ code path with `QUIRK_NO_PBA`,
this quirk have to be removed in skiboot for it to use HOMER and OCC
SRAM device models along with a bug fix,

https://github.com/balamuruhans/skiboot/commit/a655514d2a730e0372a2faee277d1cf01f71a524
https://github.com/balamuruhans/skiboot/commit/fd3d93d92ec66a7494346d6d24ced7b48264c9a0

This version fixes review comments from Cedric and David in previous
version,

changes in v2:
    * change to PnvHomer/PnvHomerClass instead of PnvHOMER/PnvHOMERClass
      for better code readabililty.
    * fabric link to chip to use `nr_cores` from PnvChip struct for
      core_max_array() as we need to consider active cores in chip and not
      whole machine.
    * declare variable well ahead instead in for() loop syntax to make
      all compilers happy.
    * change to shorter variable name to `hmrc` instead of `homer_class`.
    * remove `homer_` prefix for regs as it is not useful.
    * have separate commit for checkpatch.pl coding style warnings.

v1 patchset:
https://lists.gnu.org/archive/html/qemu-devel/2019-09/msg01610.html

changes in v1:
    * breaks it to have separate patch series for Homer and OCC
      emulation.
    * reuse PnvOCC device model to implement SRAM device.
    * implement PnvHomer as separate device model.
    * have core max base address as part of PnvHOMERClass.
    * reuse PNV_CHIP_INDEX() instead of introducing new `chip_num`.
    * define all the memory ops access address as macros.
    * few coding style warnings given by checkpatch.pl.

rfc patchset: 
https://lists.gnu.org/archive/html/qemu-devel/2019-08/msg00979.html

I request for review, comments and suggestions for the changes.

Balamuruhan S (4):
  hw/ppc/pnv_xscom: retrieve homer/occ base address from PBA BARs
  hw/ppc/pnv_occ: add sram device model for occ common area
  hw/ppc/pnv_homer: add PowerNV homer device model
  hw/ppc/pnv: fix checkpatch.pl coding style warnings

 hw/ppc/Makefile.objs       |   1 +
 hw/ppc/pnv.c               |  87 ++++++++++++---
 hw/ppc/pnv_homer.c         | 269 +++++++++++++++++++++++++++++++++++++++++++++
 hw/ppc/pnv_occ.c           |  78 +++++++++++++
 hw/ppc/pnv_xscom.c         |  34 +++++-
 include/hw/ppc/pnv.h       |  21 ++++
 include/hw/ppc/pnv_homer.h |  53 +++++++++
 include/hw/ppc/pnv_occ.h   |   3 +
 8 files changed, 525 insertions(+), 21 deletions(-)
 create mode 100644 hw/ppc/pnv_homer.c
 create mode 100644 include/hw/ppc/pnv_homer.h

-- 
2.14.5