[Qemu-devel] [PATCH v4 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState

Richard Henderson posted 39 patches 4 years, 11 months ago
Test s390x passed
Test checkpatch failed
Test asan passed
Test docker-mingw@fedora passed
Test docker-clang@ubuntu passed
Test FreeBSD passed
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20190604203351.27778-1-richard.henderson@linaro.org
Maintainers: Anthony Green <green@moxielogic.com>, Chris Wulff <crwulff@gmail.com>, Sagar Karandikar <sagark@eecs.berkeley.edu>, Aleksandar Markovic <amarkovic@wavecomp.com>, Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, "Michael S. Tsirkin" <mst@redhat.com>, Cornelia Huck <cohuck@redhat.com>, Marcel Apfelbaum <marcel.apfelbaum@gmail.com>, Laurent Vivier <laurent@vivier.eu>, Aurelien Jarno <aurelien@aurel32.net>, Stefan Hajnoczi <stefanha@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>, Christian Borntraeger <borntraeger@de.ibm.com>, Peter Maydell <peter.maydell@linaro.org>, Riku Voipio <riku.voipio@iki.fi>, Eduardo Habkost <ehabkost@redhat.com>, "Alex Bennée" <alex.bennee@linaro.org>, Artyom Tarasenko <atar4qemu@gmail.com>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, Alistair Francis <Alistair.Francis@wdc.com>, Max Filippov <jcmvbkbc@gmail.com>, Claudio Fontana <claudio.fontana@huawei.com>, David Gibson <david@gibson.dropbear.id.au>, Aleksandar Rikalo <arikalo@wavecomp.com>, Andrzej Zaborowski <balrogg@gmail.com>, Michael Walle <michael@walle.cc>, Stafford Horne <shorne@gmail.com>, Palmer Dabbelt <palmer@sifive.com>, Halil Pasic <pasic@linux.ibm.com>, David Hildenbrand <david@redhat.com>, Bastian Koppelmann <kbastian@mail.uni-paderborn.de>, Guan Xuetao <gxt@mprc.pku.edu.cn>, Richard Henderson <rth@twiddle.net>, Marek Vasut <marex@denx.de>
accel/tcg/atomic_template.h               |   8 +-
include/exec/cpu-all.h                    |  58 ++
include/exec/cpu-defs.h                   | 113 ++-
include/exec/cpu_ldst.h                   |   6 +-
include/exec/cpu_ldst_template.h          |   6 +-
include/exec/cpu_ldst_useronly_template.h |   6 +-
include/exec/gen-icount.h                 |  14 +-
include/exec/softmmu-semi.h               |  16 +-
include/qom/cpu.h                         |  40 +-
linux-user/cpu_loop-common.h              |   2 +-
linux-user/m68k/target_cpu.h              |   2 +-
target/alpha/cpu-param.h                  |  31 +
target/alpha/cpu.h                        |  40 +-
target/arm/cpu-param.h                    |  34 +
target/arm/cpu.h                          |  52 +-
target/cris/cpu-param.h                   |  17 +
target/cris/cpu.h                         |  25 +-
target/hppa/cpu-param.h                   |  34 +
target/hppa/cpu.h                         |  38 +-
target/i386/cpu-param.h                   |  28 +
target/i386/cpu.h                         |  40 +-
target/lm32/cpu-param.h                   |  17 +
target/lm32/cpu.h                         |  25 +-
target/m68k/cpu-param.h                   |  22 +
target/m68k/cpu.h                         |  28 +-
target/microblaze/cpu-param.h             |  18 +
target/microblaze/cpu.h                   |  63 +-
target/mips/cpu-param.h                   |  29 +
target/mips/cpu.h                         |  21 +-
target/mips/mips-defs.h                   |  15 -
target/moxie/cpu-param.h                  |  17 +
target/moxie/cpu.h                        |  29 +-
target/nios2/cpu-param.h                  |  21 +
target/nios2/cpu.h                        |  33 +-
target/openrisc/cpu-param.h               |  17 +
target/openrisc/cpu.h                     |  31 +-
target/ppc/cpu-param.h                    |  37 +
target/ppc/cpu.h                          |  61 +-
target/ppc/helper_regs.h                  |   4 +-
target/riscv/cpu-param.h                  |  23 +
target/riscv/cpu.h                        |  34 +-
target/s390x/cpu-param.h                  |  17 +
target/s390x/cpu.h                        |  31 +-
target/sh4/cpu-param.h                    |  21 +
target/sh4/cpu.h                          |  30 +-
target/sparc/cpu-param.h                  |  28 +
target/sparc/cpu.h                        |  36 +-
target/tilegx/cpu-param.h                 |  17 +
target/tilegx/cpu.h                       |  23 +-
target/tricore/cpu-param.h                |  17 +
target/tricore/cpu.h                      |  22 +-
target/tricore/tricore-defs.h             |   5 -
target/unicore32/cpu-param.h              |  17 +
target/unicore32/cpu.h                    |  24 +-
target/xtensa/cpu-param.h                 |  21 +
target/xtensa/cpu.h                       |  40 +-
accel/tcg/cpu-exec.c                      |  23 +-
accel/tcg/cputlb.c                        | 226 +++---
accel/tcg/tcg-all.c                       |   6 +-
accel/tcg/tcg-runtime.c                   |   4 +-
accel/tcg/translate-all.c                 |  10 +-
accel/tcg/user-exec.c                     |   2 +-
bsd-user/main.c                           |   5 +-
bsd-user/syscall.c                        |   6 +-
cpus.c                                    |   9 +-
hw/i386/kvmvapic.c                        |   4 +-
hw/i386/pc.c                              |   2 +-
hw/intc/mips_gic.c                        |   2 +-
hw/mips/mips_int.c                        |   2 +-
hw/nios2/cpu_pic.c                        |   5 +-
hw/ppc/ppc.c                              |  18 +-
hw/ppc/ppc405_uc.c                        |   2 +-
hw/ppc/ppc_booke.c                        |   4 +-
hw/semihosting/console.c                  |   2 +-
hw/sparc/leon3.c                          |   4 +-
hw/sparc/sun4m.c                          |   4 +-
hw/sparc64/sparc64.c                      |   2 +-
hw/unicore32/puv3.c                       |   2 +-
hw/xtensa/pic_cpu.c                       |   2 +-
linux-user/aarch64/cpu_loop.c             |   6 +-
linux-user/aarch64/signal.c               |   4 +-
linux-user/alpha/cpu_loop.c               |   2 +-
linux-user/arm/cpu_loop.c                 |   4 +-
linux-user/cris/cpu_loop.c                |   4 +-
linux-user/elfload.c                      |   6 +-
linux-user/hppa/cpu_loop.c                |   2 +-
linux-user/i386/cpu_loop.c                |   2 +-
linux-user/i386/signal.c                  |   2 +-
linux-user/m68k-sim.c                     |   3 +-
linux-user/m68k/cpu_loop.c                |   4 +-
linux-user/main.c                         |   2 +-
linux-user/microblaze/cpu_loop.c          |   2 +-
linux-user/mips/cpu_loop.c                |   4 +-
linux-user/nios2/cpu_loop.c               |   2 +-
linux-user/openrisc/cpu_loop.c            |   2 +-
linux-user/ppc/cpu_loop.c                 |   2 +-
linux-user/riscv/cpu_loop.c               |   4 +-
linux-user/s390x/cpu_loop.c               |   2 +-
linux-user/sh4/cpu_loop.c                 |   2 +-
linux-user/signal.c                       |   8 +-
linux-user/sparc/cpu_loop.c               |   2 +-
linux-user/syscall.c                      |  26 +-
linux-user/tilegx/cpu_loop.c              |   2 +-
linux-user/uname.c                        |   2 +-
linux-user/vm86.c                         |  18 +-
linux-user/xtensa/cpu_loop.c              |   2 +-
qom/cpu.c                                 |   4 +-
target/alpha/cpu.c                        |   3 +-
target/alpha/helper.c                     |   8 +-
target/alpha/sys_helper.c                 |   8 +-
target/arm/arm-semi.c                     |   4 +-
target/arm/cpu.c                          |   3 +-
target/arm/cpu64.c                        |   2 +-
target/arm/helper-a64.c                   |   4 +-
target/arm/helper.c                       | 162 ++---
target/arm/op_helper.c                    |  21 +-
target/arm/translate-a64.c                |   4 +-
target/arm/translate.c                    |   2 +-
target/arm/vfp_helper.c                   |   2 +-
target/cris/cpu.c                         |   3 +-
target/cris/mmu.c                         | 482 +++++++------
target/cris/op_helper.c                   | 827 +++++++++++-----------
target/cris/translate.c                   |   2 +-
target/hppa/cpu.c                         |   2 +-
target/hppa/helper.c                      |   3 +-
target/hppa/int_helper.c                  |   4 +-
target/hppa/mem_helper.c                  |  10 +-
target/hppa/op_helper.c                   |  10 +-
target/i386/bpt_helper.c                  |   4 +-
target/i386/cpu.c                         |   7 +-
target/i386/excp_helper.c                 |   2 +-
target/i386/fpu_helper.c                  |   2 +-
target/i386/hax-all.c                     |   6 +-
target/i386/helper.c                      |  16 +-
target/i386/hvf/x86_decode.c              |  22 +-
target/i386/hvf/x86_emu.c                 |  60 +-
target/i386/mem_helper.c                  |   4 +-
target/i386/misc_helper.c                 |  24 +-
target/i386/seg_helper.c                  |  14 +-
target/i386/smm_helper.c                  |   4 +-
target/i386/svm_helper.c                  |  22 +-
target/lm32/cpu.c                         |   3 +-
target/lm32/helper.c                      |  19 +-
target/lm32/op_helper.c                   |   6 +-
target/lm32/translate.c                   |   2 +-
target/m68k/cpu.c                         |   4 +-
target/m68k/helper.c                      |  33 +-
target/m68k/m68k-semi.c                   |   4 +-
target/m68k/op_helper.c                   |  14 +-
target/m68k/translate.c                   |   4 +-
target/microblaze/cpu.c                   |   3 +-
target/microblaze/mmu.c                   |   5 +-
target/microblaze/op_helper.c             |   2 +-
target/microblaze/translate.c             |   2 +-
target/mips/cpu.c                         |   3 +-
target/mips/helper.c                      |  15 +-
target/mips/op_helper.c                   |  25 +-
target/mips/translate.c                   |   3 +-
target/mips/translate_init.inc.c          |   4 +-
target/moxie/cpu.c                        |   3 +-
target/moxie/helper.c                     |   4 +-
target/moxie/translate.c                  |   2 +-
target/nios2/cpu.c                        |   6 +-
target/nios2/mmu.c                        |  14 +-
target/nios2/op_helper.c                  |   2 +-
target/openrisc/cpu.c                     |   3 +-
target/openrisc/exception_helper.c        |   5 +-
target/openrisc/sys_helper.c              |   8 +-
target/ppc/excp_helper.c                  |  14 +-
target/ppc/fpu_helper.c                   |  14 +-
target/ppc/kvm.c                          |   5 +-
target/ppc/misc_helper.c                  |  22 +-
target/ppc/mmu-hash64.c                   |  14 +-
target/ppc/mmu_helper.c                   | 117 ++-
target/ppc/translate_init.inc.c           |  88 ++-
target/riscv/cpu.c                        |   3 +-
target/riscv/cpu_helper.c                 |  10 +-
target/riscv/csr.c                        |  12 +-
target/riscv/op_helper.c                  |   7 +-
target/s390x/cc_helper.c                  |   5 +-
target/s390x/cpu.c                        |   9 +-
target/s390x/diag.c                       |   2 +-
target/s390x/excp_helper.c                |   6 +-
target/s390x/fpu_helper.c                 |   4 +-
target/s390x/gdbstub.c                    |  24 +-
target/s390x/helper.c                     |   7 +-
target/s390x/int_helper.c                 |   3 +-
target/s390x/interrupt.c                  |   6 +-
target/s390x/mem_helper.c                 |  30 +-
target/s390x/misc_helper.c                |  50 +-
target/s390x/mmu_helper.c                 |   8 +-
target/s390x/sigp.c                       |   4 +-
target/sh4/cpu.c                          |   3 +-
target/sh4/helper.c                       |  26 +-
target/sh4/op_helper.c                    |  11 +-
target/sparc/cpu.c                        |   3 +-
target/sparc/fop_helper.c                 |   2 +-
target/sparc/helper.c                     |   8 +-
target/sparc/ldst_helper.c                |  33 +-
target/sparc/mmu_helper.c                 |  10 +-
target/tilegx/cpu.c                       |   4 +-
target/tilegx/helper.c                    |   2 +-
target/tricore/cpu.c                      |   4 +-
target/tricore/op_helper.c                |   2 +-
target/unicore32/cpu.c                    |   3 +-
target/unicore32/helper.c                 |   4 +-
target/unicore32/op_helper.c              |   2 +-
target/unicore32/softmmu.c                |  11 +-
target/unicore32/translate.c              |  26 +-
target/unicore32/ucf64_helper.c           |   2 +-
target/xtensa/cpu.c                       |   3 +-
target/xtensa/dbg_helper.c                |   4 +-
target/xtensa/exc_helper.c                |   9 +-
target/xtensa/helper.c                    |   2 +-
target/xtensa/mmu_helper.c                |  17 +-
target/xtensa/xtensa-semi.c               |   2 +-
tcg/aarch64/tcg-target.inc.c              |  40 +-
tcg/arm/tcg-target.inc.c                  | 149 ++--
tcg/i386/tcg-target.inc.c                 |   6 +-
tcg/mips/tcg-target.inc.c                 |  45 +-
tcg/ppc/tcg-target.inc.c                  |  32 +-
tcg/riscv/tcg-target.inc.c                |  37 +-
tcg/s390/tcg-target.inc.c                 |  13 +-
tcg/sparc/tcg-target.inc.c                |  40 +-
docs/devel/tracing.txt                    |   4 +-
scripts/tracetool/format/tcg_helper_c.py  |   2 +-
226 files changed, 2379 insertions(+), 2572 deletions(-)
create mode 100644 target/alpha/cpu-param.h
create mode 100644 target/arm/cpu-param.h
create mode 100644 target/cris/cpu-param.h
create mode 100644 target/hppa/cpu-param.h
create mode 100644 target/i386/cpu-param.h
create mode 100644 target/lm32/cpu-param.h
create mode 100644 target/m68k/cpu-param.h
create mode 100644 target/microblaze/cpu-param.h
create mode 100644 target/mips/cpu-param.h
create mode 100644 target/moxie/cpu-param.h
create mode 100644 target/nios2/cpu-param.h
create mode 100644 target/openrisc/cpu-param.h
create mode 100644 target/ppc/cpu-param.h
create mode 100644 target/riscv/cpu-param.h
create mode 100644 target/s390x/cpu-param.h
create mode 100644 target/sh4/cpu-param.h
create mode 100644 target/sparc/cpu-param.h
create mode 100644 target/tilegx/cpu-param.h
create mode 100644 target/tricore/cpu-param.h
create mode 100644 target/unicore32/cpu-param.h
create mode 100644 target/xtensa/cpu-param.h
[Qemu-devel] [PATCH v4 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState
Posted by Richard Henderson 4 years, 11 months ago
Patches missing review/ack:
0038-tcg-arm-Use-LDRD-to-load-tlb-mask-table.patch

Changes from v3->v4:
  * Rebase to master, fixing a few conflicts.
  * Reword and replicate commit messages.

Changes from v2->v3:
  * Incorporate review from pm215:
    include guards and copyright/license for new headers;
    qemu_build_bug_on for tcg/{arm,aarch64}/ load-pair expectations;
    split out an independant tlb change in tcg/arm/;
    split out some re-indent patches for target/cris/.

Changes from v1->v2:
  * Add cpu_set_cpustate_pointers.
  * Add icount_decr_ptr to CPUState.

Blurb from v1:

This started merely as an attempt to reduce the size of each
softmmu lookup by using smaller offsets from env.  But in the
end it also represents a significant cleanup in the boilerplate
that each target must define.

With respect to the initial goal, here are the relevant code
snips generated for loading the mask & table fields for a
qemu_ld from an aarch64 guest on the indicated host.


r~


Richard Henderson (39):
  tcg: Fold CPUTLBWindow into CPUTLBDesc
  tcg: Split out target/arch/cpu-param.h
  tcg: Create struct CPUTLB
  cpu: Define CPUArchState with typedef
  cpu: Define ArchCPU
  cpu: Replace ENV_GET_CPU with env_cpu
  cpu: Introduce env_archcpu
  target/alpha: Use env_cpu, env_archcpu
  target/arm: Use env_cpu, env_archcpu
  target/cris: Reindent mmu.c
  target/cris: Reindent op_helper.c
  target/cris: Use env_cpu, env_archcpu
  target/hppa: Use env_cpu, env_archcpu
  target/i386: Use env_cpu, env_archcpu
  target/lm32: Use env_cpu, env_archcpu
  target/m68k: Use env_cpu, env_archcpu
  target/microblaze: Use env_cpu, env_archcpu
  target/mips: Use env_cpu, env_archcpu
  target/moxie: Use env_cpu, env_archcpu
  target/nios2: Use env_cpu, env_archcpu
  target/openrisc: Use env_cpu, env_archcpu
  target/ppc: Use env_cpu, env_archcpu
  target/riscv: Use env_cpu, env_archcpu
  target/s390x: Use env_cpu, env_archcpu
  target/sh4: Use env_cpu, env_archcpu
  target/sparc: Use env_cpu, env_archcpu
  target/tilegx: Use env_cpu
  target/tricore: Use env_cpu
  target/unicore32: Use env_cpu, env_archcpu
  target/xtensa: Use env_cpu, env_archcpu
  cpu: Move ENV_OFFSET to exec/gen-icount.h
  cpu: Introduce cpu_set_cpustate_pointers
  cpu: Introduce CPUNegativeOffsetState
  cpu: Move icount_decr to CPUNegativeOffsetState
  cpu: Move the softmmu tlb to CPUNegativeOffsetState
  cpu: Remove CPU_COMMON
  tcg/aarch64: Use LDP to load tlb mask+table
  tcg/arm: Use LDRD to load tlb mask+table
  tcg/arm: Remove mostly unreachable tlb special case

 accel/tcg/atomic_template.h               |   8 +-
 include/exec/cpu-all.h                    |  58 ++
 include/exec/cpu-defs.h                   | 113 ++-
 include/exec/cpu_ldst.h                   |   6 +-
 include/exec/cpu_ldst_template.h          |   6 +-
 include/exec/cpu_ldst_useronly_template.h |   6 +-
 include/exec/gen-icount.h                 |  14 +-
 include/exec/softmmu-semi.h               |  16 +-
 include/qom/cpu.h                         |  40 +-
 linux-user/cpu_loop-common.h              |   2 +-
 linux-user/m68k/target_cpu.h              |   2 +-
 target/alpha/cpu-param.h                  |  31 +
 target/alpha/cpu.h                        |  40 +-
 target/arm/cpu-param.h                    |  34 +
 target/arm/cpu.h                          |  52 +-
 target/cris/cpu-param.h                   |  17 +
 target/cris/cpu.h                         |  25 +-
 target/hppa/cpu-param.h                   |  34 +
 target/hppa/cpu.h                         |  38 +-
 target/i386/cpu-param.h                   |  28 +
 target/i386/cpu.h                         |  40 +-
 target/lm32/cpu-param.h                   |  17 +
 target/lm32/cpu.h                         |  25 +-
 target/m68k/cpu-param.h                   |  22 +
 target/m68k/cpu.h                         |  28 +-
 target/microblaze/cpu-param.h             |  18 +
 target/microblaze/cpu.h                   |  63 +-
 target/mips/cpu-param.h                   |  29 +
 target/mips/cpu.h                         |  21 +-
 target/mips/mips-defs.h                   |  15 -
 target/moxie/cpu-param.h                  |  17 +
 target/moxie/cpu.h                        |  29 +-
 target/nios2/cpu-param.h                  |  21 +
 target/nios2/cpu.h                        |  33 +-
 target/openrisc/cpu-param.h               |  17 +
 target/openrisc/cpu.h                     |  31 +-
 target/ppc/cpu-param.h                    |  37 +
 target/ppc/cpu.h                          |  61 +-
 target/ppc/helper_regs.h                  |   4 +-
 target/riscv/cpu-param.h                  |  23 +
 target/riscv/cpu.h                        |  34 +-
 target/s390x/cpu-param.h                  |  17 +
 target/s390x/cpu.h                        |  31 +-
 target/sh4/cpu-param.h                    |  21 +
 target/sh4/cpu.h                          |  30 +-
 target/sparc/cpu-param.h                  |  28 +
 target/sparc/cpu.h                        |  36 +-
 target/tilegx/cpu-param.h                 |  17 +
 target/tilegx/cpu.h                       |  23 +-
 target/tricore/cpu-param.h                |  17 +
 target/tricore/cpu.h                      |  22 +-
 target/tricore/tricore-defs.h             |   5 -
 target/unicore32/cpu-param.h              |  17 +
 target/unicore32/cpu.h                    |  24 +-
 target/xtensa/cpu-param.h                 |  21 +
 target/xtensa/cpu.h                       |  40 +-
 accel/tcg/cpu-exec.c                      |  23 +-
 accel/tcg/cputlb.c                        | 226 +++---
 accel/tcg/tcg-all.c                       |   6 +-
 accel/tcg/tcg-runtime.c                   |   4 +-
 accel/tcg/translate-all.c                 |  10 +-
 accel/tcg/user-exec.c                     |   2 +-
 bsd-user/main.c                           |   5 +-
 bsd-user/syscall.c                        |   6 +-
 cpus.c                                    |   9 +-
 hw/i386/kvmvapic.c                        |   4 +-
 hw/i386/pc.c                              |   2 +-
 hw/intc/mips_gic.c                        |   2 +-
 hw/mips/mips_int.c                        |   2 +-
 hw/nios2/cpu_pic.c                        |   5 +-
 hw/ppc/ppc.c                              |  18 +-
 hw/ppc/ppc405_uc.c                        |   2 +-
 hw/ppc/ppc_booke.c                        |   4 +-
 hw/semihosting/console.c                  |   2 +-
 hw/sparc/leon3.c                          |   4 +-
 hw/sparc/sun4m.c                          |   4 +-
 hw/sparc64/sparc64.c                      |   2 +-
 hw/unicore32/puv3.c                       |   2 +-
 hw/xtensa/pic_cpu.c                       |   2 +-
 linux-user/aarch64/cpu_loop.c             |   6 +-
 linux-user/aarch64/signal.c               |   4 +-
 linux-user/alpha/cpu_loop.c               |   2 +-
 linux-user/arm/cpu_loop.c                 |   4 +-
 linux-user/cris/cpu_loop.c                |   4 +-
 linux-user/elfload.c                      |   6 +-
 linux-user/hppa/cpu_loop.c                |   2 +-
 linux-user/i386/cpu_loop.c                |   2 +-
 linux-user/i386/signal.c                  |   2 +-
 linux-user/m68k-sim.c                     |   3 +-
 linux-user/m68k/cpu_loop.c                |   4 +-
 linux-user/main.c                         |   2 +-
 linux-user/microblaze/cpu_loop.c          |   2 +-
 linux-user/mips/cpu_loop.c                |   4 +-
 linux-user/nios2/cpu_loop.c               |   2 +-
 linux-user/openrisc/cpu_loop.c            |   2 +-
 linux-user/ppc/cpu_loop.c                 |   2 +-
 linux-user/riscv/cpu_loop.c               |   4 +-
 linux-user/s390x/cpu_loop.c               |   2 +-
 linux-user/sh4/cpu_loop.c                 |   2 +-
 linux-user/signal.c                       |   8 +-
 linux-user/sparc/cpu_loop.c               |   2 +-
 linux-user/syscall.c                      |  26 +-
 linux-user/tilegx/cpu_loop.c              |   2 +-
 linux-user/uname.c                        |   2 +-
 linux-user/vm86.c                         |  18 +-
 linux-user/xtensa/cpu_loop.c              |   2 +-
 qom/cpu.c                                 |   4 +-
 target/alpha/cpu.c                        |   3 +-
 target/alpha/helper.c                     |   8 +-
 target/alpha/sys_helper.c                 |   8 +-
 target/arm/arm-semi.c                     |   4 +-
 target/arm/cpu.c                          |   3 +-
 target/arm/cpu64.c                        |   2 +-
 target/arm/helper-a64.c                   |   4 +-
 target/arm/helper.c                       | 162 ++---
 target/arm/op_helper.c                    |  21 +-
 target/arm/translate-a64.c                |   4 +-
 target/arm/translate.c                    |   2 +-
 target/arm/vfp_helper.c                   |   2 +-
 target/cris/cpu.c                         |   3 +-
 target/cris/mmu.c                         | 482 +++++++------
 target/cris/op_helper.c                   | 827 +++++++++++-----------
 target/cris/translate.c                   |   2 +-
 target/hppa/cpu.c                         |   2 +-
 target/hppa/helper.c                      |   3 +-
 target/hppa/int_helper.c                  |   4 +-
 target/hppa/mem_helper.c                  |  10 +-
 target/hppa/op_helper.c                   |  10 +-
 target/i386/bpt_helper.c                  |   4 +-
 target/i386/cpu.c                         |   7 +-
 target/i386/excp_helper.c                 |   2 +-
 target/i386/fpu_helper.c                  |   2 +-
 target/i386/hax-all.c                     |   6 +-
 target/i386/helper.c                      |  16 +-
 target/i386/hvf/x86_decode.c              |  22 +-
 target/i386/hvf/x86_emu.c                 |  60 +-
 target/i386/mem_helper.c                  |   4 +-
 target/i386/misc_helper.c                 |  24 +-
 target/i386/seg_helper.c                  |  14 +-
 target/i386/smm_helper.c                  |   4 +-
 target/i386/svm_helper.c                  |  22 +-
 target/lm32/cpu.c                         |   3 +-
 target/lm32/helper.c                      |  19 +-
 target/lm32/op_helper.c                   |   6 +-
 target/lm32/translate.c                   |   2 +-
 target/m68k/cpu.c                         |   4 +-
 target/m68k/helper.c                      |  33 +-
 target/m68k/m68k-semi.c                   |   4 +-
 target/m68k/op_helper.c                   |  14 +-
 target/m68k/translate.c                   |   4 +-
 target/microblaze/cpu.c                   |   3 +-
 target/microblaze/mmu.c                   |   5 +-
 target/microblaze/op_helper.c             |   2 +-
 target/microblaze/translate.c             |   2 +-
 target/mips/cpu.c                         |   3 +-
 target/mips/helper.c                      |  15 +-
 target/mips/op_helper.c                   |  25 +-
 target/mips/translate.c                   |   3 +-
 target/mips/translate_init.inc.c          |   4 +-
 target/moxie/cpu.c                        |   3 +-
 target/moxie/helper.c                     |   4 +-
 target/moxie/translate.c                  |   2 +-
 target/nios2/cpu.c                        |   6 +-
 target/nios2/mmu.c                        |  14 +-
 target/nios2/op_helper.c                  |   2 +-
 target/openrisc/cpu.c                     |   3 +-
 target/openrisc/exception_helper.c        |   5 +-
 target/openrisc/sys_helper.c              |   8 +-
 target/ppc/excp_helper.c                  |  14 +-
 target/ppc/fpu_helper.c                   |  14 +-
 target/ppc/kvm.c                          |   5 +-
 target/ppc/misc_helper.c                  |  22 +-
 target/ppc/mmu-hash64.c                   |  14 +-
 target/ppc/mmu_helper.c                   | 117 ++-
 target/ppc/translate_init.inc.c           |  88 ++-
 target/riscv/cpu.c                        |   3 +-
 target/riscv/cpu_helper.c                 |  10 +-
 target/riscv/csr.c                        |  12 +-
 target/riscv/op_helper.c                  |   7 +-
 target/s390x/cc_helper.c                  |   5 +-
 target/s390x/cpu.c                        |   9 +-
 target/s390x/diag.c                       |   2 +-
 target/s390x/excp_helper.c                |   6 +-
 target/s390x/fpu_helper.c                 |   4 +-
 target/s390x/gdbstub.c                    |  24 +-
 target/s390x/helper.c                     |   7 +-
 target/s390x/int_helper.c                 |   3 +-
 target/s390x/interrupt.c                  |   6 +-
 target/s390x/mem_helper.c                 |  30 +-
 target/s390x/misc_helper.c                |  50 +-
 target/s390x/mmu_helper.c                 |   8 +-
 target/s390x/sigp.c                       |   4 +-
 target/sh4/cpu.c                          |   3 +-
 target/sh4/helper.c                       |  26 +-
 target/sh4/op_helper.c                    |  11 +-
 target/sparc/cpu.c                        |   3 +-
 target/sparc/fop_helper.c                 |   2 +-
 target/sparc/helper.c                     |   8 +-
 target/sparc/ldst_helper.c                |  33 +-
 target/sparc/mmu_helper.c                 |  10 +-
 target/tilegx/cpu.c                       |   4 +-
 target/tilegx/helper.c                    |   2 +-
 target/tricore/cpu.c                      |   4 +-
 target/tricore/op_helper.c                |   2 +-
 target/unicore32/cpu.c                    |   3 +-
 target/unicore32/helper.c                 |   4 +-
 target/unicore32/op_helper.c              |   2 +-
 target/unicore32/softmmu.c                |  11 +-
 target/unicore32/translate.c              |  26 +-
 target/unicore32/ucf64_helper.c           |   2 +-
 target/xtensa/cpu.c                       |   3 +-
 target/xtensa/dbg_helper.c                |   4 +-
 target/xtensa/exc_helper.c                |   9 +-
 target/xtensa/helper.c                    |   2 +-
 target/xtensa/mmu_helper.c                |  17 +-
 target/xtensa/xtensa-semi.c               |   2 +-
 tcg/aarch64/tcg-target.inc.c              |  40 +-
 tcg/arm/tcg-target.inc.c                  | 149 ++--
 tcg/i386/tcg-target.inc.c                 |   6 +-
 tcg/mips/tcg-target.inc.c                 |  45 +-
 tcg/ppc/tcg-target.inc.c                  |  32 +-
 tcg/riscv/tcg-target.inc.c                |  37 +-
 tcg/s390/tcg-target.inc.c                 |  13 +-
 tcg/sparc/tcg-target.inc.c                |  40 +-
 docs/devel/tracing.txt                    |   4 +-
 scripts/tracetool/format/tcg_helper_c.py  |   2 +-
 226 files changed, 2379 insertions(+), 2572 deletions(-)
 create mode 100644 target/alpha/cpu-param.h
 create mode 100644 target/arm/cpu-param.h
 create mode 100644 target/cris/cpu-param.h
 create mode 100644 target/hppa/cpu-param.h
 create mode 100644 target/i386/cpu-param.h
 create mode 100644 target/lm32/cpu-param.h
 create mode 100644 target/m68k/cpu-param.h
 create mode 100644 target/microblaze/cpu-param.h
 create mode 100644 target/mips/cpu-param.h
 create mode 100644 target/moxie/cpu-param.h
 create mode 100644 target/nios2/cpu-param.h
 create mode 100644 target/openrisc/cpu-param.h
 create mode 100644 target/ppc/cpu-param.h
 create mode 100644 target/riscv/cpu-param.h
 create mode 100644 target/s390x/cpu-param.h
 create mode 100644 target/sh4/cpu-param.h
 create mode 100644 target/sparc/cpu-param.h
 create mode 100644 target/tilegx/cpu-param.h
 create mode 100644 target/tricore/cpu-param.h
 create mode 100644 target/unicore32/cpu-param.h
 create mode 100644 target/xtensa/cpu-param.h

-- 
2.17.1


Re: [Qemu-devel] [PATCH v4 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState
Posted by no-reply@patchew.org 4 years, 11 months ago
Patchew URL: https://patchew.org/QEMU/20190604203351.27778-1-richard.henderson@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [Qemu-devel] [PATCH v4 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState
Type: series
Message-id: 20190604203351.27778-1-richard.henderson@linaro.org

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

From https://github.com/patchew-project/qemu
 * [new tag]               patchew/20190604203351.27778-1-richard.henderson@linaro.org -> patchew/20190604203351.27778-1-richard.henderson@linaro.org
Switched to a new branch 'test'
34ca5e59cf tcg/arm: Remove mostly unreachable tlb special case
ee91d825c0 tcg/arm: Use LDRD to load tlb mask+table
bb914609c4 tcg/aarch64: Use LDP to load tlb mask+table
d5e0e07dc6 cpu: Remove CPU_COMMON
ca07be8330 cpu: Move the softmmu tlb to CPUNegativeOffsetState
a2cb37619b cpu: Move icount_decr to CPUNegativeOffsetState
d11a129e9d cpu: Introduce CPUNegativeOffsetState
12cbf771a8 cpu: Introduce cpu_set_cpustate_pointers
0c0750e146 cpu: Move ENV_OFFSET to exec/gen-icount.h
0809633b52 target/xtensa: Use env_cpu, env_archcpu
2ba9bede59 target/unicore32: Use env_cpu, env_archcpu
c802794589 target/tricore: Use env_cpu
7e77be84ff target/tilegx: Use env_cpu
210e912bdc target/sparc: Use env_cpu, env_archcpu
63cb2560bd target/sh4: Use env_cpu, env_archcpu
22a8ff9cf7 target/s390x: Use env_cpu, env_archcpu
9659df970c target/riscv: Use env_cpu, env_archcpu
1f71f602af target/ppc: Use env_cpu, env_archcpu
1a69394a8b target/openrisc: Use env_cpu, env_archcpu
e4e737444b target/nios2: Use env_cpu, env_archcpu
ad91fa41eb target/moxie: Use env_cpu, env_archcpu
f1361daf5f target/mips: Use env_cpu, env_archcpu
b55814b165 target/microblaze: Use env_cpu, env_archcpu
b3318dd59b target/m68k: Use env_cpu, env_archcpu
cd2261bc71 target/lm32: Use env_cpu, env_archcpu
0006be4726 target/i386: Use env_cpu, env_archcpu
25a471ecc2 target/hppa: Use env_cpu, env_archcpu
d903061de8 target/cris: Use env_cpu, env_archcpu
3c7a60c9af target/cris: Reindent op_helper.c
f32a7110b5 target/cris: Reindent mmu.c
48a0d4196e target/arm: Use env_cpu, env_archcpu
838a1e1bf6 target/alpha: Use env_cpu, env_archcpu
7f61606912 cpu: Introduce env_archcpu
fc29f50705 cpu: Replace ENV_GET_CPU with env_cpu
02881b40d1 cpu: Define ArchCPU
c0947fa0bf cpu: Define CPUArchState with typedef
5f1fb21fa9 tcg: Create struct CPUTLB
56021e134e tcg: Split out target/arch/cpu-param.h
2ee12a2303 tcg: Fold CPUTLBWindow into CPUTLBDesc

=== OUTPUT BEGIN ===
1/39 Checking commit 2ee12a2303f6 (tcg: Fold CPUTLBWindow into CPUTLBDesc)
2/39 Checking commit 56021e134eef (tcg: Split out target/arch/cpu-param.h)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#57: 
new file mode 100644

total: 0 errors, 1 warnings, 1290 lines checked

Patch 2/39 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/39 Checking commit 5f1fb21fa917 (tcg: Create struct CPUTLB)
4/39 Checking commit c0947fa0bfa5 (cpu: Define CPUArchState with typedef)
5/39 Checking commit 02881b40d194 (cpu: Define ArchCPU)
6/39 Checking commit fc29f50705f4 (cpu: Replace ENV_GET_CPU with env_cpu)
7/39 Checking commit 7f6160691235 (cpu: Introduce env_archcpu)
8/39 Checking commit 838a1e1bf644 (target/alpha: Use env_cpu, env_archcpu)
9/39 Checking commit 48a0d4196e93 (target/arm: Use env_cpu, env_archcpu)
10/39 Checking commit f32a7110b524 (target/cris: Reindent mmu.c)
11/39 Checking commit 3c7a60c9af21 (target/cris: Reindent op_helper.c)
12/39 Checking commit d903061de8de (target/cris: Use env_cpu, env_archcpu)
13/39 Checking commit 25a471ecc229 (target/hppa: Use env_cpu, env_archcpu)
14/39 Checking commit 0006be472653 (target/i386: Use env_cpu, env_archcpu)
15/39 Checking commit cd2261bc7168 (target/lm32: Use env_cpu, env_archcpu)
16/39 Checking commit b3318dd59b84 (target/m68k: Use env_cpu, env_archcpu)
17/39 Checking commit b55814b165bf (target/microblaze: Use env_cpu, env_archcpu)
18/39 Checking commit f1361daf5ff3 (target/mips: Use env_cpu, env_archcpu)
19/39 Checking commit ad91fa41eb58 (target/moxie: Use env_cpu, env_archcpu)
20/39 Checking commit e4e737444b86 (target/nios2: Use env_cpu, env_archcpu)
21/39 Checking commit 1a69394a8b6f (target/openrisc: Use env_cpu, env_archcpu)
22/39 Checking commit 1f71f602afbc (target/ppc: Use env_cpu, env_archcpu)
23/39 Checking commit 9659df970c05 (target/riscv: Use env_cpu, env_archcpu)
24/39 Checking commit 22a8ff9cf7fa (target/s390x: Use env_cpu, env_archcpu)
25/39 Checking commit 63cb2560bd5a (target/sh4: Use env_cpu, env_archcpu)
26/39 Checking commit 210e912bdcba (target/sparc: Use env_cpu, env_archcpu)
27/39 Checking commit 7e77be84ff73 (target/tilegx: Use env_cpu)
28/39 Checking commit c802794589b8 (target/tricore: Use env_cpu)
29/39 Checking commit 2ba9bede5907 (target/unicore32: Use env_cpu, env_archcpu)
30/39 Checking commit 0809633b5295 (target/xtensa: Use env_cpu, env_archcpu)
31/39 Checking commit 0c0750e146eb (cpu: Move ENV_OFFSET to exec/gen-icount.h)
32/39 Checking commit 12cbf771a8f2 (cpu: Introduce cpu_set_cpustate_pointers)
33/39 Checking commit d11a129e9da7 (cpu: Introduce CPUNegativeOffsetState)
34/39 Checking commit a2cb37619bec (cpu: Move icount_decr to CPUNegativeOffsetState)
ERROR: return is not a function, parentheses are not required
#193: FILE: cpus.c:242:
+    return (cpu->icount_budget -

total: 1 errors, 0 warnings, 326 lines checked

Patch 34/39 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

35/39 Checking commit ca07be8330b6 (cpu: Move the softmmu tlb to CPUNegativeOffsetState)
36/39 Checking commit d5e0e07dc61d (cpu: Remove CPU_COMMON)
37/39 Checking commit bb914609c43a (tcg/aarch64: Use LDP to load tlb mask+table)
38/39 Checking commit ee91d825c033 (tcg/arm: Use LDRD to load tlb mask+table)
39/39 Checking commit 34ca5e59cfd4 (tcg/arm: Remove mostly unreachable tlb special case)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190604203351.27778-1-richard.henderson@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Re: [Qemu-devel] [PATCH v4 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState
Posted by no-reply@patchew.org 4 years, 11 months ago
Patchew URL: https://patchew.org/QEMU/20190604203351.27778-1-richard.henderson@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Subject: [Qemu-devel] [PATCH v4 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState
Message-id: 20190604203351.27778-1-richard.henderson@linaro.org

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Switched to a new branch 'test'
f8596dd tcg/arm: Remove mostly unreachable tlb special case
603a5f1 tcg/arm: Use LDRD to load tlb mask+table
836bf0a tcg/aarch64: Use LDP to load tlb mask+table
e39d70a cpu: Remove CPU_COMMON
793f779 cpu: Move the softmmu tlb to CPUNegativeOffsetState
d66f2a6 cpu: Move icount_decr to CPUNegativeOffsetState
6722835 cpu: Introduce CPUNegativeOffsetState
78b8d55 cpu: Introduce cpu_set_cpustate_pointers
c2fa081 cpu: Move ENV_OFFSET to exec/gen-icount.h
858f454 target/xtensa: Use env_cpu, env_archcpu
f9249cd target/unicore32: Use env_cpu, env_archcpu
9ecd17a target/tricore: Use env_cpu
531b2be target/tilegx: Use env_cpu
a442964 target/sparc: Use env_cpu, env_archcpu
48b5b70 target/sh4: Use env_cpu, env_archcpu
73c66b0 target/s390x: Use env_cpu, env_archcpu
bd8ef3c target/riscv: Use env_cpu, env_archcpu
1dc6031 target/ppc: Use env_cpu, env_archcpu
b2fba00 target/openrisc: Use env_cpu, env_archcpu
365bbce target/nios2: Use env_cpu, env_archcpu
facb326 target/moxie: Use env_cpu, env_archcpu
2824611 target/mips: Use env_cpu, env_archcpu
6127245 target/microblaze: Use env_cpu, env_archcpu
b281c56 target/m68k: Use env_cpu, env_archcpu
5a5aa1b target/lm32: Use env_cpu, env_archcpu
1c115e8 target/i386: Use env_cpu, env_archcpu
34f7d2a target/hppa: Use env_cpu, env_archcpu
ea4a53f target/cris: Use env_cpu, env_archcpu
132f302 target/cris: Reindent op_helper.c
53c1580 target/cris: Reindent mmu.c
0192671 target/arm: Use env_cpu, env_archcpu
085f0f9 target/alpha: Use env_cpu, env_archcpu
632858f cpu: Introduce env_archcpu
1731a35 cpu: Replace ENV_GET_CPU with env_cpu
71904ca cpu: Define ArchCPU
24cceb2 cpu: Define CPUArchState with typedef
7b5100a tcg: Create struct CPUTLB
10c5f06 tcg: Split out target/arch/cpu-param.h
54a7978 tcg: Fold CPUTLBWindow into CPUTLBDesc

=== OUTPUT BEGIN ===
1/39 Checking commit 54a79782c553 (tcg: Fold CPUTLBWindow into CPUTLBDesc)
2/39 Checking commit 10c5f068daa9 (tcg: Split out target/arch/cpu-param.h)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#57: 
new file mode 100644

total: 0 errors, 1 warnings, 1290 lines checked

Patch 2/39 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/39 Checking commit 7b5100a1e548 (tcg: Create struct CPUTLB)
4/39 Checking commit 24cceb2507f0 (cpu: Define CPUArchState with typedef)
5/39 Checking commit 71904cac5402 (cpu: Define ArchCPU)
6/39 Checking commit 1731a359fc4d (cpu: Replace ENV_GET_CPU with env_cpu)
7/39 Checking commit 632858f72759 (cpu: Introduce env_archcpu)
8/39 Checking commit 085f0f97e81e (target/alpha: Use env_cpu, env_archcpu)
9/39 Checking commit 019267126056 (target/arm: Use env_cpu, env_archcpu)
10/39 Checking commit 53c1580d3402 (target/cris: Reindent mmu.c)
11/39 Checking commit 132f3025c6b8 (target/cris: Reindent op_helper.c)
12/39 Checking commit ea4a53fb0c7e (target/cris: Use env_cpu, env_archcpu)
13/39 Checking commit 34f7d2a1d8b6 (target/hppa: Use env_cpu, env_archcpu)
14/39 Checking commit 1c115e846a49 (target/i386: Use env_cpu, env_archcpu)
15/39 Checking commit 5a5aa1b9bb77 (target/lm32: Use env_cpu, env_archcpu)
16/39 Checking commit b281c56f03d4 (target/m68k: Use env_cpu, env_archcpu)
17/39 Checking commit 612724572942 (target/microblaze: Use env_cpu, env_archcpu)
18/39 Checking commit 2824611f1148 (target/mips: Use env_cpu, env_archcpu)
19/39 Checking commit facb3268b3bb (target/moxie: Use env_cpu, env_archcpu)
20/39 Checking commit 365bbce9fef3 (target/nios2: Use env_cpu, env_archcpu)
21/39 Checking commit b2fba00c41f5 (target/openrisc: Use env_cpu, env_archcpu)
22/39 Checking commit 1dc603161cc7 (target/ppc: Use env_cpu, env_archcpu)
23/39 Checking commit bd8ef3ceddf1 (target/riscv: Use env_cpu, env_archcpu)
24/39 Checking commit 73c66b0b626c (target/s390x: Use env_cpu, env_archcpu)
25/39 Checking commit 48b5b7034c82 (target/sh4: Use env_cpu, env_archcpu)
26/39 Checking commit a4429646576d (target/sparc: Use env_cpu, env_archcpu)
27/39 Checking commit 531b2be29199 (target/tilegx: Use env_cpu)
28/39 Checking commit 9ecd17ac00cb (target/tricore: Use env_cpu)
29/39 Checking commit f9249cddf5c0 (target/unicore32: Use env_cpu, env_archcpu)
30/39 Checking commit 858f4545b2e4 (target/xtensa: Use env_cpu, env_archcpu)
31/39 Checking commit c2fa081c8850 (cpu: Move ENV_OFFSET to exec/gen-icount.h)
32/39 Checking commit 78b8d55c2e2a (cpu: Introduce cpu_set_cpustate_pointers)
33/39 Checking commit 67228358c01d (cpu: Introduce CPUNegativeOffsetState)
34/39 Checking commit d66f2a670d00 (cpu: Move icount_decr to CPUNegativeOffsetState)
ERROR: return is not a function, parentheses are not required
#193: FILE: cpus.c:242:
+    return (cpu->icount_budget -

total: 1 errors, 0 warnings, 326 lines checked

Patch 34/39 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

35/39 Checking commit 793f779666d8 (cpu: Move the softmmu tlb to CPUNegativeOffsetState)
36/39 Checking commit e39d70a9a542 (cpu: Remove CPU_COMMON)
37/39 Checking commit 836bf0a1d1f7 (tcg/aarch64: Use LDP to load tlb mask+table)
38/39 Checking commit 603a5f195f37 (tcg/arm: Use LDRD to load tlb mask+table)
39/39 Checking commit f8596dd63bd4 (tcg/arm: Remove mostly unreachable tlb special case)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190604203351.27778-1-richard.henderson@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Re: [Qemu-devel] [PATCH v4 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState
Posted by no-reply@patchew.org 4 years, 11 months ago
Patchew URL: https://patchew.org/QEMU/20190604203351.27778-1-richard.henderson@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [Qemu-devel] [PATCH v4 00/39] tcg: Move the softmmu tlb to CPUNegativeOffsetState
Type: series
Message-id: 20190604203351.27778-1-richard.henderson@linaro.org

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

From https://github.com/patchew-project/qemu
 t [tag update]            patchew/20190604203351.27778-1-richard.henderson@linaro.org -> patchew/20190604203351.27778-1-richard.henderson@linaro.org
Switched to a new branch 'test'
63e891f725 tcg/arm: Remove mostly unreachable tlb special case
4f2566a5d2 tcg/arm: Use LDRD to load tlb mask+table
edc357435e tcg/aarch64: Use LDP to load tlb mask+table
712ebadd43 cpu: Remove CPU_COMMON
5aa6a2fb8d cpu: Move the softmmu tlb to CPUNegativeOffsetState
1c40b77322 cpu: Move icount_decr to CPUNegativeOffsetState
1c966d8fcd cpu: Introduce CPUNegativeOffsetState
8468e4bd66 cpu: Introduce cpu_set_cpustate_pointers
ee1b7b6bbd cpu: Move ENV_OFFSET to exec/gen-icount.h
5ff2ffb8b3 target/xtensa: Use env_cpu, env_archcpu
a1c69dbe8f target/unicore32: Use env_cpu, env_archcpu
6a017d55ba target/tricore: Use env_cpu
790da26490 target/tilegx: Use env_cpu
6958fd2246 target/sparc: Use env_cpu, env_archcpu
3dbc8158e8 target/sh4: Use env_cpu, env_archcpu
2d49eb4f00 target/s390x: Use env_cpu, env_archcpu
6dff0c4823 target/riscv: Use env_cpu, env_archcpu
0da4405772 target/ppc: Use env_cpu, env_archcpu
8fdd1e14ff target/openrisc: Use env_cpu, env_archcpu
220d63dba7 target/nios2: Use env_cpu, env_archcpu
1aa560923f target/moxie: Use env_cpu, env_archcpu
1808dbc955 target/mips: Use env_cpu, env_archcpu
3795a4b0f6 target/microblaze: Use env_cpu, env_archcpu
5c889c6702 target/m68k: Use env_cpu, env_archcpu
0bd3d012c8 target/lm32: Use env_cpu, env_archcpu
607ef88980 target/i386: Use env_cpu, env_archcpu
55f5b3354f target/hppa: Use env_cpu, env_archcpu
459c3271ee target/cris: Use env_cpu, env_archcpu
0dea7d8b87 target/cris: Reindent op_helper.c
853bba6046 target/cris: Reindent mmu.c
5854d09536 target/arm: Use env_cpu, env_archcpu
891044bc70 target/alpha: Use env_cpu, env_archcpu
43de9b9faa cpu: Introduce env_archcpu
c67ce1d529 cpu: Replace ENV_GET_CPU with env_cpu
e75b06aefe cpu: Define ArchCPU
c1ee18a202 cpu: Define CPUArchState with typedef
3f2efac55b tcg: Create struct CPUTLB
86ccb48bb0 tcg: Split out target/arch/cpu-param.h
0f46d893fd tcg: Fold CPUTLBWindow into CPUTLBDesc

=== OUTPUT BEGIN ===
1/39 Checking commit 0f46d893fd6f (tcg: Fold CPUTLBWindow into CPUTLBDesc)
2/39 Checking commit 86ccb48bb0f1 (tcg: Split out target/arch/cpu-param.h)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#57: 
new file mode 100644

total: 0 errors, 1 warnings, 1290 lines checked

Patch 2/39 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/39 Checking commit 3f2efac55bff (tcg: Create struct CPUTLB)
4/39 Checking commit c1ee18a2024a (cpu: Define CPUArchState with typedef)
5/39 Checking commit e75b06aefefc (cpu: Define ArchCPU)
6/39 Checking commit c67ce1d529df (cpu: Replace ENV_GET_CPU with env_cpu)
7/39 Checking commit 43de9b9faa26 (cpu: Introduce env_archcpu)
8/39 Checking commit 891044bc70d6 (target/alpha: Use env_cpu, env_archcpu)
9/39 Checking commit 5854d09536fd (target/arm: Use env_cpu, env_archcpu)
10/39 Checking commit 853bba604625 (target/cris: Reindent mmu.c)
11/39 Checking commit 0dea7d8b87fd (target/cris: Reindent op_helper.c)
12/39 Checking commit 459c3271eeda (target/cris: Use env_cpu, env_archcpu)
13/39 Checking commit 55f5b3354f8c (target/hppa: Use env_cpu, env_archcpu)
14/39 Checking commit 607ef889808f (target/i386: Use env_cpu, env_archcpu)
15/39 Checking commit 0bd3d012c8e7 (target/lm32: Use env_cpu, env_archcpu)
16/39 Checking commit 5c889c6702ed (target/m68k: Use env_cpu, env_archcpu)
17/39 Checking commit 3795a4b0f698 (target/microblaze: Use env_cpu, env_archcpu)
18/39 Checking commit 1808dbc95514 (target/mips: Use env_cpu, env_archcpu)
19/39 Checking commit 1aa560923f44 (target/moxie: Use env_cpu, env_archcpu)
20/39 Checking commit 220d63dba758 (target/nios2: Use env_cpu, env_archcpu)
21/39 Checking commit 8fdd1e14ff2d (target/openrisc: Use env_cpu, env_archcpu)
22/39 Checking commit 0da440577225 (target/ppc: Use env_cpu, env_archcpu)
23/39 Checking commit 6dff0c4823b7 (target/riscv: Use env_cpu, env_archcpu)
24/39 Checking commit 2d49eb4f0027 (target/s390x: Use env_cpu, env_archcpu)
25/39 Checking commit 3dbc8158e822 (target/sh4: Use env_cpu, env_archcpu)
26/39 Checking commit 6958fd224677 (target/sparc: Use env_cpu, env_archcpu)
27/39 Checking commit 790da264900d (target/tilegx: Use env_cpu)
28/39 Checking commit 6a017d55bae9 (target/tricore: Use env_cpu)
29/39 Checking commit a1c69dbe8f0f (target/unicore32: Use env_cpu, env_archcpu)
30/39 Checking commit 5ff2ffb8b3fc (target/xtensa: Use env_cpu, env_archcpu)
31/39 Checking commit ee1b7b6bbd69 (cpu: Move ENV_OFFSET to exec/gen-icount.h)
32/39 Checking commit 8468e4bd6660 (cpu: Introduce cpu_set_cpustate_pointers)
33/39 Checking commit 1c966d8fcd00 (cpu: Introduce CPUNegativeOffsetState)
34/39 Checking commit 1c40b773225d (cpu: Move icount_decr to CPUNegativeOffsetState)
ERROR: return is not a function, parentheses are not required
#193: FILE: cpus.c:242:
+    return (cpu->icount_budget -

total: 1 errors, 0 warnings, 326 lines checked

Patch 34/39 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

35/39 Checking commit 5aa6a2fb8d0a (cpu: Move the softmmu tlb to CPUNegativeOffsetState)
36/39 Checking commit 712ebadd4342 (cpu: Remove CPU_COMMON)
37/39 Checking commit edc357435e8c (tcg/aarch64: Use LDP to load tlb mask+table)
38/39 Checking commit 4f2566a5d206 (tcg/arm: Use LDRD to load tlb mask+table)
39/39 Checking commit 63e891f7255a (tcg/arm: Remove mostly unreachable tlb special case)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190604203351.27778-1-richard.henderson@linaro.org/testing.checkpatch/?type=message.
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