[Qemu-devel] [PULL 0/5] target-arm queue

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git fetch https://github.com/patchew-project/qemu tags/patchew/20190315113906.6585-1-peter.maydell@linaro.org
Maintainers: Peter Maydell <peter.maydell@linaro.org>, Igor Mammedov <imammedo@redhat.com>, Shannon Zhao <shannon.zhaosl@gmail.com>, "Michael S. Tsirkin" <mst@redhat.com>
There is a newer version of this series
include/hw/intc/bcm2836_control.h |   9 ++++
hw/arm/virt-acpi-build.c          |   6 +--
hw/intc/bcm2836_control.c         | 101 +++++++++++++++++++++++++++++++++++++-
target/arm/helper.c               |  30 +++++------
target/arm/translate-sve.c        |  22 ++++++---
5 files changed, 140 insertions(+), 28 deletions(-)
[Qemu-devel] [PULL 0/5] target-arm queue
Posted by Peter Maydell 5 years, 1 month ago
A last arm pullreq before rc0. This is mostly bug fixes,
though you could call adding the missing local timer
support to bcm2836_control a new feature I suppose --
in any case it's a small and localised change.

thanks
-- PMM

The following changes since commit 7074ab12c81a1b2b1e0e1c40983f56b2c5ccc494:

  Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging (2019-03-14 16:19:37 +0000)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190315

for you to fetch changes up to 5de56742a3c91de3d646326bec43a989bba83ca4:

  target/arm: Check access permission to ADDVL/ADDPL/RDVL (2019-03-15 11:12:29 +0000)

----------------------------------------------------------------
target-arm queue:
 * Add missing SVE-enabled check to ADDVL/ADDPL/RDVL
 * virt-acpi-build: use PCIE_MMCFG_BUS to retrieve end_bus_number
 * virt-acpi-build: Fix SMMUv3 GSIV values
 * Allow EL0 to write to arch timer registers, not just read them
 * bcm2836_control: Implement local timer

----------------------------------------------------------------
Amir Charif (1):
      target/arm: Check access permission to ADDVL/ADDPL/RDVL

Dongjiu Geng (1):
      target/arm: change arch timer registers access permission

Eric Auger (1):
      hw/arm/virt-acpi-build: Fix SMMUv3 GSIV values

Wei Yang (1):
      hw/arm/virt-acpi-build: use PCIE_MMCFG_BUS to retrieve end_bus_number

Zoltán Baldaszti (1):
      hw/intc/bcm2836_control: Implement local timer

 include/hw/intc/bcm2836_control.h |   9 ++++
 hw/arm/virt-acpi-build.c          |   6 +--
 hw/intc/bcm2836_control.c         | 101 +++++++++++++++++++++++++++++++++++++-
 target/arm/helper.c               |  30 +++++------
 target/arm/translate-sve.c        |  22 ++++++---
 5 files changed, 140 insertions(+), 28 deletions(-)

Re: [Qemu-devel] [PULL 0/5] target-arm queue
Posted by Peter Maydell 5 years, 1 month ago
On Fri, 15 Mar 2019 at 11:39, Peter Maydell <peter.maydell@linaro.org> wrote:
>
>
> A last arm pullreq before rc0. This is mostly bug fixes,
> though you could call adding the missing local timer
> support to bcm2836_control a new feature I suppose --
> in any case it's a small and localised change.
>
> thanks
> -- PMM
>
> The following changes since commit 7074ab12c81a1b2b1e0e1c40983f56b2c5ccc494:
>
>   Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging (2019-03-14 16:19:37 +0000)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190315
>
> for you to fetch changes up to 5de56742a3c91de3d646326bec43a989bba83ca4:
>
>   target/arm: Check access permission to ADDVL/ADDPL/RDVL (2019-03-15 11:12:29 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
>  * Add missing SVE-enabled check to ADDVL/ADDPL/RDVL
>  * virt-acpi-build: use PCIE_MMCFG_BUS to retrieve end_bus_number
>  * virt-acpi-build: Fix SMMUv3 GSIV values
>  * Allow EL0 to write to arch timer registers, not just read them
>  * bcm2836_control: Implement local timer
>

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.0
for any user-visible changes.

-- PMM