[Qemu-devel] [RFC PATCH v4 14/44] hw/riscv/Makefile.objs: Create CONFIG_* for riscv boards

Yang Zhong posted 44 patches 5 years, 5 months ago
Maintainers: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>, Palmer Dabbelt <palmer@sifive.com>, Marek Vasut <marex@denx.de>, Peter Crosthwaite <crosthwaite.peter@gmail.com>, "Michael S. Tsirkin" <mst@redhat.com>, Richard Henderson <rth@twiddle.net>, Jason Wang <jasowang@redhat.com>, Gerd Hoffmann <kraxel@redhat.com>, Guan Xuetao <gxt@mprc.pku.edu.cn>, Christian Borntraeger <borntraeger@de.ibm.com>, Corey Minyard <minyard@acm.org>, "Marc-André Lureau" <marcandre.lureau@redhat.com>, Michael Clark <mjc@sifive.com>, Paolo Bonzini <pbonzini@redhat.com>, Aurelien Jarno <aurelien@aurel32.net>, Greg Kurz <groug@kaod.org>, Cornelia Huck <cohuck@redhat.com>, Michael Walle <michael@walle.cc>, Igor Mammedov <imammedo@redhat.com>, Max Reitz <mreitz@redhat.com>, Sagar Karandikar <sagark@eecs.berkeley.edu>, Peter Maydell <peter.maydell@linaro.org>, Aleksandar Rikalo <arikalo@wavecomp.com>, Alistair Francis <Alistair.Francis@wdc.com>, Stafford Horne <shorne@gmail.com>, Cleber Rosa <crosa@redhat.com>, Chris Wulff <crwulff@gmail.com>, Alberto Garcia <berto@igalia.com>, Fam Zheng <fam@euphon.net>, Aleksandar Markovic <amarkovic@wavecomp.com>, Marcel Apfelbaum <marcel.apfelbaum@gmail.com>, Kevin Wolf <kwolf@redhat.com>, David Gibson <david@gibson.dropbear.id.au>, Anthony Green <green@moxielogic.com>, Halil Pasic <pasic@linux.ibm.com>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, Stefan Markovic <smarkovic@wavecomp.com>, Stefan Berger <stefanb@linux.ibm.com>, Eduardo Habkost <ehabkost@redhat.com>, Alistair Francis <alistair@alistair23.me>, Artyom Tarasenko <atar4qemu@gmail.com>, John Snow <jsnow@redhat.com>, Max Filippov <jcmvbkbc@gmail.com>, Alex Williamson <alex.williamson@redhat.com>, Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
There is a newer version of this series
[Qemu-devel] [RFC PATCH v4 14/44] hw/riscv/Makefile.objs: Create CONFIG_* for riscv boards
Posted by Yang Zhong 5 years, 5 months ago
Add the new configs to default-configs/riscv*-sofmmu.mak.

Signed-off-by: Yang Zhong <yang.zhong@intel.com>
---
 default-configs/riscv32-softmmu.mak |  7 +++++++
 default-configs/riscv64-softmmu.mak |  7 +++++++
 hw/riscv/Makefile.objs              | 22 +++++++++++-----------
 3 files changed, 25 insertions(+), 11 deletions(-)

diff --git a/default-configs/riscv32-softmmu.mak b/default-configs/riscv32-softmmu.mak
index fbfd1d4e4b..65337166e1 100644
--- a/default-configs/riscv32-softmmu.mak
+++ b/default-configs/riscv32-softmmu.mak
@@ -12,3 +12,10 @@ CONFIG_PCI_EXPRESS_GENERIC_BRIDGE=y
 
 CONFIG_VGA=y
 CONFIG_VGA_PCI=y
+
+CONFIG_SPIKE=y
+CONFIG_HART=y
+CONFIG_SIFIVE_E=y
+CONFIG_SIFIVE=y
+CONFIG_SIFIVE_U=y
+CONFIG_RISCV_VIRT=y
diff --git a/default-configs/riscv64-softmmu.mak b/default-configs/riscv64-softmmu.mak
index fbfd1d4e4b..65337166e1 100644
--- a/default-configs/riscv64-softmmu.mak
+++ b/default-configs/riscv64-softmmu.mak
@@ -12,3 +12,10 @@ CONFIG_PCI_EXPRESS_GENERIC_BRIDGE=y
 
 CONFIG_VGA=y
 CONFIG_VGA_PCI=y
+
+CONFIG_SPIKE=y
+CONFIG_HART=y
+CONFIG_SIFIVE_E=y
+CONFIG_SIFIVE=y
+CONFIG_SIFIVE_U=y
+CONFIG_RISCV_VIRT=y
diff --git a/hw/riscv/Makefile.objs b/hw/riscv/Makefile.objs
index 1dde01d39d..79bfb3abf9 100644
--- a/hw/riscv/Makefile.objs
+++ b/hw/riscv/Makefile.objs
@@ -1,11 +1,11 @@
-obj-y += riscv_htif.o
-obj-y += riscv_hart.o
-obj-y += sifive_e.o
-obj-y += sifive_clint.o
-obj-y += sifive_prci.o
-obj-y += sifive_plic.o
-obj-y += sifive_test.o
-obj-y += sifive_u.o
-obj-y += sifive_uart.o
-obj-y += spike.o
-obj-y += virt.o
+obj-$(CONFIG_SPIKE) += riscv_htif.o
+obj-$(CONFIG_HART) += riscv_hart.o
+obj-$(CONFIG_SIFIVE_E) += sifive_e.o
+obj-$(CONFIG_SIFIVE) += sifive_clint.o
+obj-$(CONFIG_SIFIVE) += sifive_prci.o
+obj-$(CONFIG_SIFIVE) += sifive_plic.o
+obj-$(CONFIG_SIFIVE) += sifive_test.o
+obj-$(CONFIG_SIFIVE_U) += sifive_u.o
+obj-$(CONFIG_SIFIVE) += sifive_uart.o
+obj-$(CONFIG_SPIKE) += spike.o
+obj-$(CONFIG_RISCV_VIRT) += virt.o
-- 
2.17.1


Re: [Qemu-devel] [RFC PATCH v4 14/44] hw/riscv/Makefile.objs: Create CONFIG_* for riscv boards
Posted by Thomas Huth 5 years, 5 months ago
On 2019-01-23 07:55, Yang Zhong wrote:
> Add the new configs to default-configs/riscv*-sofmmu.mak.
> 
> Signed-off-by: Yang Zhong <yang.zhong@intel.com>
> ---
>  default-configs/riscv32-softmmu.mak |  7 +++++++
>  default-configs/riscv64-softmmu.mak |  7 +++++++
>  hw/riscv/Makefile.objs              | 22 +++++++++++-----------
>  3 files changed, 25 insertions(+), 11 deletions(-)
> 
> diff --git a/default-configs/riscv32-softmmu.mak b/default-configs/riscv32-softmmu.mak
> index fbfd1d4e4b..65337166e1 100644
> --- a/default-configs/riscv32-softmmu.mak
> +++ b/default-configs/riscv32-softmmu.mak
> @@ -12,3 +12,10 @@ CONFIG_PCI_EXPRESS_GENERIC_BRIDGE=y
>  
>  CONFIG_VGA=y
>  CONFIG_VGA_PCI=y
> +
> +CONFIG_SPIKE=y
> +CONFIG_HART=y
> +CONFIG_SIFIVE_E=y
> +CONFIG_SIFIVE=y
> +CONFIG_SIFIVE_U=y
> +CONFIG_RISCV_VIRT=y
> diff --git a/default-configs/riscv64-softmmu.mak b/default-configs/riscv64-softmmu.mak
> index fbfd1d4e4b..65337166e1 100644
> --- a/default-configs/riscv64-softmmu.mak
> +++ b/default-configs/riscv64-softmmu.mak
> @@ -12,3 +12,10 @@ CONFIG_PCI_EXPRESS_GENERIC_BRIDGE=y
>  
>  CONFIG_VGA=y
>  CONFIG_VGA_PCI=y
> +
> +CONFIG_SPIKE=y
> +CONFIG_HART=y
> +CONFIG_SIFIVE_E=y
> +CONFIG_SIFIVE=y
> +CONFIG_SIFIVE_U=y
> +CONFIG_RISCV_VIRT=y
> diff --git a/hw/riscv/Makefile.objs b/hw/riscv/Makefile.objs
> index 1dde01d39d..79bfb3abf9 100644
> --- a/hw/riscv/Makefile.objs
> +++ b/hw/riscv/Makefile.objs
> @@ -1,11 +1,11 @@
> -obj-y += riscv_htif.o
> -obj-y += riscv_hart.o
> -obj-y += sifive_e.o
> -obj-y += sifive_clint.o
> -obj-y += sifive_prci.o
> -obj-y += sifive_plic.o
> -obj-y += sifive_test.o
> -obj-y += sifive_u.o
> -obj-y += sifive_uart.o
> -obj-y += spike.o
> -obj-y += virt.o
> +obj-$(CONFIG_SPIKE) += riscv_htif.o
> +obj-$(CONFIG_HART) += riscv_hart.o
> +obj-$(CONFIG_SIFIVE_E) += sifive_e.o
> +obj-$(CONFIG_SIFIVE) += sifive_clint.o
> +obj-$(CONFIG_SIFIVE) += sifive_prci.o
> +obj-$(CONFIG_SIFIVE) += sifive_plic.o
> +obj-$(CONFIG_SIFIVE) += sifive_test.o
> +obj-$(CONFIG_SIFIVE_U) += sifive_u.o
> +obj-$(CONFIG_SIFIVE) += sifive_uart.o
> +obj-$(CONFIG_SPIKE) += spike.o
> +obj-$(CONFIG_RISCV_VIRT) += virt.o

Looks reasonable to me, so I dare to say:

Reviewed-by: Thomas Huth <thuth@redhat.com>

... but I'm not an expert here, I hope some of the RISC-V maintainers
could chime in?

Re: [Qemu-devel] [RFC PATCH v4 14/44] hw/riscv/Makefile.objs: Create CONFIG_* for riscv boards
Posted by Alistair Francis 5 years, 5 months ago
On Wed, Jan 23, 2019 at 8:12 AM Thomas Huth <thuth@redhat.com> wrote:
>
> On 2019-01-23 07:55, Yang Zhong wrote:
> > Add the new configs to default-configs/riscv*-sofmmu.mak.
> >
> > Signed-off-by: Yang Zhong <yang.zhong@intel.com>
> > ---
> >  default-configs/riscv32-softmmu.mak |  7 +++++++
> >  default-configs/riscv64-softmmu.mak |  7 +++++++
> >  hw/riscv/Makefile.objs              | 22 +++++++++++-----------
> >  3 files changed, 25 insertions(+), 11 deletions(-)
> >
> > diff --git a/default-configs/riscv32-softmmu.mak b/default-configs/riscv32-softmmu.mak
> > index fbfd1d4e4b..65337166e1 100644
> > --- a/default-configs/riscv32-softmmu.mak
> > +++ b/default-configs/riscv32-softmmu.mak
> > @@ -12,3 +12,10 @@ CONFIG_PCI_EXPRESS_GENERIC_BRIDGE=y
> >
> >  CONFIG_VGA=y
> >  CONFIG_VGA_PCI=y
> > +
> > +CONFIG_SPIKE=y
> > +CONFIG_HART=y
> > +CONFIG_SIFIVE_E=y
> > +CONFIG_SIFIVE=y
> > +CONFIG_SIFIVE_U=y
> > +CONFIG_RISCV_VIRT=y
> > diff --git a/default-configs/riscv64-softmmu.mak b/default-configs/riscv64-softmmu.mak
> > index fbfd1d4e4b..65337166e1 100644
> > --- a/default-configs/riscv64-softmmu.mak
> > +++ b/default-configs/riscv64-softmmu.mak
> > @@ -12,3 +12,10 @@ CONFIG_PCI_EXPRESS_GENERIC_BRIDGE=y
> >
> >  CONFIG_VGA=y
> >  CONFIG_VGA_PCI=y
> > +
> > +CONFIG_SPIKE=y
> > +CONFIG_HART=y
> > +CONFIG_SIFIVE_E=y
> > +CONFIG_SIFIVE=y
> > +CONFIG_SIFIVE_U=y
> > +CONFIG_RISCV_VIRT=y
> > diff --git a/hw/riscv/Makefile.objs b/hw/riscv/Makefile.objs
> > index 1dde01d39d..79bfb3abf9 100644
> > --- a/hw/riscv/Makefile.objs
> > +++ b/hw/riscv/Makefile.objs
> > @@ -1,11 +1,11 @@
> > -obj-y += riscv_htif.o
> > -obj-y += riscv_hart.o
> > -obj-y += sifive_e.o
> > -obj-y += sifive_clint.o
> > -obj-y += sifive_prci.o
> > -obj-y += sifive_plic.o
> > -obj-y += sifive_test.o
> > -obj-y += sifive_u.o
> > -obj-y += sifive_uart.o
> > -obj-y += spike.o
> > -obj-y += virt.o
> > +obj-$(CONFIG_SPIKE) += riscv_htif.o
> > +obj-$(CONFIG_HART) += riscv_hart.o
> > +obj-$(CONFIG_SIFIVE_E) += sifive_e.o
> > +obj-$(CONFIG_SIFIVE) += sifive_clint.o
> > +obj-$(CONFIG_SIFIVE) += sifive_prci.o
> > +obj-$(CONFIG_SIFIVE) += sifive_plic.o
> > +obj-$(CONFIG_SIFIVE) += sifive_test.o
> > +obj-$(CONFIG_SIFIVE_U) += sifive_u.o
> > +obj-$(CONFIG_SIFIVE) += sifive_uart.o
> > +obj-$(CONFIG_SPIKE) += spike.o
> > +obj-$(CONFIG_RISCV_VIRT) += virt.o
>
> Looks reasonable to me, so I dare to say:
>
> Reviewed-by: Thomas Huth <thuth@redhat.com>
>
> ... but I'm not an expert here, I hope some of the RISC-V maintainers
> could chime in?

Looks right to me

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

>