[Qemu-devel] [PATCH 0/6] target/mips: Amend MXU support

Aleksandar Markovic posted 6 patches 5 years, 4 months ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20181217200444.14812-1-aleksandar.markovic@rt-rk.com
target/mips/translate.c | 954 +++++++++++++++++++++++++++++++++++-----
1 file changed, 850 insertions(+), 104 deletions(-)
[Qemu-devel] [PATCH 0/6] target/mips: Amend MXU support
Posted by Aleksandar Markovic 5 years, 4 months ago
From: Aleksandar Markovic <amarkovic@wavecomp.com>

Various updates to MXU ASE support.

Aleksandar Markovic (6):
  target/mips: MXU: Add missing opcodes/decoding for LX* instructions
  target/mips: MXU: Add generic naming for optn2 constants
  target/mips: MXU: Improve textual description
  target/mips: MXU: Add handlers for logic instructions
  target/mips: MXU: Add handlers for max/min instructions
  target/mips: MXU: Add handlers for an align instruction

 target/mips/translate.c | 954 +++++++++++++++++++++++++++++++++++-----
 1 file changed, 850 insertions(+), 104 deletions(-)

-- 
2.17.1


Re: [Qemu-devel] [PATCH 0/6] target/mips: Amend MXU support
Posted by Aleksandar Markovic 5 years, 3 months ago
> From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
> Subject: [PATCH 0/6] target/mips: Amend MXU support
> 
> From: Aleksandar Markovic <amarkovic@wavecomp.com>
> 
> Various updates to MXU ASE support.
> 
> Aleksandar Markovic (6):
>  target/mips: MXU: Add missing opcodes/decoding for LX* instructions
>  target/mips: MXU: Add generic naming for optn2 constants
>  target/mips: MXU: Improve textual description
>  target/mips: MXU: Add handlers for logic instructions
>  target/mips: MXU: Add handlers for max/min instructions
>  target/mips: MXU: Add handlers for an align instruction

If there is no objection, to get things going a little, I am going to integrate patches 1, 2, and 3 into next MIPS pull request (scheduled shortly), while it looks other patches need more time for review.

(patch 1 is about "pool 17", issues around "pool 16" will be covered in a separate patch in v2)

Thanks to everyone,
Aleksandar
Re: [Qemu-devel] [PATCH 0/6] target/mips: Amend MXU support
Posted by Aleksandar Markovic 5 years, 3 months ago
> From: Aleksandar Markovic
> Subject: Re: [PATCH 0/6] target/mips: Amend MXU support
> 
> > From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
> > Subject: [PATCH 0/6] target/mips: Amend MXU support
> >
> > From: Aleksandar Markovic <amarkovic@wavecomp.com>
> >
> > Various updates to MXU ASE support.
> >
> > Aleksandar Markovic (6):
> >  target/mips: MXU: Add missing opcodes/decoding for LX* instructions
> >  target/mips: MXU: Add generic naming for optn2 constants
> >  target/mips: MXU: Improve textual description
> >  target/mips: MXU: Add handlers for logic instructions
> >  target/mips: MXU: Add handlers for max/min instructions
> >  target/mips: MXU: Add handlers for an align instruction
> 
> If there is no objection, to get things going a little, I am going to integrate patches 1, 2, and 3 into next MIPS > pull request (scheduled shortly), while it looks other patches need more time for review.
> 
> (patch 1 is about "pool 17", issues around "pool 16" will be covered in a separate patch in v2)
> 

I was told that comparing test runs on hardware and emulation
didn't point to any issue other than those mentioned in previous
responses (by Craig). I may try to integrate remaining three
patches too (with fixes for discovered issues).

> Thanks to everyone,
> Aleksandar