The conversion to gvec is by no means complete, but it brings aa32
to parity with the work already done for aa64. Plus some misc changes,
at least one of which has been sitting on a branch for 2 years. ;-P
I've run the result through Alex's aarch32-all.tar.xz RISU tests.
There are no regressions, though there are pre-existing failures.
Our aa32 translator could use some additional work, no surprise.
r~
Richard Henderson (20):
target/arm: Hoist address increment for vector memory ops
target/arm: Don't call tcg_clear_temp_count
target/arm: Use tcg_gen_gvec_dup_i64 for LD[1-4]R
target/arm: Promote consecutive memory ops for aa64
target/arm: Mark some arrays const
target/arm: Use gvec for NEON VDUP
target/arm: Use gvec for NEON VMOV, VMVN, VBIC & VORR (immediate)
target/arm: Use gvec for NEON_3R_LOGIC insns
target/arm: Use gvec for NEON_3R_VADD_VSUB insns
target/arm: Use gvec for NEON_2RM_VMN, NEON_2RM_VNEG
target/arm: Use gvec for NEON_3R_VMUL
target/arm: Use gvec for VSHR, VSHL
target/arm: Use gvec for VSRA
target/arm: Use gvec for VSRI, VSLI
target/arm: Use gvec for NEON_3R_VML
target/arm: Use gvec for NEON_3R_VTST_VCEQ, NEON_3R_VCGT, NEON_3R_VCGE
target/arm: Use gvec for NEON VLD all lanes
target/arm: Reorg NEON VLD/VST all elements
target/arm: Promote consecutive memory ops for aa32
target/arm: Reorg NEON VLD/VST single element to one lane
target/arm/translate.h | 14 +-
target/arm/translate-a64.c | 570 ++-------------
target/arm/translate.c | 1390 ++++++++++++++++++++++++------------
3 files changed, 979 insertions(+), 995 deletions(-)
--
2.17.1