v2: use "unsigned int" instead of "uint".

thanks
-- PMM
 
The following changes since commit 506e4a00de01e0b29fa83db5cbbc3d154253b4ea:

  Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.1-20180925' into staging (2018-09-25 13:30:45 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180925-1

for you to fetch changes up to 060a65df056a5d6ca3a6a91e7bf150ca1fbccddf:

  target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode (2018-09-25 15:13:24 +0100)

----------------------------------------------------------------
target-arm queue:
 * target/arm: Fix cpu_get_tb_cpu_state() for non-SVE CPUs
 * hw/arm/exynos4210: fix Exynos4210 UART support
 * hw/arm/virt-acpi-build: Add a check for memory-less NUMA nodes
 * arm: Add BBC micro:bit machine
 * aspeed/i2c: Fix interrupt handling bugs
 * hw/arm/smmu-common: Fix the name of the iommu memory regions
 * hw/arm/smmuv3: fix eventq recording and IRQ triggerring
 * hw/intc/arm_gic: Document QEMU interface
 * hw/intc/arm_gic: Drop GIC_BASE_IRQ macro
 * hw/net/pcnet-pci: Convert away from old_mmio accessors
 * hw/timer/cmsdk-apb-dualtimer: Add missing 'break' statements
 * aspeed/timer: fix compile breakage with clang 3.4.2
 * hw/arm/aspeed: change the FMC flash model of the AST2500 evb
 * hw/arm/aspeed: Minor code cleanups
 * target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode

----------------------------------------------------------------
Bartlomiej Zolnierkiewicz (1):
      hw/arm/exynos4210: fix Exynos4210 UART support

Cédric Le Goater (5):
      aspeed/i2c: interrupts should be cleared by software only
      aspeed/timer: fix compile breakage with clang 3.4.2
      hw/arm/aspeed: change the FMC flash model of the AST2500 evb
      hw/arm/aspeed: Add an Aspeed machine class
      aspeed/smc: fix some alignment issues

Eric Auger (2):
      hw/arm/smmu-common: Fix the name of the iommu memory regions
      hw/arm/smmuv3: fix eventq recording and IRQ triggerring

Guenter Roeck (2):
      aspeed/i2c: Handle receive command in separate function
      aspeed/i2c: Fix receive done interrupt handling

Joel Stanley (3):
      MAINTAINERS: Add NRF51 entry
      arm: Add Nordic Semiconductor nRF51 SoC
      arm: Add BBC micro:bit machine

Peter Maydell (6):
      hw/intc/arm_gic: Document QEMU interface
      hw/intc/arm_gic: Drop GIC_BASE_IRQ macro
      hw/net/pcnet-pci: Convert away from old_mmio accessors
      hw/net/pcnet-pci: Unify pcnet_ioport_read/write and pcnet_mmio_read/write
      hw/timer/cmsdk-apb-dualtimer: Add missing 'break' statements
      target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode

Richard Henderson (1):
      target/arm: Fix cpu_get_tb_cpu_state() for non-SVE CPUs

Shannon Zhao (1):
      hw/arm/virt-acpi-build: Add a check for memory-less NUMA nodes

 hw/arm/Makefile.objs            |   1 +
 hw/arm/smmuv3-internal.h        |  26 ++---
 hw/intc/gic_internal.h          |   2 -
 include/hw/arm/aspeed.h         |  46 +++++++++
 include/hw/arm/nrf51_soc.h      |  41 ++++++++
 include/hw/intc/arm_gic.h       |  43 ++++++++
 include/hw/timer/aspeed_timer.h |   3 +-
 hw/arm/aspeed.c                 | 212 +++++++++++++---------------------------
 hw/arm/exynos4210.c             |   8 +-
 hw/arm/microbit.c               |  67 +++++++++++++
 hw/arm/nrf51_soc.c              | 133 +++++++++++++++++++++++++
 hw/arm/smmu-common.c            |   6 +-
 hw/arm/smmuv3.c                 |   2 +-
 hw/arm/virt-acpi-build.c        |  10 +-
 hw/i2c/aspeed_i2c.c             |  63 ++++++++----
 hw/intc/arm_gic.c               |  31 +++---
 hw/intc/arm_gic_common.c        |   1 -
 hw/net/pcnet-pci.c              |  98 ++-----------------
 hw/ssi/aspeed_smc.c             |   8 +-
 hw/timer/aspeed_timer.c         |   1 -
 hw/timer/cmsdk-apb-dualtimer.c  |   2 +
 target/arm/cpu.c                |  14 ++-
 target/arm/helper.c             |  45 +++++----
 MAINTAINERS                     |   8 ++
 default-configs/arm-softmmu.mak |   1 +
 hw/net/trace-events             |   6 --
 26 files changed, 542 insertions(+), 336 deletions(-)
 create mode 100644 include/hw/arm/aspeed.h
 create mode 100644 include/hw/arm/nrf51_soc.h
 create mode 100644 hw/arm/microbit.c
 create mode 100644 hw/arm/nrf51_soc.c

On 25 September 2018 at 15:23, Peter Maydell <peter.maydell@linaro.org> wrote:
> v2: use "unsigned int" instead of "uint".
>
> thanks
> -- PMM
>
> The following changes since commit 506e4a00de01e0b29fa83db5cbbc3d154253b4ea:
>
>   Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.1-20180925' into staging (2018-09-25 13:30:45 +0100)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180925-1
>
> for you to fetch changes up to 060a65df056a5d6ca3a6a91e7bf150ca1fbccddf:
>
>   target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode (2018-09-25 15:13:24 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
>  * target/arm: Fix cpu_get_tb_cpu_state() for non-SVE CPUs
>  * hw/arm/exynos4210: fix Exynos4210 UART support
>  * hw/arm/virt-acpi-build: Add a check for memory-less NUMA nodes
>  * arm: Add BBC micro:bit machine
>  * aspeed/i2c: Fix interrupt handling bugs
>  * hw/arm/smmu-common: Fix the name of the iommu memory regions
>  * hw/arm/smmuv3: fix eventq recording and IRQ triggerring
>  * hw/intc/arm_gic: Document QEMU interface
>  * hw/intc/arm_gic: Drop GIC_BASE_IRQ macro
>  * hw/net/pcnet-pci: Convert away from old_mmio accessors
>  * hw/timer/cmsdk-apb-dualtimer: Add missing 'break' statements
>  * aspeed/timer: fix compile breakage with clang 3.4.2
>  * hw/arm/aspeed: change the FMC flash model of the AST2500 evb
>  * hw/arm/aspeed: Minor code cleanups
>  * target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode
>

Applied, thanks.

-- PMM