optimize various tcg_gen() functions using extract/deposit op

[Qemu-devel] [PATCH v5 03/10] target/arm: optimize aarch64 rev16() using extract op

Posted by Philippe Mathieu-Daudé 8 years, 6 months ago

Aurelien Jarno denoted this function could be implemented more effectively using
the aarch32 rev16() pattern.
  [http://lists.nongnu.org/archive/html/qemu-devel/2017-05/msg03180.html]

Done with the Coccinelle semantic patch from commit 58daf05d07dd
    (see scripts/coccinelle/tcg_gen_extract.cocci)

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
Richard: maybe you need to update 58daf05d07dd to your commit...

 target/arm/translate-a64.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index e55547d95d..8ade865481 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -4046,14 +4046,12 @@ static void handle_rev16(DisasContext *s, unsigned int sf,
     tcg_gen_andi_i64(tcg_tmp, tcg_rn, 0xffff);
     tcg_gen_bswap16_i64(tcg_rd, tcg_tmp);
 
-    tcg_gen_shri_i64(tcg_tmp, tcg_rn, 16);
-    tcg_gen_andi_i64(tcg_tmp, tcg_tmp, 0xffff);
+    tcg_gen_extract_i64(tcg_tmp, tcg_rn, 16, 16);
     tcg_gen_bswap16_i64(tcg_tmp, tcg_tmp);
     tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, 16, 16);
 
     if (sf) {
-        tcg_gen_shri_i64(tcg_tmp, tcg_rn, 32);
-        tcg_gen_andi_i64(tcg_tmp, tcg_tmp, 0xffff);
+        tcg_gen_extract_i64(tcg_tmp, tcg_rn, 32, 16);
         tcg_gen_bswap16_i64(tcg_tmp, tcg_tmp);
         tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, 32, 16);
 
-- 
2.13.2

Re: [Qemu-devel] [PATCH v5 03/10] target/arm: optimize aarch64 rev16() using extract op

Posted by Richard Henderson 8 years, 6 months ago

On 07/17/2017 06:55 PM, Philippe Mathieu-Daudé wrote:
> Aurelien Jarno denoted this function could be implemented more effectively using
> the aarch32 rev16() pattern.
>    [http://lists.nongnu.org/archive/html/qemu-devel/2017-05/msg03180.html]
> 
> Done with the Coccinelle semantic patch from commit 58daf05d07dd
>      (see scripts/coccinelle/tcg_gen_extract.cocci)
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

I'm dropping this patch and replacing it with the much smaller code mentioned 
in the message quoted above.


r~

Re: [Qemu-devel] [PATCH v5 03/10] target/arm: optimize aarch64 rev16() using extract op

Posted by Aurelien Jarno 8 years, 6 months ago

On 2017-07-17 20:25, Richard Henderson wrote:
> On 07/17/2017 06:55 PM, Philippe Mathieu-Daudé wrote:
> > Aurelien Jarno denoted this function could be implemented more effectively using
> > the aarch32 rev16() pattern.
> >    [http://lists.nongnu.org/archive/html/qemu-devel/2017-05/msg03180.html]
> > 
> > Done with the Coccinelle semantic patch from commit 58daf05d07dd
> >      (see scripts/coccinelle/tcg_gen_extract.cocci)
> > 
> > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> 
> I'm dropping this patch and replacing it with the much smaller code
> mentioned in the message quoted above.

In that case, could you also get the corresponding aarch32 patch:
http://lists.nongnu.org/archive/html/qemu-devel/2017-05/msg03887.html

It has already been reviewed.

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net

Re: [Qemu-devel] [PATCH v5 03/10] target/arm: optimize aarch64 rev16() using extract op

Posted by Richard Henderson 8 years, 6 months ago

On 07/17/2017 09:14 PM, Aurelien Jarno wrote:
> On 2017-07-17 20:25, Richard Henderson wrote:
>> On 07/17/2017 06:55 PM, Philippe Mathieu-Daudé wrote:
>>> Aurelien Jarno denoted this function could be implemented more effectively using
>>> the aarch32 rev16() pattern.
>>>     [http://lists.nongnu.org/archive/html/qemu-devel/2017-05/msg03180.html]
>>>
>>> Done with the Coccinelle semantic patch from commit 58daf05d07dd
>>>       (see scripts/coccinelle/tcg_gen_extract.cocci)
>>>
>>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>>
>> I'm dropping this patch and replacing it with the much smaller code
>> mentioned in the message quoted above.
> 
> In that case, could you also get the corresponding aarch32 patch:
> http://lists.nongnu.org/archive/html/qemu-devel/2017-05/msg03887.html
> 
> It has already been reviewed.
> 
Done.


r~

Re: [Qemu-devel] [PATCH v5 03/10] target/arm: optimize aarch64 rev16() using extract op

Posted by Eric Blake 8 years, 6 months ago

On 07/17/2017 11:55 PM, Philippe Mathieu-Daudé wrote:
> Aurelien Jarno denoted this function could be implemented more effectively using
> the aarch32 rev16() pattern.
>   [http://lists.nongnu.org/archive/html/qemu-devel/2017-05/msg03180.html]
> 
> Done with the Coccinelle semantic patch from commit 58daf05d07dd

This commit id is not stable, unless it gets merged as a PULL request
from you.  When submitting a series, it's okay to just refer to "the
previous patch" or "an earlier patch" without a commit id, especially if
you know your patch will go through a different maintainer (and thus
change id's the moment it is modified to add an R-b or S-o-b).

>     (see scripts/coccinelle/tcg_gen_extract.cocci)
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> Richard: maybe you need to update 58daf05d07dd to your commit...

Indeed, you already noticed that the maintainer has to do more work to
rewrite any commit messages that refer to mid-series patch ids.

-- 
Eric Blake, Principal Software Engineer
Red Hat, Inc.           +1-919-301-3266
Virtualization:  qemu.org | libvirt.org