[PATCH qemu 07/13] target/riscv: rvv: Add tail agnostic for vector integer comparison instructions

~eopxd posted 13 patches 3 years, 10 months ago
Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bin.meng@windriver.com>
There is a newer version of this series
[PATCH qemu 07/13] target/riscv: rvv: Add tail agnostic for vector integer comparison instructions
Posted by ~eopxd 3 years, 11 months ago
From: eopXD <eop.chen@sifive.com>

Signed-off-by: eop Chen <eop.chen@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
---
 target/riscv/vector_helper.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 6d79908ffe..9a08d14689 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -1317,6 +1317,9 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2,   \
 {                                                             \
     uint32_t vm = vext_vm(desc);                              \
     uint32_t vl = env->vl;                                    \
+    uint32_t vlmax =                                          \
+        vext_get_vlmax(env_archcpu(env), env->vtype);         \
+    uint32_t vta = vext_vta(desc);                            \
     uint32_t i;                                               \
                                                               \
     for (i = env->vstart; i < vl; i++) {                      \
@@ -1328,6 +1331,12 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2,   \
         vext_set_elem_mask(vd, i, DO_OP(s2, s1));             \
     }                                                         \
     env->vstart = 0;                                          \
+    /* clear tail element */                                  \
+    if (vta) {                                                \
+        for (; i < vlmax; i++) {                              \
+            vext_set_elem_mask(vd, i, 1);                     \
+        }                                                     \
+    }                                                         \
 }
 
 GEN_VEXT_CMP_VV(vmseq_vv_b, uint8_t,  H1, DO_MSEQ)
@@ -1366,6 +1375,9 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2,   \
 {                                                                   \
     uint32_t vm = vext_vm(desc);                                    \
     uint32_t vl = env->vl;                                          \
+    uint32_t vlmax =                                                \
+        vext_get_vlmax(env_archcpu(env), env->vtype);               \
+    uint32_t vta = vext_vta(desc);                                  \
     uint32_t i;                                                     \
                                                                     \
     for (i = env->vstart; i < vl; i++) {                            \
@@ -1377,6 +1389,12 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2,   \
                 DO_OP(s2, (ETYPE)(target_long)s1));                 \
     }                                                               \
     env->vstart = 0;                                                \
+    /* clear tail element */                                        \
+    if (vta) {                                                      \
+        for (; i < vlmax; i++) {                                    \
+            vext_set_elem_mask(vd, i, 1);                           \
+        }                                                           \
+    }                                                               \
 }
 
 GEN_VEXT_CMP_VX(vmseq_vx_b, uint8_t,  H1, DO_MSEQ)
-- 
2.34.1
Re: [PATCH qemu 07/13] target/riscv: rvv: Add tail agnostic for vector integer comparison instructions
Posted by Weiwei Li 3 years, 10 months ago
在 2022/3/7 下午5:43, ~eopxd 写道:
> From: eopXD <eop.chen@sifive.com>
>
> Signed-off-by: eop Chen <eop.chen@sifive.com>
> Reviewed-by: Frank Chang <frank.chang@sifive.com>
> ---
>   target/riscv/vector_helper.c | 18 ++++++++++++++++++
>   1 file changed, 18 insertions(+)
>
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index 6d79908ffe..9a08d14689 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -1317,6 +1317,9 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2,   \
>   {                                                             \
>       uint32_t vm = vext_vm(desc);                              \
>       uint32_t vl = env->vl;                                    \
> +    uint32_t vlmax =                                          \
> +        vext_get_vlmax(env_archcpu(env), env->vtype);         \
> +    uint32_t vta = vext_vta(desc);                            \
>       uint32_t i;                                               \
>                                                                 \
>       for (i = env->vstart; i < vl; i++) {                      \
> @@ -1328,6 +1331,12 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2,   \
>           vext_set_elem_mask(vd, i, DO_OP(s2, s1));             \
>       }                                                         \
>       env->vstart = 0;                                          \
> +    /* clear tail element */                                  \
> +    if (vta) {                                                \
> +        for (; i < vlmax; i++) {                              \
> +            vext_set_elem_mask(vd, i, 1);                     \
> +        }                                                     \
> +    }                                                         \
>   }
>   

Why comment 'clear tail element' here?

"In addition, except for mask load instructions, any element in the tail 
of a mask result can also be written with the value the
mask-producing operation would have calculated with vl=VLMAX.

Furthermore, for mask-logical instructions and vmsbf.m,
vmsif.m, vmsof.m mask-manipulation instructions, any element in the tail 
of the result can be written with the value the
mask-producing operation would have calculated with vl=VLEN, SEW=8, and 
LMUL=8 (i.e., all bits of the mask register can
be overwritten)."

Regards,

Weiwei Li


>   GEN_VEXT_CMP_VV(vmseq_vv_b, uint8_t,  H1, DO_MSEQ)
> @@ -1366,6 +1375,9 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2,   \
>   {                                                                   \
>       uint32_t vm = vext_vm(desc);                                    \
>       uint32_t vl = env->vl;                                          \
> +    uint32_t vlmax =                                                \
> +        vext_get_vlmax(env_archcpu(env), env->vtype);               \
> +    uint32_t vta = vext_vta(desc);                                  \
>       uint32_t i;                                                     \
>                                                                       \
>       for (i = env->vstart; i < vl; i++) {                            \
> @@ -1377,6 +1389,12 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2,   \
>                   DO_OP(s2, (ETYPE)(target_long)s1));                 \
>       }                                                               \
>       env->vstart = 0;                                                \
> +    /* clear tail element */                                        \
> +    if (vta) {                                                      \
> +        for (; i < vlmax; i++) {                                    \
> +            vext_set_elem_mask(vd, i, 1);                           \
> +        }                                                           \
> +    }                                                               \
>   }
>   
>   GEN_VEXT_CMP_VX(vmseq_vx_b, uint8_t,  H1, DO_MSEQ)