From: Mateja Marjanovic <Mateja.Marjanovic@rt-rk.com>

Fix support for MSA instructions while executing QEMU on a
machine that uses big endian MIPS CPU. This is achieved by
changing the implementation of helpers for MSA instructions
ST.<B|H|W|D>, LD.<B|H|W|D>, INSERT.<B|H|W> (and D on MIPS64),
COPY_S.<B|H|W> (and D on MIPS64) and COPY_U.<B|H> (and W
on MIPS64). Instead of using a switch in a helper, which is
called many times, put a switch in translate.c file, which
is called only a few times and change the value of the
index if a host is a big endian machine.

v4:
 - Change the alignment, so it looks cleaner.
 - Change the commit messages and cover letter, so they
   are more understandable.

v3:
 - Unroll loops in ST.<B|H|W|D> and LD.<B|H|W|D>
   instructions.
 - Eliminate macro that generates the helpers for
   the ST.<B|H|W|D> and LD.<B|H|W|D> instructions,
   and add four helpers for each (for byte,
   halfword, word and doubleword).
 - Eliminate the helpers for INSERT.<B|H|W|D>,
   COPY_S.<B|H|W|D> and COPY_U.<B|H|W> and add
   four (three in case of COPY_U) helpers for
   each one.

v2:
 - Eliminate unreachable code in COPY_U.<B|H|W>
 - Add preprocessing conditionals (if host is MIPS64, check that case)
   in COPY_U.<B|H|W>, INSERT.<B|H|W|D>.

Mateja Marjanovic (5):
  target/mips: Fix MSA instructions LD.<B|H|W|D> on big endian host
  target/mips: Fix MSA instructions ST.<B|H|W|D> on big endian host
  target/mips: Refactor and fix COPY_S.<B|H|W|D> instructions
  target/mips: Refactor and fix COPY_U.<B|H|W> instructions
  target/mips: Refactor and fix INSERT.<B|H|W|D> instructions

 target/mips/helper.h     |  16 +-
 target/mips/msa_helper.c | 182 ++++++++++++++++-------
 target/mips/op_helper.c  | 376 ++++++++++++++++++++++++++++++++++++++++++-----
 target/mips/translate.c  |  59 +++++++-
 4 files changed, 533 insertions(+), 100 deletions(-)

-- 
2.7.4