More arm patches (mostly the SDHCI ones from Philippe)

The following changes since commit f521eeee3bd060b460c99e605472b7e03967db43:

Merge remote-tracking branch 'remotes/juanquintela/tags/migration/20180115' into staging (2018-01-15 13:17:47 +0000)

are available in the git repository at:

git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180116

for you to fetch changes up to 60765b6ceeb4998a0d4220b3a53f1f185061da77:

sdhci: add a 'dma' property to the sysbus devices (2018-01-16 13:28:21 +0000)

* SDHCI: cleanups and minor bug fixes

* target/arm: minor refactor preparatory to fp16 support

* omap_ssd, ssi-sd, pl181, milkymist-memcard: reset the SD

card on controller reset (fixes migration failures)

* target/arm: Handle page table walk load failures correctly

* hw/arm/virt: Add virt-2.12 machine type

* get_phys_addr_pmsav7: Support AP=0b111 for v7M

* hw/intc/armv7m: Support byte and halfword accesses to CFSR

Andrey Smirnov (1):

sdhci: Implement write method of ACMD12ERRSTS register

Peter Maydell (8):

hw/intc/armv7m: Support byte and halfword accesses to CFSR

get_phys_addr_pmsav7: Support AP=0b111 for v7M

hw/arm/virt: Add virt-2.12 machine type

target/arm: Handle page table walk load failures correctly

hw/sd/pl181: Reset SD card on controller reset

hw/sd/milkymist-memcard: Reset SD card on controller reset

hw/sd/ssi-sd: Reset SD card on controller reset

hw/sd/omap_mmc: Reset SD card on controller reset

Philippe Mathieu-Daudé (13):

sdhci: clean up includes

sdhci: remove dead code

sdhci: use DEFINE_SDHCI_COMMON_PROPERTIES() for common sysbus/pci properties

sdhci: refactor common sysbus/pci class_init() into sdhci_common_class_init()

sdhci: refactor common sysbus/pci realize() into sdhci_common_realize()

sdhci: refactor common sysbus/pci unrealize() into sdhci_common_unrealize()

sdhci: use qemu_log_mask(UNIMP) instead of fprintf()

sdhci: convert the DPRINT() calls into trace events

sdhci: move MASK_TRNMOD with other SDHC_TRN* defines in "sd-internal.h"

sdhci: rename the SDHC_CAPAB register

sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only

sdhci: fix the PCI device, using the PCI address space for DMA

sdhci: add a 'dma' property to the sysbus devices

Richard Henderson (2):

target/arm: Split out vfp_expand_imm

target/arm: Add fp16 support to vfp_expand_imm

hw/sd/sdhci-internal.h | 7 +-

include/hw/sd/sdhci.h | 19 +++-

target/arm/internals.h | 10 ++

hw/arm/virt.c | 19 +++-

hw/intc/armv7m_nvic.c | 38 ++++---

hw/sd/milkymist-memcard.c | 4 +

hw/sd/omap_mmc.c | 14 ++-

hw/sd/pl181.c | 4 +

hw/sd/sdhci.c | 266 +++++++++++++++++++++++++++------------------

hw/sd/ssi-sd.c | 25 ++++-

target/arm/helper.c | 53 ++++++++-

target/arm/op_helper.c | 7 +-

target/arm/translate-a64.c | 49 ++++++---

hw/sd/trace-events | 14 +++

14 files changed, 362 insertions(+), 167 deletions(-)

Add virt-2.12 machine type.

hw/arm/virt.c | 19 +++++++++++++++++--

1 file changed, 17 insertions(+), 2 deletions(-)

@@ -XXX,XX +XXX,XX @@ static void machvirt_machine_init(void)

}

type_init(machvirt_machine_init);

-static void virt_2_11_instance_init(Object *obj)

+static void virt_2_12_instance_init(Object *obj)

{

VirtMachineState *vms = VIRT_MACHINE(obj);

VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);

@@ -XXX,XX +XXX,XX @@ static void virt_2_11_instance_init(Object *obj)

vms->irqmap = a15irqmap;

}

+static void virt_machine_2_12_options(MachineClass *mc)

+{

+}

+DEFINE_VIRT_MACHINE_AS_LATEST(2, 12)

+#define VIRT_COMPAT_2_11 \

+ HW_COMPAT_2_11

+

+static void virt_2_11_instance_init(Object *obj)

+{

+ virt_2_12_instance_init(obj);

+}

+

static void virt_machine_2_11_options(MachineClass *mc)

{

+ virt_machine_2_12_options(mc);

+ SET_MACHINE_COMPAT(mc, VIRT_COMPAT_2_11);

}

-DEFINE_VIRT_MACHINE_AS_LATEST(2, 11)

+DEFINE_VIRT_MACHINE(2, 11)

#define VIRT_COMPAT_2_10 \

HW_COMPAT_2_10

2.7.4

From: Richard Henderson <richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

Message-id: 20180110063337.21538-2-richard.henderson@linaro.org

target/arm/translate-a64.c | 44 ++++++++++++++++++++++++++++----------------

1 file changed, 28 insertions(+), 16 deletions(-)

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c

--- a/target/arm/translate-a64.c

+++ b/target/arm/translate-a64.c

@@ -XXX,XX +XXX,XX @@ static void disas_fp_3src(DisasContext *s, uint32_t insn)

}

+/* The imm8 encodes the sign bit, enough bits to represent an exponent in

+ * the range 01....1xx to 10....0xx, and the most significant 4 bits of

+ * the mantissa; see VFPExpandImm() in the v8 ARM ARM.

+ */

+static uint64_t vfp_expand_imm(int size, uint8_t imm8)

+ uint64_t imm;

+ switch (size) {

+ case MO_64:

+ imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) |

+ (extract32(imm8, 6, 1) ? 0x3fc0 : 0x4000) |

+ extract32(imm8, 0, 6);

+ imm <<= 48;

+ break;

+ case MO_32:

+ imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) |

+ (extract32(imm8, 6, 1) ? 0x3e00 : 0x4000) |

+ (extract32(imm8, 0, 6) << 3);

+ imm <<= 16;

+ break;

+ default:

+ g_assert_not_reached();

/* Floating point immediate

* 31 30 29 28 24 23 22 21 20 13 12 10 9 5 4 0

* +---+---+---+-----------+------+---+------------+-------+------+------+

@@ -XXX,XX +XXX,XX @@ static void disas_fp_imm(DisasContext *s, uint32_t insn)

return;

}

- /* The imm8 encodes the sign bit, enough bits to represent

- * an exponent in the range 01....1xx to 10....0xx,

- * and the most significant 4 bits of the mantissa; see

- * VFPExpandImm() in the v8 ARM ARM.

- */

- if (is_double) {

- imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) |

- (extract32(imm8, 6, 1) ? 0x3fc0 : 0x4000) |

- extract32(imm8, 0, 6);

- imm <<= 48;

- } else {

- imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) |

- (extract32(imm8, 6, 1) ? 0x3e00 : 0x4000) |

- (extract32(imm8, 0, 6) << 3);

- imm <<= 16;

- }

+ imm = vfp_expand_imm(MO_32 + is_double, imm8);

tcg_res = tcg_const_i64(imm);

write_fp_dreg(s, rd, tcg_res);

2.7.4

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

zero-initialize ADMADescr 'dscr' in sdhci_do_adma() to avoid:

hw/sd/sdhci.c: In function ‘sdhci_do_adma’:

hw/sd/sdhci.c:714:29: error: ‘dscr.addr’ may be used uninitialized in this function [-Werror=maybe-uninitialized]

trace_sdhci_adma("link", s->admasysaddr);

^

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Acked-by: Alistair Francis <alistair.francis@xilinx.com>

Message-id: 20180115182436.2066-9-f4bug@amsat.org

hw/sd/sdhci.c | 89 ++++++++++++++++++------------------------------------

hw/sd/trace-events | 14 +++++++++

2 files changed, 44 insertions(+), 59 deletions(-)

diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c

--- a/hw/sd/sdhci.c

+++ b/hw/sd/sdhci.c

#include "sdhci-internal.h"

#include "qapi/error.h"

#include "qemu/log.h"

-

-/* host controller debug messages */

-#ifndef SDHC_DEBUG

-#define SDHC_DEBUG 0

-#endif

-

-#define DPRINT_L1(fmt, args...) \

- do { \

- if (SDHC_DEBUG) { \

- fprintf(stderr, "QEMU SDHC: " fmt, ## args); \

- } \

- } while (0)

-#define DPRINT_L2(fmt, args...) \

- do { \

- if (SDHC_DEBUG > 1) { \

- fprintf(stderr, "QEMU SDHC: " fmt, ## args); \

- } \

- } while (0)

-#define ERRPRINT(fmt, args...) \

- do { \

- if (SDHC_DEBUG) { \

- fprintf(stderr, "QEMU SDHC ERROR: " fmt, ## args); \

- } \

- } while (0)

+#include "trace.h"

#define TYPE_SDHCI_BUS "sdhci-bus"

#define SDHCI_BUS(obj) OBJECT_CHECK(SDBus, (obj), TYPE_SDHCI_BUS)

@@ -XXX,XX +XXX,XX @@ static void sdhci_raise_insertion_irq(void *opaque)

static void sdhci_set_inserted(DeviceState *dev, bool level)

SDHCIState *s = (SDHCIState *)dev;

- DPRINT_L1("Card state changed: %s!\n", level ? "insert" : "eject");

+ trace_sdhci_set_inserted(level ? "insert" : "eject");

if ((s->norintsts & SDHC_NIS_REMOVE) && level) {

/* Give target some time to notice card ejection */

timer_mod(s->insert_timer,

@@ -XXX,XX +XXX,XX @@ static void sdhci_send_command(SDHCIState *s)

s->acmd12errsts = 0;

request.cmd = s->cmdreg >> 8;

request.arg = s->argument;

- DPRINT_L1("sending CMD%u ARG[0x%08x]\n", request.cmd, request.arg);

+ trace_sdhci_send_command(request.cmd, request.arg);

rlen = sdbus_do_command(&s->sdbus, &request, response);

if (s->cmdreg & SDHC_CMD_RESPONSE) {

@@ -XXX,XX +XXX,XX @@ static void sdhci_send_command(SDHCIState *s)

s->rspreg[0] = (response[0] << 24) | (response[1] << 16) |

(response[2] << 8) | response[3];

s->rspreg[1] = s->rspreg[2] = s->rspreg[3] = 0;

- DPRINT_L1("Response: RSPREG[31..0]=0x%08x\n", s->rspreg[0]);

+ trace_sdhci_response4(s->rspreg[0]);

} else if (rlen == 16) {

s->rspreg[0] = (response[11] << 24) | (response[12] << 16) |

(response[13] << 8) | response[14];

@@ -XXX,XX +XXX,XX @@ static void sdhci_send_command(SDHCIState *s)

(response[5] << 8) | response[6];

s->rspreg[3] = (response[0] << 16) | (response[1] << 8) |

response[2];

- DPRINT_L1("Response received:\n RSPREG[127..96]=0x%08x, RSPREG[95.."

- "64]=0x%08x,\n RSPREG[63..32]=0x%08x, RSPREG[31..0]=0x%08x\n",

- s->rspreg[3], s->rspreg[2], s->rspreg[1], s->rspreg[0]);

+ trace_sdhci_response16(s->rspreg[3], s->rspreg[2],

+ s->rspreg[1], s->rspreg[0]);

} else {

- ERRPRINT("Timeout waiting for command response\n");

+ trace_sdhci_error("timeout waiting for command response");

if (s->errintstsen & SDHC_EISEN_CMDTIMEOUT) {

s->errintsts |= SDHC_EIS_CMDTIMEOUT;

s->norintsts |= SDHC_NIS_ERR;

@@ -XXX,XX +XXX,XX @@ static void sdhci_end_transfer(SDHCIState *s)

request.cmd = 0x0C;

request.arg = 0;

- DPRINT_L1("Automatically issue CMD%d %08x\n", request.cmd, request.arg);

+ trace_sdhci_end_transfer(request.cmd, request.arg);

sdbus_do_command(&s->sdbus, &request, response);

/* Auto CMD12 response goes to the upper Response register */

s->rspreg[3] = (response[0] << 24) | (response[1] << 16) |

@@ -XXX,XX +XXX,XX @@ static uint32_t sdhci_read_dataport(SDHCIState *s, unsigned size)

/* first check that a valid data exists in host controller input buffer */

if ((s->prnsts & SDHC_DATA_AVAILABLE) == 0) {

- ERRPRINT("Trying to read from empty buffer\n");

+ trace_sdhci_error("read from empty buffer");

return 0;

@@ -XXX,XX +XXX,XX @@ static uint32_t sdhci_read_dataport(SDHCIState *s, unsigned size)

s->data_count++;

/* check if we've read all valid data (blksize bytes) from buffer */

if ((s->data_count) >= (s->blksize & 0x0fff)) {

- DPRINT_L2("All %u bytes of data have been read from input buffer\n",

- s->data_count);

+ trace_sdhci_read_dataport(s->data_count);

s->prnsts &= ~SDHC_DATA_AVAILABLE; /* no more data in a buffer */

s->data_count = 0; /* next buff read must start at position [0] */

@@ -XXX,XX +XXX,XX @@ static void sdhci_write_dataport(SDHCIState *s, uint32_t value, unsigned size)

/* Check that there is free space left in a buffer */

if (!(s->prnsts & SDHC_SPACE_AVAILABLE)) {

- ERRPRINT("Can't write to data buffer: buffer full\n");

+ trace_sdhci_error("Can't write to data buffer: buffer full");

return;

}

@@ -XXX,XX +XXX,XX @@ static void sdhci_write_dataport(SDHCIState *s, uint32_t value, unsigned size)

s->data_count++;

value >>= 8;

if (s->data_count >= (s->blksize & 0x0fff)) {

- DPRINT_L2("write buffer filled with %u bytes of data\n",

- s->data_count);

+ trace_sdhci_write_dataport(s->data_count);

s->data_count = 0;

s->prnsts &= ~SDHC_SPACE_AVAILABLE;

if (s->prnsts & SDHC_DOING_WRITE) {

@@ -XXX,XX +XXX,XX @@ static void sdhci_do_adma(SDHCIState *s)

{

unsigned int n, begin, length;

const uint16_t block_size = s->blksize & 0x0fff;

- ADMADescr dscr;

+ ADMADescr dscr = {};

int i;

for (i = 0; i < SDHC_ADMA_DESCS_PER_DELAY; ++i) {

s->admaerr &= ~SDHC_ADMAERR_LENGTH_MISMATCH;

get_adma_description(s, &dscr);

- DPRINT_L2("ADMA loop: addr=" TARGET_FMT_plx ", len=%d, attr=%x\n",

- dscr.addr, dscr.length, dscr.attr);

+ trace_sdhci_adma_loop(dscr.addr, dscr.length, dscr.attr);

if ((dscr.attr & SDHC_ADMA_ATTR_VALID) == 0) {

/* Indicate that error occurred in ST_FDS state */

@@ -XXX,XX +XXX,XX @@ static void sdhci_do_adma(SDHCIState *s)

break;

case SDHC_ADMA_ATTR_ACT_LINK: /* link to next descriptor table */

s->admasysaddr = dscr.addr;

- DPRINT_L1("ADMA link: admasysaddr=0x%" PRIx64 "\n",

- s->admasysaddr);

+ trace_sdhci_adma("link", s->admasysaddr);

break;

default:

s->admasysaddr += dscr.incr;

@@ -XXX,XX +XXX,XX @@ static void sdhci_do_adma(SDHCIState *s)

}

if (dscr.attr & SDHC_ADMA_ATTR_INT) {

- DPRINT_L1("ADMA interrupt: admasysaddr=0x%" PRIx64 "\n",

- s->admasysaddr);

+ trace_sdhci_adma("interrupt", s->admasysaddr);

if (s->norintstsen & SDHC_NISEN_DMA) {

s->norintsts |= SDHC_NIS_DMA;

}

@@ -XXX,XX +XXX,XX @@ static void sdhci_do_adma(SDHCIState *s)

/* ADMA transfer terminates if blkcnt == 0 or by END attribute */

if (((s->trnmod & SDHC_TRNS_BLK_CNT_EN) &&

(s->blkcnt == 0)) || (dscr.attr & SDHC_ADMA_ATTR_END)) {

- DPRINT_L2("ADMA transfer completed\n");

+ trace_sdhci_adma_transfer_completed();

if (length || ((dscr.attr & SDHC_ADMA_ATTR_END) &&

(s->trnmod & SDHC_TRNS_BLK_CNT_EN) &&

s->blkcnt != 0)) {

- ERRPRINT("SD/MMC host ADMA length mismatch\n");

+ trace_sdhci_error("SD/MMC host ADMA length mismatch");

s->admaerr |= SDHC_ADMAERR_LENGTH_MISMATCH |

SDHC_ADMAERR_STATE_ST_TFR;

if (s->errintstsen & SDHC_EISEN_ADMAERR) {

- ERRPRINT("Set ADMA error flag\n");

+ trace_sdhci_error("Set ADMA error flag");

s->errintsts |= SDHC_EIS_ADMAERR;

s->norintsts |= SDHC_NIS_ERR;

}

@@ -XXX,XX +XXX,XX @@ static void sdhci_data_transfer(void *opaque)

break;

case SDHC_CTRL_ADMA1_32:

if (!(s->capareg & SDHC_CAN_DO_ADMA1)) {

- ERRPRINT("ADMA1 not supported\n");

+ trace_sdhci_error("ADMA1 not supported");

break;

}

@@ -XXX,XX +XXX,XX @@ static void sdhci_data_transfer(void *opaque)

break;

case SDHC_CTRL_ADMA2_32:

if (!(s->capareg & SDHC_CAN_DO_ADMA2)) {

- ERRPRINT("ADMA2 not supported\n");

+ trace_sdhci_error("ADMA2 not supported");

break;

}

@@ -XXX,XX +XXX,XX @@ static void sdhci_data_transfer(void *opaque)

case SDHC_CTRL_ADMA2_64:

if (!(s->capareg & SDHC_CAN_DO_ADMA2) ||

!(s->capareg & SDHC_64_BIT_BUS_SUPPORT)) {

- ERRPRINT("64 bit ADMA not supported\n");

+ trace_sdhci_error("64 bit ADMA not supported");

break;

}

sdhci_do_adma(s);

break;

default:

- ERRPRINT("Unsupported DMA type\n");

+ trace_sdhci_error("Unsupported DMA type");

break;

}

} else {

@@ -XXX,XX +XXX,XX @@ static inline bool

sdhci_buff_access_is_sequential(SDHCIState *s, unsigned byte_num)

{

if ((s->data_count & 0x3) != byte_num) {

- ERRPRINT("Non-sequential access to Buffer Data Port register"

- "is prohibited\n");

+ trace_sdhci_error("Non-sequential access to Buffer Data Port register"

+ "is prohibited\n");

return false;

}

return true;

@@ -XXX,XX +XXX,XX @@ static uint64_t sdhci_read(void *opaque, hwaddr offset, unsigned size)

case SDHC_BDATA:

if (sdhci_buff_access_is_sequential(s, offset - SDHC_BDATA)) {

ret = sdhci_read_dataport(s, size);

- DPRINT_L2("read %ub: addr[0x%04x] -> %u(0x%x)\n", size, (int)offset,

- ret, ret);

+ trace_sdhci_access("rd", size << 3, offset, "->", ret, ret);

return ret;

}

break;

@@ -XXX,XX +XXX,XX @@ static uint64_t sdhci_read(void *opaque, hwaddr offset, unsigned size)

ret >>= (offset & 0x3) * 8;

ret &= (1ULL << (size * 8)) - 1;

- DPRINT_L2("read %ub: addr[0x%04x] -> %u(0x%x)\n", size, (int)offset, ret, ret);

+ trace_sdhci_access("rd", size << 3, offset, "->", ret, ret);

return ret;

@@ -XXX,XX +XXX,XX @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)

"not implemented\n", size, offset, value >> shift);

break;

}

- DPRINT_L2("write %ub: addr[0x%04x] <- %u(0x%x)\n",

- size, (int)offset, value >> shift, value >> shift);

+ trace_sdhci_access("wr", size << 3, offset, "<-",

+ value >> shift, value >> shift);

}

static const MemoryRegionOps sdhci_mmio_ops = {

diff --git a/hw/sd/trace-events b/hw/sd/trace-events

index XXXXXXX..XXXXXXX 100644

--- a/hw/sd/trace-events

+++ b/hw/sd/trace-events

@@ -XXX,XX +XXX,XX @@

# See docs/devel/tracing.txt for syntax documentation.

+# hw/sd/sdhci.c

+sdhci_set_inserted(const char *level) "card state changed: %s"

+sdhci_send_command(uint8_t cmd, uint32_t arg) "CMD%02u ARG[0x%08x]"

+sdhci_error(const char *msg) "%s"

+sdhci_response4(uint32_t r0) "RSPREG[31..0]=0x%08x"

+sdhci_response16(uint32_t r3, uint32_t r2, uint32_t r1, uint32_t r0) "RSPREG[127..96]=0x%08x, RSPREG[95..64]=0x%08x, RSPREG[63..32]=0x%08x, RSPREG[31..0]=0x%08x"

+sdhci_end_transfer(uint8_t cmd, uint32_t arg) "Automatically issue CMD%02u 0x%08x"

+sdhci_adma(const char *desc, uint32_t sysad) "%s: admasysaddr=0x%" PRIx32

+sdhci_adma_loop(uint64_t addr, uint16_t length, uint8_t attr) "addr=0x%08" PRIx64 ", len=%d, attr=0x%x"

+sdhci_adma_transfer_completed(void) ""

+sdhci_access(const char *access, unsigned int size, uint64_t offset, const char *dir, uint64_t val, uint64_t val2) "%s%u: addr[0x%04" PRIx64 "] %s 0x%08" PRIx64 " (%" PRIu64 ")"

+sdhci_read_dataport(uint16_t data_count) "all %u bytes of data have been read from input buffer"

+sdhci_write_dataport(uint16_t data_count) "write buffer filled with %u bytes of data"

+

# hw/sd/milkymist-memcard.c

milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"

milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"

2.7.4

Since ssi-sd is still using the legacy SD card API, the SD

card created by sd_init() is not plugged into any bus. This

means that the controller has to reset it manually.

Failing to do this mostly didn't affect the guest since the

guest typically does a programmed SD card reset as part of

its SD controller driver initialization, but meant that

migration failed because it's only in sd_reset() that we

set up the wpgrps_size field.

In the case of sd-ssi, we have to implement an entire

reset function since there wasn't one previously, and

that requires a QOM cast macro that got omitted when this

device was QOMified.

Cc: qemu-stable@nongnu.org

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Message-id: 1515506513-31961-4-git-send-email-peter.maydell@linaro.org

---

hw/sd/ssi-sd.c | 25 +++++++++++++++++++++++--

1 file changed, 23 insertions(+), 2 deletions(-)

diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c

--- a/hw/sd/ssi-sd.c

+++ b/hw/sd/ssi-sd.c

@@ -XXX,XX +XXX,XX @@ typedef struct {

SDState *sd;

} ssi_sd_state;

+#define TYPE_SSI_SD "ssi-sd"

+#define SSI_SD(obj) OBJECT_CHECK(ssi_sd_state, (obj), TYPE_SSI_SD)

/* State word bits. */

#define SSI_SDR_LOCKED 0x0001

#define SSI_SDR_WP_ERASE 0x0002

@@ -XXX,XX +XXX,XX @@ static void ssi_sd_realize(SSISlave *d, Error **errp)

ssi_sd_state *s = FROM_SSI_SLAVE(ssi_sd_state, d);

DriveInfo *dinfo;

- s->mode = SSI_SD_CMD;

/* FIXME use a qdev drive property instead of drive_get_next() */

dinfo = drive_get_next(IF_SD);

s->sd = sd_init(dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, true);

@@ -XXX,XX +XXX,XX @@ static void ssi_sd_realize(SSISlave *d, Error **errp)

+static void ssi_sd_reset(DeviceState *dev)

+ ssi_sd_state *s = SSI_SD(dev);

+ s->mode = SSI_SD_CMD;

+ s->cmd = 0;

+ memset(s->cmdarg, 0, sizeof(s->cmdarg));

+ memset(s->response, 0, sizeof(s->response));

+ s->arglen = 0;

+ s->response_pos = 0;

+ s->stopping = 0;

+ /* Since we're still using the legacy SD API the card is not plugged

+ * into any bus, and we must reset it manually.

+ */

+ device_reset(DEVICE(s->sd));

static void ssi_sd_class_init(ObjectClass *klass, void *data)

DeviceClass *dc = DEVICE_CLASS(klass);

@@ -XXX,XX +XXX,XX @@ static void ssi_sd_class_init(ObjectClass *klass, void *data)

k->transfer = ssi_sd_transfer;

k->cs_polarity = SSI_CS_LOW;

dc->vmsd = &vmstate_ssi_sd;

+ dc->reset = ssi_sd_reset;

static const TypeInfo ssi_sd_info = {

- .name = "ssi-sd",

+ .name = TYPE_SSI_SD,

.parent = TYPE_SSI_SLAVE,

.instance_size = sizeof(ssi_sd_state),

.class_init = ssi_sd_class_init,

2.7.4

From: Andrey Smirnov <andrew.smirnov@gmail.com>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>

Message-id: 20180115182436.2066-13-f4bug@amsat.org

hw/sd/sdhci.c | 3 +++

1 file changed, 3 insertions(+)

diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c