The x86ModelParseSignatures function makes an assumption that CPU signature
model equals 0 as an invalid case. While in Hygon processor definition, A1
version (model 0, stepping 1) is mass production version, to support Hygon
Dhyana A1 version, we have removed CPU signature model zero checking condition.

Signed-off-by: Yingle Hou <houyingle@hygon.cn>
---
 src/cpu/cpu_x86.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c
index 1e913cc..9b7981d 100644
--- a/src/cpu/cpu_x86.c
+++ b/src/cpu/cpu_x86.c
@@ -1418,7 +1418,7 @@ x86ModelParseSignatures(virCPUx86ModelPtr model,
         }
 
         rc = virXPathUInt("string(@model)", ctxt, &sigModel);
-        if (rc < 0 || sigModel == 0) {
+        if (rc < 0) {
             virReportError(VIR_ERR_INTERNAL_ERROR,
                            _("Invalid CPU signature model in model %s"),
                            model->name);
-- 
1.8.3.1


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On Thu, Dec 12, 2019 at 10:58:18AM +0800, Yingle Hou wrote:
> The x86ModelParseSignatures function makes an assumption that CPU signature
> model equals 0 as an invalid case. While in Hygon processor definition, A1
> version (model 0, stepping 1) is mass production version, to support Hygon
> Dhyana A1 version, we have removed CPU signature model zero checking condition.
> 
> Signed-off-by: Yingle Hou <houyingle@hygon.cn>
> ---
>  src/cpu/cpu_x86.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>


Regards,
Daniel
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