[PATCH v2 2/4] cpu_map: Defined and enable EPYC-Rome model

Markus Schade posted 4 patches 5 years, 4 months ago
[PATCH v2 2/4] cpu_map: Defined and enable EPYC-Rome model
Posted by Markus Schade 5 years, 4 months ago
Signed-off-by: Markus Schade <markus.schade@hetzner.com>
---
 src/cpu_map/index.xml         |  1 +
 src/cpu_map/meson.build       |  1 +
 src/cpu_map/x86_EPYC-Rome.xml | 81 +++++++++++++++++++++++++++++++++++
 3 files changed, 83 insertions(+)
 create mode 100644 src/cpu_map/x86_EPYC-Rome.xml

diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml
index 1486a29c65..fec01f324c 100644
--- a/src/cpu_map/index.xml
+++ b/src/cpu_map/index.xml
@@ -66,6 +66,7 @@
     <include filename="x86_Opteron_G5.xml"/>
     <include filename="x86_EPYC.xml"/>
     <include filename="x86_EPYC-IBPB.xml"/>
+    <include filename="x86_EPYC-Rome.xml"/>
 
     <!-- Hygon CPU models -->
     <include filename="x86_Dhyana.xml"/>
diff --git a/src/cpu_map/meson.build b/src/cpu_map/meson.build
index 19daa7157b..b86612b6e0 100644
--- a/src/cpu_map/meson.build
+++ b/src/cpu_map/meson.build
@@ -32,6 +32,7 @@ cpumap_data = [
   'x86_Dhyana.xml',
   'x86_EPYC-IBPB.xml',
   'x86_EPYC.xml',
+  'x86_EPYC-Rome.xml',
   'x86_features.xml',
   'x86_Haswell-IBRS.xml',
   'x86_Haswell-noTSX-IBRS.xml',
diff --git a/src/cpu_map/x86_EPYC-Rome.xml b/src/cpu_map/x86_EPYC-Rome.xml
new file mode 100644
index 0000000000..41d4123917
--- /dev/null
+++ b/src/cpu_map/x86_EPYC-Rome.xml
@@ -0,0 +1,81 @@
+<cpus>
+  <model name='EPYC-Rome'>
+    <decode host='on' guest='on'/>
+    <signature family='23' model='49'/>
+    <vendor name='AMD'/>
+    <feature name='3dnowprefetch'/>
+    <feature name='abm'/>
+    <feature name='adx'/>
+    <feature name='aes'/>
+    <feature name='amd-stibp'/>
+    <feature name='apic'/>
+    <feature name='arat'/>
+    <feature name='avx'/>
+    <feature name='avx2'/>
+    <feature name='bmi1'/>
+    <feature name='bmi2'/>
+    <feature name='clflush'/>
+    <feature name='clflushopt'/>
+    <feature name='clwb'/>
+    <feature name='clzero'/>
+    <feature name='cmov'/>
+    <feature name='cr8legacy'/>
+    <feature name='cx16'/>
+    <feature name='cx8'/>
+    <feature name='de'/>
+    <feature name='f16c'/>
+    <feature name='fma'/>
+    <feature name='fpu'/>
+    <feature name='fsgsbase'/>
+    <feature name='fxsr'/>
+    <feature name='fxsr_opt'/>
+    <feature name='ibpb'/>
+    <feature name='lahf_lm'/>
+    <feature name='lm'/>
+    <feature name='mca'/>
+    <feature name='mce'/>
+    <feature name='misalignsse'/>
+    <feature name='mmx'/>
+    <feature name='mmxext'/>
+    <feature name='monitor'/>
+    <feature name='movbe'/>
+    <feature name='msr'/>
+    <feature name='mtrr'/>
+    <feature name='nx'/>
+    <feature name='osvw'/>
+    <feature name='pae'/>
+    <feature name='pat'/>
+    <feature name='pclmuldq'/>
+    <feature name='pdpe1gb'/>
+    <feature name='perfctr_core'/>
+    <feature name='pge'/>
+    <feature name='pni'/>
+    <feature name='popcnt'/>
+    <feature name='pse'/>
+    <feature name='pse36'/>
+    <feature name='rdpid'/>
+    <feature name='rdrand'/>
+    <feature name='rdseed'/>
+    <feature name='rdtscp'/>
+    <feature name='sep'/>
+    <feature name='sha-ni'/>
+    <feature name='smap'/>
+    <feature name='smep'/>
+    <feature name='sse'/>
+    <feature name='sse2'/>
+    <feature name='sse4.1'/>
+    <feature name='sse4.2'/>
+    <feature name='sse4a'/>
+    <feature name='ssse3'/>
+    <feature name='svm'/>
+    <feature name='syscall'/>
+    <feature name='tsc'/>
+    <feature name='vme'/>
+    <feature name='wbnoinvd'/>
+    <feature name='xgetbv1'/>
+    <feature name='xsave'/>
+    <feature name='xsavec'/>
+    <feature name='xsaveerptr'/>
+    <feature name='xsaveopt'/>
+  </model>
+</cpus>
-- 
2.26.2

Re: [PATCH v2 2/4] cpu_map: Defined and enable EPYC-Rome model
Posted by Jiri Denemark 5 years, 4 months ago
On Thu, Oct 01, 2020 at 12:22:02 +0200, Markus Schade wrote:
> Signed-off-by: Markus Schade <markus.schade@hetzner.com>
> ---
>  src/cpu_map/index.xml         |  1 +
>  src/cpu_map/meson.build       |  1 +
>  src/cpu_map/x86_EPYC-Rome.xml | 81 +++++++++++++++++++++++++++++++++++
>  3 files changed, 83 insertions(+)
>  create mode 100644 src/cpu_map/x86_EPYC-Rome.xml
...
> diff --git a/src/cpu_map/x86_EPYC-Rome.xml b/src/cpu_map/x86_EPYC-Rome.xml
> new file mode 100644
> index 0000000000..41d4123917
> --- /dev/null
> +++ b/src/cpu_map/x86_EPYC-Rome.xml
> @@ -0,0 +1,81 @@
> +<cpus>
> +  <model name='EPYC-Rome'>
> +    <decode host='on' guest='on'/>
> +    <signature family='23' model='49'/>
> +    <vendor name='AMD'/>
...
> +    <feature name='mtrr'/>
> +    <feature name='nx'/>
...
> +    <feature name='tsc'/>
> +    <feature name='vme'/>

QEMU definition of EPYC-Rome also contains 'npt' (CPUID_SVM_NPT),
'nrip-save' (CPUID_SVM_NRIPSAVE), and 'umip' (CPUID_7_0_ECX_UMIP). Any
specific reason for not including them in libvirt?

> +    <feature name='wbnoinvd'/>
> +    <feature name='xgetbv1'/>
> +    <feature name='xsave'/>
> +    <feature name='xsavec'/>
> +    <feature name='xsaveerptr'/>
> +    <feature name='xsaveopt'/>
> +  </model>
> +</cpus>

Jirka

Re: [PATCH v2 2/4] cpu_map: Defined and enable EPYC-Rome model
Posted by Markus Schade 5 years, 4 months ago
Am 06.10.20 um 15:44 schrieb Jiri Denemark:
> QEMU definition of EPYC-Rome also contains 'npt' (CPUID_SVM_NPT),
> 'nrip-save' (CPUID_SVM_NRIPSAVE), and 'umip' (CPUID_7_0_ECX_UMIP). Any
> specific reason for not including them in libvirt?

I have not included the SVM feature flags, because they are also not
part of the EPYC and EPYC-IBPB models.

Best regards,
Markus

Re: [PATCH v2 2/4] cpu_map: Defined and enable EPYC-Rome model
Posted by Jiri Denemark 5 years, 4 months ago
On Wed, Oct 07, 2020 at 15:54:50 +0200, Markus Schade wrote:
> Am 06.10.20 um 15:44 schrieb Jiri Denemark:
> > QEMU definition of EPYC-Rome also contains 'npt' (CPUID_SVM_NPT),
> > 'nrip-save' (CPUID_SVM_NRIPSAVE), and 'umip' (CPUID_7_0_ECX_UMIP). Any
> > specific reason for not including them in libvirt?
> 
> I have not included the SVM feature flags, because they are also not
> part of the EPYC and EPYC-IBPB models.

They are not included in EPYC because they were added to the QEMU
definition of EPYC later. I'll add the three missing features to
EPYC-Rome.

Jirka