MdeModulePkg/Include/UniversalPayload/PciRootBridges.h | 91 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ MdeModulePkg/MdeModulePkg.ci.yaml | 2 ++ MdeModulePkg/MdeModulePkg.dec | 6 ++++++ 3 files changed, 99 insertions(+)
Hi Hao,
For this patch, can I keep your reviewed-by?
I just added ExceptionList in MdeModulePkg\MdeModulePkg.ci.yaml, to avoid CI failure.
Thanks
Zhiguang
________________________________
发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Zhiguang Liu <zhiguang.liu@intel.com>
发送时间: 2021年6月15日 17:12
收件人: devel@edk2.groups.io <devel@edk2.groups.io>
抄送: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>; Wang, Jian J <jian.j.wang@intel.com>; Wu, Hao A <hao.a.wu@intel.com>
主题: [edk2-devel] [Patch V5 2/9] MdeModulePkg: Add new structure for the PCI Root Bridge Info Hob
V5:
Add ExceptionList in MdeModulePkg\MdeModulePkg.ci.yaml, to avoid open CI
issue, because UID and HID are terms which are already used in current
source code.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
---
MdeModulePkg/Include/UniversalPayload/PciRootBridges.h | 91 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
MdeModulePkg/MdeModulePkg.ci.yaml | 2 ++
MdeModulePkg/MdeModulePkg.dec | 6 ++++++
3 files changed, 99 insertions(+)
diff --git a/MdeModulePkg/Include/UniversalPayload/PciRootBridges.h b/MdeModulePkg/Include/UniversalPayload/PciRootBridges.h
new file mode 100644
index 0000000000..3a7aae82d4
--- /dev/null
+++ b/MdeModulePkg/Include/UniversalPayload/PciRootBridges.h
@@ -0,0 +1,91 @@
+/** @file
+ This file defines the structure for the PCI Root Bridges.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ - Universal Payload Specification 0.75 (https://universalpayload.github.io/documentation/)
+**/
+
+#ifndef UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_H_
+#define UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_H_
+
+#include <UniversalPayload/UniversalPayload.h>
+
+#pragma pack(1)
+
+//
+// (Base > Limit) indicates an aperture is not available.
+//
+typedef struct {
+ //
+ // Base and Limit are the device address instead of host address when
+ // Translation is not zero
+ //
+ UINT64 Base;
+ UINT64 Limit;
+ //
+ // According to UEFI 2.7, Device Address = Host Address + Translation,
+ // so Translation = Device Address - Host Address.
+ // On platforms where Translation is not zero, the subtraction is probably to
+ // be performed with UINT64 wrap-around semantics, for we may translate an
+ // above-4G host address into a below-4G device address for legacy PCIe device
+ // compatibility.
+ //
+ // NOTE: The alignment of Translation is required to be larger than any BAR
+ // alignment in the same root bridge, so that the same alignment can be
+ // applied to both device address and host address, which simplifies the
+ // situation and makes the current resource allocation code in generic PCI
+ // host bridge driver still work.
+ //
+ UINT64 Translation;
+} UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE;
+
+///
+/// Payload PCI Root Bridge Information HOB
+///
+typedef struct {
+ UINT32 Segment; ///< Segment number.
+ UINT64 Supports; ///< Supported attributes.
+ ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes()
+ ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ UINT64 Attributes; ///< Initial attributes.
+ ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes()
+ ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ BOOLEAN DmaAbove4G; ///< DMA above 4GB memory.
+ ///< Set to TRUE when root bridge supports DMA above 4GB memory.
+ BOOLEAN NoExtendedConfigSpace; ///< When FALSE, the root bridge supports
+ ///< Extended (4096-byte) Configuration Space.
+ ///< When TRUE, the root bridge supports
+ ///< 256-byte Configuration Space only.
+ UINT64 AllocationAttributes; ///< Allocation attributes.
+ ///< Refer to EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM and
+ ///< EFI_PCI_HOST_BRIDGE_MEM64_DECODE used by GetAllocAttributes()
+ ///< in EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Bus; ///< Bus aperture which can be used by the root bridge.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Io; ///< IO aperture which can be used by the root bridge.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Mem; ///< MMIO aperture below 4GB which can be used by the root bridge.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE MemAbove4G; ///< MMIO aperture above 4GB which can be used by the root bridge.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE PMem; ///< Prefetchable MMIO aperture below 4GB which can be used by the root bridge.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE PMemAbove4G; ///< Prefetchable MMIO aperture above 4GB which can be used by the root bridge.
+ UINT32 HID; ///< PnP hardware ID of the root bridge. This value must match the corresponding
+ ///< _HID in the ACPI name space.
+ UINT32 UID; ///< Unique ID that is required by ACPI if two devices have the same _HID.
+ ///< This value must also match the corresponding _UID/_HID pair in the ACPI name space.
+} UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE;
+
+typedef struct {
+ UNIVERSAL_PAYLOAD_GENERIC_HEADER Header;
+ BOOLEAN ResourceAssigned;
+ UINT8 Count;
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE RootBridge[0];
+} UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES;
+
+#pragma pack()
+
+#define UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_REVISION 1
+
+extern GUID gUniversalPayloadPciRootBridgeInfoGuid;
+
+#endif // UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_H_
diff --git a/MdeModulePkg/MdeModulePkg.ci.yaml b/MdeModulePkg/MdeModulePkg.ci.yaml
index 45783f12c1..4c71468bd3 100644
--- a/MdeModulePkg/MdeModulePkg.ci.yaml
+++ b/MdeModulePkg/MdeModulePkg.ci.yaml
@@ -16,6 +16,8 @@
## "<ErrorID>", "<KeyWord>"
## ]
"ExceptionList": [
+ "8005", "UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE.UID",
+ "8005", "UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE.HID",
],
## Both file path and directory path are accepted.
"IgnoreFiles": [
diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 8d38383915..5cee4e159a 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -404,6 +404,12 @@
## Include/Guid/MigratedFvInfo.h
gEdkiiMigratedFvInfoGuid = { 0xc1ab12f7, 0x74aa, 0x408d, { 0xa2, 0xf4, 0xc6, 0xce, 0xfd, 0x17, 0x98, 0x71 } }
+ #
+ # GUID defined in UniversalPayload
+ #
+ ## Include/UniversalPayload/PciRootBridges.h
+ gUniversalPayloadPciRootBridgeInfoGuid = { 0xec4ebacb, 0x2638, 0x416e, { 0xbe, 0x80, 0xe5, 0xfa, 0x4b, 0x51, 0x19, 0x01 }}
+
[Ppis]
## Include/Ppi/AtaController.h
gPeiAtaControllerPpiGuid = { 0xa45e60d1, 0xc719, 0x44aa, { 0xb0, 0x7a, 0xaa, 0x77, 0x7f, 0x85, 0x90, 0x6d }}
--
2.30.0.windows.2
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Yes. Please help to keep my R-b tag. Thanks.
Best Regards,
Hao Wu
From: Liu, Zhiguang <zhiguang.liu@intel.com>
Sent: Tuesday, June 15, 2021 5:16 PM
To: devel@edk2.groups.io; Liu, Zhiguang <zhiguang.liu@intel.com>; Wu, Hao A <hao.a.wu@intel.com>
Subject: 回复: [edk2-devel] [Patch V5 2/9] MdeModulePkg: Add new structure for the PCI Root Bridge Info Hob
Hi Hao,
For this patch, can I keep your reviewed-by?
I just added ExceptionList in MdeModulePkg\MdeModulePkg.ci.yaml, to avoid CI failure.
Thanks
Zhiguang
________________________________
发件人: devel@edk2.groups.io<mailto:devel@edk2.groups.io> <devel@edk2.groups.io<mailto:devel@edk2.groups.io>> 代表 Zhiguang Liu <zhiguang.liu@intel.com<mailto:zhiguang.liu@intel.com>>
发送时间: 2021年6月15日 17:12
收件人: devel@edk2.groups.io<mailto:devel@edk2.groups.io> <devel@edk2.groups.io<mailto:devel@edk2.groups.io>>
抄送: Kinney, Michael D <michael.d.kinney@intel.com<mailto:michael.d.kinney@intel.com>>; Liming Gao <gaoliming@byosoft.com.cn<mailto:gaoliming@byosoft.com.cn>>; Wang, Jian J <jian.j.wang@intel.com<mailto:jian.j.wang@intel.com>>; Wu, Hao A <hao.a.wu@intel.com<mailto:hao.a.wu@intel.com>>
主题: [edk2-devel] [Patch V5 2/9] MdeModulePkg: Add new structure for the PCI Root Bridge Info Hob
V5:
Add ExceptionList in MdeModulePkg\MdeModulePkg.ci.yaml, to avoid open CI
issue, because UID and HID are terms which are already used in current
source code.
Cc: Michael D Kinney <michael.d.kinney@intel.com<mailto:michael.d.kinney@intel.com>>
Cc: Liming Gao <gaoliming@byosoft.com.cn<mailto:gaoliming@byosoft.com.cn>>
Cc: Jian J Wang <jian.j.wang@intel.com<mailto:jian.j.wang@intel.com>>
Cc: Hao A Wu <hao.a.wu@intel.com<mailto:hao.a.wu@intel.com>>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com<mailto:hao.a.wu@intel.com>>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com<mailto:zhiguang.liu@intel.com>>
---
MdeModulePkg/Include/UniversalPayload/PciRootBridges.h | 91 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
MdeModulePkg/MdeModulePkg.ci.yaml | 2 ++
MdeModulePkg/MdeModulePkg.dec | 6 ++++++
3 files changed, 99 insertions(+)
diff --git a/MdeModulePkg/Include/UniversalPayload/PciRootBridges.h b/MdeModulePkg/Include/UniversalPayload/PciRootBridges.h
new file mode 100644
index 0000000000..3a7aae82d4
--- /dev/null
+++ b/MdeModulePkg/Include/UniversalPayload/PciRootBridges.h
@@ -0,0 +1,91 @@
+/** @file
+ This file defines the structure for the PCI Root Bridges.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ - Universal Payload Specification 0.75 (https://universalpayload.github.io/documentation/)
+**/
+
+#ifndef UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_H_
+#define UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_H_
+
+#include <UniversalPayload/UniversalPayload.h>
+
+#pragma pack(1)
+
+//
+// (Base > Limit) indicates an aperture is not available.
+//
+typedef struct {
+ //
+ // Base and Limit are the device address instead of host address when
+ // Translation is not zero
+ //
+ UINT64 Base;
+ UINT64 Limit;
+ //
+ // According to UEFI 2.7, Device Address = Host Address + Translation,
+ // so Translation = Device Address - Host Address.
+ // On platforms where Translation is not zero, the subtraction is probably to
+ // be performed with UINT64 wrap-around semantics, for we may translate an
+ // above-4G host address into a below-4G device address for legacy PCIe device
+ // compatibility.
+ //
+ // NOTE: The alignment of Translation is required to be larger than any BAR
+ // alignment in the same root bridge, so that the same alignment can be
+ // applied to both device address and host address, which simplifies the
+ // situation and makes the current resource allocation code in generic PCI
+ // host bridge driver still work.
+ //
+ UINT64 Translation;
+} UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE;
+
+///
+/// Payload PCI Root Bridge Information HOB
+///
+typedef struct {
+ UINT32 Segment; ///< Segment number.
+ UINT64 Supports; ///< Supported attributes.
+ ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes()
+ ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ UINT64 Attributes; ///< Initial attributes.
+ ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes()
+ ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ BOOLEAN DmaAbove4G; ///< DMA above 4GB memory.
+ ///< Set to TRUE when root bridge supports DMA above 4GB memory.
+ BOOLEAN NoExtendedConfigSpace; ///< When FALSE, the root bridge supports
+ ///< Extended (4096-byte) Configuration Space.
+ ///< When TRUE, the root bridge supports
+ ///< 256-byte Configuration Space only.
+ UINT64 AllocationAttributes; ///< Allocation attributes.
+ ///< Refer to EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM and
+ ///< EFI_PCI_HOST_BRIDGE_MEM64_DECODE used by GetAllocAttributes()
+ ///< in EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Bus; ///< Bus aperture which can be used by the root bridge.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Io; ///< IO aperture which can be used by the root bridge.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Mem; ///< MMIO aperture below 4GB which can be used by the root bridge.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE MemAbove4G; ///< MMIO aperture above 4GB which can be used by the root bridge.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE PMem; ///< Prefetchable MMIO aperture below 4GB which can be used by the root bridge.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE PMemAbove4G; ///< Prefetchable MMIO aperture above 4GB which can be used by the root bridge.
+ UINT32 HID; ///< PnP hardware ID of the root bridge. This value must match the corresponding
+ ///< _HID in the ACPI name space.
+ UINT32 UID; ///< Unique ID that is required by ACPI if two devices have the same _HID.
+ ///< This value must also match the corresponding _UID/_HID pair in the ACPI name space.
+} UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE;
+
+typedef struct {
+ UNIVERSAL_PAYLOAD_GENERIC_HEADER Header;
+ BOOLEAN ResourceAssigned;
+ UINT8 Count;
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE RootBridge[0];
+} UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES;
+
+#pragma pack()
+
+#define UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_REVISION 1
+
+extern GUID gUniversalPayloadPciRootBridgeInfoGuid;
+
+#endif // UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_H_
diff --git a/MdeModulePkg/MdeModulePkg.ci.yaml b/MdeModulePkg/MdeModulePkg.ci.yaml
index 45783f12c1..4c71468bd3 100644
--- a/MdeModulePkg/MdeModulePkg.ci.yaml
+++ b/MdeModulePkg/MdeModulePkg.ci.yaml
@@ -16,6 +16,8 @@
## "<ErrorID>", "<KeyWord>"
## ]
"ExceptionList": [
+ "8005", "UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE.UID",
+ "8005", "UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE.HID",
],
## Both file path and directory path are accepted.
"IgnoreFiles": [
diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 8d38383915..5cee4e159a 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -404,6 +404,12 @@
## Include/Guid/MigratedFvInfo.h
gEdkiiMigratedFvInfoGuid = { 0xc1ab12f7, 0x74aa, 0x408d, { 0xa2, 0xf4, 0xc6, 0xce, 0xfd, 0x17, 0x98, 0x71 } }
+ #
+ # GUID defined in UniversalPayload
+ #
+ ## Include/UniversalPayload/PciRootBridges.h
+ gUniversalPayloadPciRootBridgeInfoGuid = { 0xec4ebacb, 0x2638, 0x416e, { 0xbe, 0x80, 0xe5, 0xfa, 0x4b, 0x51, 0x19, 0x01 }}
+
[Ppis]
## Include/Ppi/AtaController.h
gPeiAtaControllerPpiGuid = { 0xa45e60d1, 0xc719, 0x44aa, { 0xb0, 0x7a, 0xaa, 0x77, 0x7f, 0x85, 0x90, 0x6d }}
--
2.30.0.windows.2
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