[edk2-devel] [edk2-platforms: PATCH] BIOS needs to present cores in order of relative performance in MADT

JackX Lin posted 1 patch 2 weeks, 3 days ago
Failed in applying to current master (apply log)
Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 111 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------
1 file changed, 104 insertions(+), 7 deletions(-)
[edk2-devel] [edk2-platforms: PATCH] BIOS needs to present cores in order of relative performance in MADT
Posted by JackX Lin 2 weeks, 3 days ago
BIOS should keep MADT ordering by big core first then small core

Signed-off-by: JackX Lin <JackX.Lin@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Donald Kuo <Donald.Kuo@intel.com>
Cc: Chandana C Kumar <chandana.c.kumar@intel.com>
Cc: JackX Lin <JackX.Lin@intel.com>
---
 Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 111 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------
 1 file changed, 104 insertions(+), 7 deletions(-)

diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
index 6e57b638e0..894790f246 100644
--- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
+++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
@@ -18,6 +18,7 @@ typedef struct {
   UINT32   Flags;
   UINT32   SocketNum;
   UINT32   Thread;
+  UINT8    CpuCoreType;
 } EFI_CPU_ID_ORDER_MAP;
 
 //
@@ -131,6 +132,49 @@ AppendCpuMapTableEntry (
 
 }
 
+/**
+  Function will go through all processors to identify Core or Atom
+  by checking Core Type and update in IsBigCore.
+
+  @param[in] CpuApicIdOrderTable         Point to a buffer which will be filled in Core type information.
+**/
+VOID
+STATIC
+EFIAPI
+CollectCpuCoreType (
+  IN EFI_CPU_ID_ORDER_MAP        *CpuApicIdOrderTable
+  )
+{
+  CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EDX     Edx;
+  UINT32                                          Eax;
+  UINTN                                           ApNumber;
+  EFI_STATUS                                      Status;
+  UINT8                                           CoreType;
+
+  Status = mMpService->WhoAmI (
+                         mMpService,
+                         &ApNumber
+                         );
+  ASSERT_EFI_ERROR (Status);
+
+  ///
+  /// Check Hetero feature is supported
+  /// with CPUID.(EAX=7,ECX=0):EDX[15]=1
+  ///
+  AsmCpuidEx (CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, 0, NULL, NULL, NULL, &Edx.Uint32);
+  if (Edx.Bits.Hybrid == 1) {
+    //
+    // Check which is the running core by reading CPUID.(EAX=1AH, ECX=00H):EAX
+    //
+    AsmCpuid (CPUID_HYBRID_INFORMATION, &Eax, NULL, NULL, NULL);
+    CoreType = (UINT8) ((Eax & 0xFF000000) >> 24);
+  } else {
+    CoreType = CPUID_CORE_TYPE_INTEL_CORE;
+  }
+
+  CpuApicIdOrderTable[ApNumber].CpuCoreType = CoreType;
+}
+
 /**
   Collect all processors information and create a Cpu Apic Id table.
 
@@ -138,7 +182,7 @@ AppendCpuMapTableEntry (
 **/
 EFI_STATUS
 CreateCpuLocalApicInTable (
-  IN EFI_CPU_ID_ORDER_MAP *CpuApicIdOrderTable
+  IN EFI_CPU_ID_ORDER_MAP                   *CpuApicIdOrderTable
   )
 {
   EFI_STATUS                                Status;
@@ -146,9 +190,24 @@ CreateCpuLocalApicInTable (
   UINT32                                    Index;
   UINT32                                    CurrProcessor;
   EFI_CPU_ID_ORDER_MAP                      *CpuIdMapPtr;
+  EFI_CPU_ID_ORDER_MAP                      *TempCpuApicIdOrderTable;
   UINT32                                    Socket;
 
-  Status     = EFI_SUCCESS;
+  TempCpuApicIdOrderTable = AllocateZeroPool (mNumberOfCpus * sizeof (EFI_CPU_ID_ORDER_MAP));
+  if (TempCpuApicIdOrderTable == NULL) {
+    return EFI_UNSUPPORTED;
+  }
+
+  CollectCpuCoreType (TempCpuApicIdOrderTable);
+  mMpService->StartupAllAPs (
+                mMpService,                               // This
+                (EFI_AP_PROCEDURE) CollectCpuCoreType,    // Procedure
+                TRUE,                                     // SingleThread
+                NULL,                                     // WaitEvent
+                0,                                        // TimeoutInMicrosecsond
+                TempCpuApicIdOrderTable,                  // ProcedureArgument
+                NULL                                      // FailedCpuList
+                );
 
   for (CurrProcessor = 0, Index = 0; CurrProcessor < mNumberOfCpus; CurrProcessor++, Index++) {
     Status = mMpService->GetProcessorInfo (
@@ -157,9 +216,9 @@ CreateCpuLocalApicInTable (
                            &ProcessorInfoBuffer
                            );
 
-    CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *) &CpuApicIdOrderTable[Index];
+    CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *) &TempCpuApicIdOrderTable[Index];
     if ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0) {
-      CpuIdMapPtr->ApicId  = (UINT32)ProcessorInfoBuffer.ProcessorId;
+      CpuIdMapPtr->ApicId  = (UINT32) ProcessorInfoBuffer.ProcessorId;
       CpuIdMapPtr->Thread  = ProcessorInfoBuffer.Location.Thread;
       CpuIdMapPtr->Flags   = ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0);
       CpuIdMapPtr->SocketNum = ProcessorInfoBuffer.Location.Package;
@@ -184,22 +243,60 @@ CreateCpuLocalApicInTable (
   //
   DEBUG ((DEBUG_INFO, "BspApicId - 0x%x\n", GetApicId ()));
 
-
   //
   // Fill in AcpiProcessorUid.
   //
   for (Socket = 0; Socket < FixedPcdGet32 (PcdMaxCpuSocketCount); Socket++) {
     for (CurrProcessor = 0, Index = 0; CurrProcessor < mNumberOfCpus; CurrProcessor++) {
-      if (CpuApicIdOrderTable[CurrProcessor].Flags && (CpuApicIdOrderTable[CurrProcessor].SocketNum == Socket)) {
-        CpuApicIdOrderTable[CurrProcessor].AcpiProcessorUid = (CpuApicIdOrderTable[CurrProcessor].SocketNum << mNumOfBitShift) + Index;
+      if (TempCpuApicIdOrderTable[CurrProcessor].Flags && (TempCpuApicIdOrderTable[CurrProcessor].SocketNum == Socket)) {
+        TempCpuApicIdOrderTable[CurrProcessor].AcpiProcessorUid = (TempCpuApicIdOrderTable[CurrProcessor].SocketNum << mNumOfBitShift) + Index;
         Index++;
       }
     }
   }
 
+  //
+  // Re-ordering Cpu cores information to CpuApicIdOrderTable
+  // by big core first, then small core.
+  //
+  for (Index = 0, CurrProcessor = 0; Index < mNumberOfCpus; Index++) {
+    if (TempCpuApicIdOrderTable[Index].CpuCoreType == CPUID_CORE_TYPE_INTEL_CORE) {
+      CopyMem (&CpuApicIdOrderTable[CurrProcessor], &TempCpuApicIdOrderTable[Index], sizeof (EFI_CPU_ID_ORDER_MAP));
+      CurrProcessor++;
+    }
+  }
+
+  for (Index = 0; Index < mNumberOfCpus; Index++) {
+    if (TempCpuApicIdOrderTable[Index].CpuCoreType == CPUID_CORE_TYPE_INTEL_ATOM) {
+      CopyMem (&CpuApicIdOrderTable[CurrProcessor], &TempCpuApicIdOrderTable[Index], sizeof (EFI_CPU_ID_ORDER_MAP));
+      CurrProcessor++;
+    }
+  }
+
+  //
+  // Add unknown cpu core types to the bottom of the table
+  //
+  for (Index = 0; Index < mNumberOfCpus; Index++) {
+    if ((TempCpuApicIdOrderTable[Index].CpuCoreType != CPUID_CORE_TYPE_INTEL_CORE) && (TempCpuApicIdOrderTable[Index].CpuCoreType != CPUID_CORE_TYPE_INTEL_ATOM)) {
+      DEBUG ((
+        DEBUG_INFO,
+        "Unknown Cpu Core type found: Apic = 0x%x, CoreType = 0x%x\n",
+        TempCpuApicIdOrderTable[Index].ApicId,
+        TempCpuApicIdOrderTable[Index].CpuCoreType
+        ));
+
+      CopyMem (&CpuApicIdOrderTable[CurrProcessor], &TempCpuApicIdOrderTable[Index], sizeof (EFI_CPU_ID_ORDER_MAP));
+      CurrProcessor++;
+    }
+  }
+
   DEBUG ((DEBUG_INFO, "::ACPI::  APIC ID Order Table Init.   mNumOfBitShift = %x\n", mNumOfBitShift));
   DebugDisplayReOrderTable (CpuApicIdOrderTable);
 
+  if (TempCpuApicIdOrderTable != NULL) {
+    FreePool (TempCpuApicIdOrderTable);
+  }
+
   return Status;
 }
 
-- 
2.32.0.windows.2



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Re: [edk2-devel] [edk2-platforms: PATCH] BIOS needs to present cores in order of relative performance in MADT
Posted by Pedro Falcato 2 weeks, 3 days ago
On Thu, Nov 17, 2022 at 6:01 AM JackX Lin <JackX.Lin@intel.com> wrote:

> BIOS should keep MADT ordering by big core first then small core
>

Hi Jack,

Can you please elaborate why this is required? AFAIK nowhere in the ACPI
spec does it say you need to order by big-little cores.
Is this some sort of regression for a specific OS? A useful commit message
and/or some comments would be really useful here for posterity.

Thanks,
Pedro Falcato


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Re: [edk2-devel] [edk2-platforms: PATCH] BIOS needs to present cores in order of relative performance in MADT
Posted by JackX Lin 2 weeks, 2 days ago
Hi Pedro,

Yes, it is for  some specific test tools.

There are different performance between CPU cores, and the big cores are better than small cores.
Some legacy tools are executing with the highest performance CPU cores, In early CPU design, it is usually the first one.

We have to put them at the front of all CPU cores, otherwise some tests cannot pass.
Due to avoid this happened, we need to ensure CPU cores are ordered by big core first.

Best regards
Jack
From: Pedro Falcato <pedro.falcato@gmail.com>
Sent: Thursday, November 17, 2022 10:09 PM
To: devel@edk2.groups.io; Lin, JackX <jackx.lin@intel.com>
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Oram, Isaac W <isaac.w.oram@intel.com>; Gao, Liming <gaoliming@byosoft.com.cn>; Dong, Eric <eric.dong@intel.com>; Kuo, Donald <donald.kuo@intel.com>; Kumar, Chandana C <chandana.c.kumar@intel.com>
Subject: Re: [edk2-devel] [edk2-platforms: PATCH] BIOS needs to present cores in order of relative performance in MADT

On Thu, Nov 17, 2022 at 6:01 AM JackX Lin <JackX.Lin@intel.com<mailto:JackX.Lin@intel.com>> wrote:
BIOS should keep MADT ordering by big core first then small core

Hi Jack,

Can you please elaborate why this is required? AFAIK nowhere in the ACPI spec does it say you need to order by big-little cores.
Is this some sort of regression for a specific OS? A useful commit message and/or some comments would be really useful here for posterity.

Thanks,
Pedro Falcato


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Re: [edk2-devel] [edk2-platforms: PATCH] BIOS needs to present cores in order of relative performance in MADT
Posted by Pedro Falcato 2 weeks, 1 day ago
On Fri, Nov 18, 2022 at 8:35 AM Lin, JackX <jackx.lin@intel.com> wrote:

> Hi Pedro,
>
>
>
> Yes, it is for  some specific test tools.
>
>
>
> There are different performance between CPU cores, and the big cores are
> better than small cores.
>
> Some legacy tools are executing with the highest performance CPU cores, In
> early CPU design, it is usually the first one.
>
>
>
> We have to put them at the front of all CPU cores, otherwise some tests
> cannot pass.
>
> Due to avoid this happened, we need to ensure CPU cores are ordered by big
> core first.
>

Thank you for the thorough description. Could you please (or whoever is
pushing this) add this to the commit message?
I've been following the evolution of this specific file over the last few
months with mild interest and getting things properly documented should be
pretty important!
Might help avoid any future breakage too :D

Thanks,
Pedro


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Re: [edk2-devel] [edk2-platforms: PATCH] BIOS needs to present cores in order of relative performance in MADT
Posted by Ni, Ray 1 week, 5 days ago
Pedro.
Thanks for the comments.

I agree that detailed commit message helps to explain that this MADT order change is to help some
legacy APPs that assume the high performance cores are before low performance ones in MADT
and use OS APIs to explicitly request running on certain target cpu cores to get higher APP performance.

Thanks,
Ray

From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Pedro Falcato
Sent: Saturday, November 19, 2022 3:11 AM
To: Lin, JackX <jackx.lin@intel.com>
Cc: devel@edk2.groups.io; Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Oram, Isaac W <isaac.w.oram@intel.com>; Gao, Liming <gaoliming@byosoft.com.cn>; Dong, Eric <eric.dong@intel.com>; Kuo, Donald <donald.kuo@intel.com>; Kumar, Chandana C <chandana.c.kumar@intel.com>
Subject: Re: [edk2-devel] [edk2-platforms: PATCH] BIOS needs to present cores in order of relative performance in MADT


On Fri, Nov 18, 2022 at 8:35 AM Lin, JackX <jackx.lin@intel.com<mailto:jackx.lin@intel.com>> wrote:
Hi Pedro,

Yes, it is for  some specific test tools.

There are different performance between CPU cores, and the big cores are better than small cores.
Some legacy tools are executing with the highest performance CPU cores, In early CPU design, it is usually the first one.

We have to put them at the front of all CPU cores, otherwise some tests cannot pass.
Due to avoid this happened, we need to ensure CPU cores are ordered by big core first.

Thank you for the thorough description. Could you please (or whoever is pushing this) add this to the commit message?
I've been following the evolution of this specific file over the last few months with mild interest and getting things properly documented should be pretty important!
Might help avoid any future breakage too :D

Thanks,
Pedro



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Re: [edk2-devel] [edk2-platforms: PATCH] BIOS needs to present cores in order of relative performance in MADT
Posted by Michael D Kinney 2 weeks, 3 days ago
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>

Mike


> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of JackX Lin
> Sent: Wednesday, November 16, 2022 10:01 PM
> To: devel@edk2.groups.io
> Cc: Lin, JackX <jackx.lin@intel.com>; Lin, JackX <jackx.lin@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>; Desimone,
> Nathaniel L <nathaniel.l.desimone@intel.com>; Oram, Isaac W <isaac.w.oram@intel.com>; Gao, Liming <gaoliming@byosoft.com.cn>;
> Dong, Eric <eric.dong@intel.com>; Kuo, Donald <donald.kuo@intel.com>; Kumar, Chandana C <chandana.c.kumar@intel.com>
> Subject: [edk2-devel] [edk2-platforms: PATCH] BIOS needs to present cores in order of relative performance in MADT
> 
> BIOS should keep MADT ordering by big core first then small core
> 
> Signed-off-by: JackX Lin <JackX.Lin@intel.com>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Isaac Oram <isaac.w.oram@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Donald Kuo <Donald.Kuo@intel.com>
> Cc: Chandana C Kumar <chandana.c.kumar@intel.com>
> Cc: JackX Lin <JackX.Lin@intel.com>
> ---
>  Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 111
> ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------
>  1 file changed, 104 insertions(+), 7 deletions(-)
> 
> diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> index 6e57b638e0..894790f246 100644
> --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> @@ -18,6 +18,7 @@ typedef struct {
>    UINT32   Flags;
>    UINT32   SocketNum;
>    UINT32   Thread;
> +  UINT8    CpuCoreType;
>  } EFI_CPU_ID_ORDER_MAP;
> 
>  //
> @@ -131,6 +132,49 @@ AppendCpuMapTableEntry (
> 
>  }
> 
> +/**
> +  Function will go through all processors to identify Core or Atom
> +  by checking Core Type and update in IsBigCore.
> +
> +  @param[in] CpuApicIdOrderTable         Point to a buffer which will be filled in Core type information.
> +**/
> +VOID
> +STATIC
> +EFIAPI
> +CollectCpuCoreType (
> +  IN EFI_CPU_ID_ORDER_MAP        *CpuApicIdOrderTable
> +  )
> +{
> +  CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EDX     Edx;
> +  UINT32                                          Eax;
> +  UINTN                                           ApNumber;
> +  EFI_STATUS                                      Status;
> +  UINT8                                           CoreType;
> +
> +  Status = mMpService->WhoAmI (
> +                         mMpService,
> +                         &ApNumber
> +                         );
> +  ASSERT_EFI_ERROR (Status);
> +
> +  ///
> +  /// Check Hetero feature is supported
> +  /// with CPUID.(EAX=7,ECX=0):EDX[15]=1
> +  ///
> +  AsmCpuidEx (CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, 0, NULL, NULL, NULL, &Edx.Uint32);
> +  if (Edx.Bits.Hybrid == 1) {
> +    //
> +    // Check which is the running core by reading CPUID.(EAX=1AH, ECX=00H):EAX
> +    //
> +    AsmCpuid (CPUID_HYBRID_INFORMATION, &Eax, NULL, NULL, NULL);
> +    CoreType = (UINT8) ((Eax & 0xFF000000) >> 24);
> +  } else {
> +    CoreType = CPUID_CORE_TYPE_INTEL_CORE;
> +  }
> +
> +  CpuApicIdOrderTable[ApNumber].CpuCoreType = CoreType;
> +}
> +
>  /**
>    Collect all processors information and create a Cpu Apic Id table.
> 
> @@ -138,7 +182,7 @@ AppendCpuMapTableEntry (
>  **/
>  EFI_STATUS
>  CreateCpuLocalApicInTable (
> -  IN EFI_CPU_ID_ORDER_MAP *CpuApicIdOrderTable
> +  IN EFI_CPU_ID_ORDER_MAP                   *CpuApicIdOrderTable
>    )
>  {
>    EFI_STATUS                                Status;
> @@ -146,9 +190,24 @@ CreateCpuLocalApicInTable (
>    UINT32                                    Index;
>    UINT32                                    CurrProcessor;
>    EFI_CPU_ID_ORDER_MAP                      *CpuIdMapPtr;
> +  EFI_CPU_ID_ORDER_MAP                      *TempCpuApicIdOrderTable;
>    UINT32                                    Socket;
> 
> -  Status     = EFI_SUCCESS;
> +  TempCpuApicIdOrderTable = AllocateZeroPool (mNumberOfCpus * sizeof (EFI_CPU_ID_ORDER_MAP));
> +  if (TempCpuApicIdOrderTable == NULL) {
> +    return EFI_UNSUPPORTED;
> +  }
> +
> +  CollectCpuCoreType (TempCpuApicIdOrderTable);
> +  mMpService->StartupAllAPs (
> +                mMpService,                               // This
> +                (EFI_AP_PROCEDURE) CollectCpuCoreType,    // Procedure
> +                TRUE,                                     // SingleThread
> +                NULL,                                     // WaitEvent
> +                0,                                        // TimeoutInMicrosecsond
> +                TempCpuApicIdOrderTable,                  // ProcedureArgument
> +                NULL                                      // FailedCpuList
> +                );
> 
>    for (CurrProcessor = 0, Index = 0; CurrProcessor < mNumberOfCpus; CurrProcessor++, Index++) {
>      Status = mMpService->GetProcessorInfo (
> @@ -157,9 +216,9 @@ CreateCpuLocalApicInTable (
>                             &ProcessorInfoBuffer
>                             );
> 
> -    CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *) &CpuApicIdOrderTable[Index];
> +    CpuIdMapPtr = (EFI_CPU_ID_ORDER_MAP *) &TempCpuApicIdOrderTable[Index];
>      if ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0) {
> -      CpuIdMapPtr->ApicId  = (UINT32)ProcessorInfoBuffer.ProcessorId;
> +      CpuIdMapPtr->ApicId  = (UINT32) ProcessorInfoBuffer.ProcessorId;
>        CpuIdMapPtr->Thread  = ProcessorInfoBuffer.Location.Thread;
>        CpuIdMapPtr->Flags   = ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) != 0);
>        CpuIdMapPtr->SocketNum = ProcessorInfoBuffer.Location.Package;
> @@ -184,22 +243,60 @@ CreateCpuLocalApicInTable (
>    //
>    DEBUG ((DEBUG_INFO, "BspApicId - 0x%x\n", GetApicId ()));
> 
> -
>    //
>    // Fill in AcpiProcessorUid.
>    //
>    for (Socket = 0; Socket < FixedPcdGet32 (PcdMaxCpuSocketCount); Socket++) {
>      for (CurrProcessor = 0, Index = 0; CurrProcessor < mNumberOfCpus; CurrProcessor++) {
> -      if (CpuApicIdOrderTable[CurrProcessor].Flags && (CpuApicIdOrderTable[CurrProcessor].SocketNum == Socket)) {
> -        CpuApicIdOrderTable[CurrProcessor].AcpiProcessorUid = (CpuApicIdOrderTable[CurrProcessor].SocketNum <<
> mNumOfBitShift) + Index;
> +      if (TempCpuApicIdOrderTable[CurrProcessor].Flags && (TempCpuApicIdOrderTable[CurrProcessor].SocketNum == Socket)) {
> +        TempCpuApicIdOrderTable[CurrProcessor].AcpiProcessorUid = (TempCpuApicIdOrderTable[CurrProcessor].SocketNum <<
> mNumOfBitShift) + Index;
>          Index++;
>        }
>      }
>    }
> 
> +  //
> +  // Re-ordering Cpu cores information to CpuApicIdOrderTable
> +  // by big core first, then small core.
> +  //
> +  for (Index = 0, CurrProcessor = 0; Index < mNumberOfCpus; Index++) {
> +    if (TempCpuApicIdOrderTable[Index].CpuCoreType == CPUID_CORE_TYPE_INTEL_CORE) {
> +      CopyMem (&CpuApicIdOrderTable[CurrProcessor], &TempCpuApicIdOrderTable[Index], sizeof (EFI_CPU_ID_ORDER_MAP));
> +      CurrProcessor++;
> +    }
> +  }
> +
> +  for (Index = 0; Index < mNumberOfCpus; Index++) {
> +    if (TempCpuApicIdOrderTable[Index].CpuCoreType == CPUID_CORE_TYPE_INTEL_ATOM) {
> +      CopyMem (&CpuApicIdOrderTable[CurrProcessor], &TempCpuApicIdOrderTable[Index], sizeof (EFI_CPU_ID_ORDER_MAP));
> +      CurrProcessor++;
> +    }
> +  }
> +
> +  //
> +  // Add unknown cpu core types to the bottom of the table
> +  //
> +  for (Index = 0; Index < mNumberOfCpus; Index++) {
> +    if ((TempCpuApicIdOrderTable[Index].CpuCoreType != CPUID_CORE_TYPE_INTEL_CORE) &&
> (TempCpuApicIdOrderTable[Index].CpuCoreType != CPUID_CORE_TYPE_INTEL_ATOM)) {
> +      DEBUG ((
> +        DEBUG_INFO,
> +        "Unknown Cpu Core type found: Apic = 0x%x, CoreType = 0x%x\n",
> +        TempCpuApicIdOrderTable[Index].ApicId,
> +        TempCpuApicIdOrderTable[Index].CpuCoreType
> +        ));
> +
> +      CopyMem (&CpuApicIdOrderTable[CurrProcessor], &TempCpuApicIdOrderTable[Index], sizeof (EFI_CPU_ID_ORDER_MAP));
> +      CurrProcessor++;
> +    }
> +  }
> +
>    DEBUG ((DEBUG_INFO, "::ACPI::  APIC ID Order Table Init.   mNumOfBitShift = %x\n", mNumOfBitShift));
>    DebugDisplayReOrderTable (CpuApicIdOrderTable);
> 
> +  if (TempCpuApicIdOrderTable != NULL) {
> +    FreePool (TempCpuApicIdOrderTable);
> +  }
> +
>    return Status;
>  }
> 
> --
> 2.32.0.windows.2
> 
> 
> 
> 
> 



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