As the MDIO ACPI binding in DSDT is now established,
add description for the SMI and XSMI controllers, along
with the 10G and 1G PHYs.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 53 ++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
index bdc32983d3..d26945d933 100644
--- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
@@ -228,6 +228,56 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
})
}
+ Device (SMI0)
+ {
+ Name (_HID, "MRVL0100") // _HID: Hardware ID
+ Name (_UID, 0x00) // _UID: Unique ID
+ Name (_CRS, ResourceTemplate ()
+ {
+ Memory32Fixed (ReadWrite,
+ 0xf212a200, // Address Base
+ 0x00000010, // Address Length
+ )
+ })
+ Device (PHY0)
+ {
+ Name (_ADR, 0x0)
+ }
+ }
+
+ Device (XSMI)
+ {
+ Name (_HID, "MRVL0101") // _HID: Hardware ID
+ Name (_UID, 0x00) // _UID: Unique ID
+ Name (_CRS, ResourceTemplate ()
+ {
+ Memory32Fixed (ReadWrite,
+ 0xf212a600, // Address Base
+ 0x00000010, // Address Length
+ )
+ })
+ Device (PHY0)
+ {
+ Name (_ADR, 0x0)
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "compatible", "ethernet-phy-ieee802.3-c45" },
+ }
+ })
+ }
+ Device (PHY8)
+ {
+ Name (_ADR, 0x8)
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "compatible", "ethernet-phy-ieee802.3-c45" },
+ }
+ })
+ }
+ }
+
Device (PP20)
{
Name (_HID, "MRVL0110") // _HID: Hardware ID
@@ -261,6 +311,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
Package () { "port-id", 0 },
Package () { "gop-port-id", 0 },
Package () { "phy-mode", "10gbase-kr"},
+ Package () { "phy-handle", \_SB.XSMI.PHY0},
}
})
}
@@ -299,6 +350,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
Package () { "port-id", 0 },
Package () { "gop-port-id", 0 },
Package () { "phy-mode", "10gbase-kr"},
+ Package () { "phy-handle", \_SB.XSMI.PHY8},
}
})
}
@@ -318,6 +370,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
Package () { "port-id", 1 },
Package () { "gop-port-id", 2 },
Package () { "phy-mode", "sgmii"},
+ Package () { "phy-handle", \_SB.SMI0.PHY0},
}
})
}
--
2.29.0
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#76447): https://edk2.groups.io/g/devel/message/76447
Mute This Topic: https://groups.io/mt/83513509/1787277
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org]
-=-=-=-=-=-=-=-=-=-=-=-
Tested-by: Grzegorz Bernacki <gjb@semihalf.com>
regards,
greg
niedz., 13 cze 2021 o 20:17 Marcin Wojtas <mw@semihalf.com> napisał(a):
>
> As the MDIO ACPI binding in DSDT is now established,
> add description for the SMI and XSMI controllers, along
> with the 10G and 1G PHYs.
>
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 53 ++++++++++++++++++++
> 1 file changed, 53 insertions(+)
>
> diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> index bdc32983d3..d26945d933 100644
> --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> @@ -228,6 +228,56 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> })
> }
>
> + Device (SMI0)
> + {
> + Name (_HID, "MRVL0100") // _HID: Hardware ID
> + Name (_UID, 0x00) // _UID: Unique ID
> + Name (_CRS, ResourceTemplate ()
> + {
> + Memory32Fixed (ReadWrite,
> + 0xf212a200, // Address Base
> + 0x00000010, // Address Length
> + )
> + })
> + Device (PHY0)
> + {
> + Name (_ADR, 0x0)
> + }
> + }
> +
> + Device (XSMI)
> + {
> + Name (_HID, "MRVL0101") // _HID: Hardware ID
> + Name (_UID, 0x00) // _UID: Unique ID
> + Name (_CRS, ResourceTemplate ()
> + {
> + Memory32Fixed (ReadWrite,
> + 0xf212a600, // Address Base
> + 0x00000010, // Address Length
> + )
> + })
> + Device (PHY0)
> + {
> + Name (_ADR, 0x0)
> + Name (_DSD, Package () {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () { "compatible", "ethernet-phy-ieee802.3-c45" },
> + }
> + })
> + }
> + Device (PHY8)
> + {
> + Name (_ADR, 0x8)
> + Name (_DSD, Package () {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () { "compatible", "ethernet-phy-ieee802.3-c45" },
> + }
> + })
> + }
> + }
> +
> Device (PP20)
> {
> Name (_HID, "MRVL0110") // _HID: Hardware ID
> @@ -261,6 +311,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Package () { "port-id", 0 },
> Package () { "gop-port-id", 0 },
> Package () { "phy-mode", "10gbase-kr"},
> + Package () { "phy-handle", \_SB.XSMI.PHY0},
> }
> })
> }
> @@ -299,6 +350,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Package () { "port-id", 0 },
> Package () { "gop-port-id", 0 },
> Package () { "phy-mode", "10gbase-kr"},
> + Package () { "phy-handle", \_SB.XSMI.PHY8},
> }
> })
> }
> @@ -318,6 +370,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Package () { "port-id", 1 },
> Package () { "gop-port-id", 2 },
> Package () { "phy-mode", "sgmii"},
> + Package () { "phy-handle", \_SB.SMI0.PHY0},
> }
> })
> }
> --
> 2.29.0
>
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#77634): https://edk2.groups.io/g/devel/message/77634
Mute This Topic: https://groups.io/mt/83513509/1787277
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org]
-=-=-=-=-=-=-=-=-=-=-=-
© 2016 - 2026 Red Hat, Inc.