o Add SMBIOS 3.4.0 tables using ArmPkg/Universal/Smbios.
o Bump the PcdSmbiosVersion PCD from 0x300 to 0x304 to indicate support
for SMBIOS 3.4.0, as is required by SBBR.
o Add an implementation of OemMiscLib that provides the system
information. The serial numbers, asset tags etc. are currently all
fixed strings, to allow fwts to pass without errors.
o Add SMBIOS PCDs to identify the platform. The processor serial
number, asset tag and part number are populated because otherwise
fwts reports errors.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 242 ++++++++++++++++++++
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf | 53 +++++
Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 48 +++-
Platform/Qemu/SbsaQemu/SbsaQemu.fdf | 7 +
Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 18 ++
5 files changed, 367 insertions(+), 1 deletion(-)
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
new file mode 100644
index 000000000000..2244e04d0e43
--- /dev/null
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
@@ -0,0 +1,242 @@
+/** @file
+* OemMiscLib.c
+*
+* Copyright (c) 2021, NUVIA Inc. All rights reserved.
+* Copyright (c) 2020, Linaro Ltd. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Uefi.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/FdtHelperLib.h>
+#include <Library/HiiLib.h>
+#include <Library/IoLib.h>
+#include <Library/OemMiscLib.h>
+#include <Library/PcdLib.h>
+#include <Library/SerialPortLib.h>
+#include <Library/TimerLib.h>
+#include <libfdt.h>
+
+/** Returns whether the specified processor is present or not.
+
+ @param ProcessorIndex The processor index to check.
+
+ @return TRUE if the processor is present, FALSE otherwise.
+**/
+BOOLEAN
+EFIAPI
+OemIsProcessorPresent (
+ UINTN ProcessorIndex
+ )
+{
+ if (ProcessorIndex < CountCpusFromFdt ()) {
+ return TRUE;
+ }
+
+ return FALSE;
+}
+
+/** Gets the CPU frequency of the specified processor.
+
+ @param ProcessorIndex Index of the processor to get the frequency for.
+
+ @return CPU frequency in Hz
+**/
+UINTN
+EFIAPI
+OemGetCpuFreq (
+ UINT8 ProcessorIndex
+ )
+{
+ return 2000000000; // 2 GHz
+}
+
+/** Gets information about the specified processor and stores it in
+ the structures provided.
+
+ @param ProcessorIndex Index of the processor to get the information for.
+ @param ProcessorStatus Processor status.
+ @param ProcessorCharacteristics Processor characteritics.
+ @param MiscProcessorData Miscellaneous processor information.
+
+ @return TRUE on success, FALSE on failure.
+**/
+BOOLEAN
+EFIAPI
+OemGetProcessorInformation (
+ IN UINTN ProcessorIndex,
+ IN OUT PROCESSOR_STATUS_DATA *ProcessorStatus,
+ IN OUT PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristics,
+ IN OUT OEM_MISC_PROCESSOR_DATA *MiscProcessorData
+ )
+{
+ UINT16 ProcessorCount;
+
+ ProcessorCount = CountCpusFromFdt ();
+
+ if (ProcessorIndex < ProcessorCount) {
+ ProcessorStatus->Bits.CpuStatus = 1; // CPU enabled
+ ProcessorStatus->Bits.Reserved1 = 0;
+ ProcessorStatus->Bits.SocketPopulated = 1;
+ ProcessorStatus->Bits.Reserved2 = 0;
+ } else {
+ ProcessorStatus->Bits.CpuStatus = 0; // CPU disabled
+ ProcessorStatus->Bits.Reserved1 = 0;
+ ProcessorStatus->Bits.SocketPopulated = 0;
+ ProcessorStatus->Bits.Reserved2 = 0;
+ }
+
+ ProcessorCharacteristics->ProcessorReserved1 = 0;
+ ProcessorCharacteristics->ProcessorUnknown = 0;
+ ProcessorCharacteristics->Processor64BitCapable = 1;
+ ProcessorCharacteristics->ProcessorMultiCore = 0;
+ ProcessorCharacteristics->ProcessorHardwareThread = 0;
+ ProcessorCharacteristics->ProcessorExecuteProtection = 1;
+ ProcessorCharacteristics->ProcessorEnhancedVirtualization = 0;
+ ProcessorCharacteristics->ProcessorPowerPerformanceCtrl = 0;
+ ProcessorCharacteristics->Processor128BitCapable = 0;
+ ProcessorCharacteristics->ProcessorArm64SocId = 1;
+ ProcessorCharacteristics->ProcessorReserved2 = 0;
+
+ MiscProcessorData->CurrentSpeed = 2000;
+ MiscProcessorData->MaxSpeed = 2000;
+ MiscProcessorData->CoreCount = 1;
+ MiscProcessorData->CoresEnabled = 1;
+ MiscProcessorData->ThreadCount = 1;
+
+ return TRUE;
+}
+
+/** Gets the maximum number of processors supported by the platform.
+
+ @return The maximum number of processors.
+**/
+UINT8
+EFIAPI
+OemGetMaxProcessors (
+ VOID
+ )
+{
+ return CountCpusFromFdt ();
+}
+
+/** Gets information about the cache at the specified cache level.
+
+ @param ProcessorIndex The processor to get information for.
+ @param CacheLevel The cache level to get information for.
+ @param DataCache Whether the cache is a data cache.
+ @param UnifiedCache Whether the cache is a unified cache.
+ @param SmbiosCacheTable The SMBIOS Type7 cache information structure.
+
+ @return TRUE on success, FALSE on failure.
+**/
+BOOLEAN
+EFIAPI
+OemGetCacheInformation (
+ IN UINT8 ProcessorIndex,
+ IN UINT8 CacheLevel,
+ IN BOOLEAN DataCache,
+ IN BOOLEAN UnifiedCache,
+ IN OUT SMBIOS_TABLE_TYPE7 *SmbiosCacheTable
+ )
+{
+ SmbiosCacheTable->CacheConfiguration = CacheLevel - 1;
+
+ if (CacheLevel == 1 && !DataCache && !UnifiedCache) {
+ // Unknown operational mode
+ SmbiosCacheTable->CacheConfiguration |= (3 << 8);
+ } else {
+ // Write back operational mode
+ SmbiosCacheTable->CacheConfiguration |= (1 << 8);
+ }
+
+ return TRUE;
+}
+
+/** Gets the type of chassis for the system.
+
+ @retval The type of the chassis.
+**/
+MISC_CHASSIS_TYPE
+EFIAPI
+OemGetChassisType (
+ VOID
+ )
+{
+ return MiscChassisTypeMainServerChassis;
+}
+
+/** Updates the HII string for the specified field.
+
+ @param mHiiHandle The HII handle.
+ @param TokenToUpdate The string to update.
+ @param Field The field to get information about.
+**/
+VOID
+EFIAPI
+OemUpdateSmbiosInfo (
+ IN EFI_HII_HANDLE mHiiHandle,
+ IN EFI_STRING_ID TokenToUpdate,
+ IN OEM_MISC_SMBIOS_HII_STRING_FIELD Field
+ )
+{
+ CHAR16 *String;
+
+ // These values are fixed for now, but should be configurable via
+ // something like an emulated SCP.
+ switch (Field) {
+ case SystemManufacturerType01:
+ String = (CHAR16*)PcdGetPtr (PcdSystemManufacturer);
+ break;
+ case SerialNumType01:
+ String = (CHAR16*)PcdGetPtr (PcdSystemSerialNumber);
+ break;
+ case SkuNumberType01:
+ String = (CHAR16*)PcdGetPtr (PcdSystemSKU);
+ break;
+ case FamilyType01:
+ String = (CHAR16*)PcdGetPtr (PcdSystemFamily);
+ break;
+ case AssertTagType02:
+ String = (CHAR16*)PcdGetPtr (PcdBaseBoardAssetTag);
+ break;
+ case SerialNumberType02:
+ String = (CHAR16*)PcdGetPtr (PcdBaseBoardSerialNumber);
+ break;
+ case BoardManufacturerType02:
+ String = (CHAR16*)PcdGetPtr (PcdBaseBoardManufacturer);
+ break;
+ case SkuNumberType02:
+ String = (CHAR16*)PcdGetPtr (PcdBaseBoardSKU);
+ break;
+ case ChassisLocationType02:
+ String = (CHAR16*)PcdGetPtr (PcdBaseBoardLocation);
+ break;
+ case SerialNumberType03:
+ String = (CHAR16*)PcdGetPtr (PcdChassisSerialNumber);
+ break;
+ case VersionType03:
+ String = (CHAR16*)PcdGetPtr (PcdChassisVersion);
+ break;
+ case ManufacturerType03:
+ String = (CHAR16*)PcdGetPtr (PcdChassisManufacturer);
+ break;
+ case AssetTagType03:
+ String = (CHAR16*)PcdGetPtr (PcdChassisAssetTag);
+ break;
+ case SkuNumberType03:
+ String = (CHAR16*)PcdGetPtr (PcdChassisSKU);
+ break;
+ default:
+ String = NULL;
+ break;
+ }
+
+ if (String != NULL) {
+ HiiSetString (mHiiHandle, TokenToUpdate, String, NULL);
+ }
+}
+
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
new file mode 100644
index 000000000000..04a07a55cee9
--- /dev/null
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
@@ -0,0 +1,53 @@
+#/** @file
+# OemMiscLib.inf
+#
+# Copyright (c) 2021, NUVIA Inc. All rights reserved.
+# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2018, Linaro Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+ INF_VERSION = 1.29
+ BASE_NAME = OemMiscLib
+ FILE_GUID = 958caf90-9e55-4e2a-86e0-71da21485e2c
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = OemMiscLib
+
+[Sources.common]
+ OemMiscLib.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Qemu/SbsaQemu/SbsaQemu.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ FdtLib
+ FdtHelperLib
+ IoLib
+ PcdLib
+
+[Pcd]
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
+
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSKU
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemFamily
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardAssetTag
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardSerialNumber
+ gArmTokenSpaceGuid.PcdBaseBoardManufacturer
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardSKU
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardLocation
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSerialNumber
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisVersion
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisManufacturer
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisAssetTag
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSKU
diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
index 8faad3eda217..c1f8a4696560 100644
--- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
+++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
@@ -1,4 +1,5 @@
#
+# Copyright (c) 2021, NUVIA Inc. All rights reserved.
# Copyright (c) 2019, Linaro Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -122,6 +123,7 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE
PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
+ OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
# Debug Support
PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
@@ -486,6 +488,23 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE
# enumeration to complete before installing ACPI tables.
gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|FALSE
+ gArmTokenSpaceGuid.PcdSystemProductName|L"QEMU SBSA-REF Machine"
+ gArmTokenSpaceGuid.PcdSystemVersion|L"1.0"
+ gArmTokenSpaceGuid.PcdBaseBoardManufacturer|L"QEMU"
+ gArmTokenSpaceGuid.PcdBaseBoardProductName|L"SBSA-REF"
+ gArmTokenSpaceGuid.PcdBaseBoardVersion|L"1.0"
+
+ # These values are fixed for now, but should be configurable via
+ # something like an emulated SCP.
+ gArmTokenSpaceGuid.PcdProcessorManufacturer|L"QEMU"
+ gArmTokenSpaceGuid.PcdProcessorVersion|L"arm-virt"
+ gArmTokenSpaceGuid.PcdProcessorSerialNumber|L"SN0000"
+ gArmTokenSpaceGuid.PcdProcessorAssetTag|L"AT0000"
+ gArmTokenSpaceGuid.PcdProcessorPartNumber|L"PN0000"
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|L"EFI Development Kit II / SbsaQemu"
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"1.0"
+
[PcdsDynamicDefault.common]
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3
@@ -510,9 +529,28 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE
#
# SMBIOS entry point version
#
- gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0300
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0304
gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x0
+ gArmTokenSpaceGuid.PcdSystemBiosRelease|0x0100
+ gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease|0x0100
+
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer|L"QEMU"
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber|L"SN0000"
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSKU|L"SK0000"
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemFamily|L"ArmVirt"
+
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardAssetTag|L"AT0000"
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardSerialNumber|L"SN0000"
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardSKU|L"SK000"
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardLocation|L"Internal"
+
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSerialNumber|L"SN0000"
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisVersion|L"1.0"
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisManufacturer|L"QEMU"
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisAssetTag|L"AT0000"
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSKU|L"SK0000"
+
################################################################################
#
# Components Section - list of all EDK II Modules needed by this Platform
@@ -670,6 +708,14 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE
MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
+ #
+ # SMBIOS support
+ #
+ ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
+ ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
+ EmbeddedPkg/Library/FdtLib/FdtLib.inf
+ MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+
#
# PCI support
#
diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.fdf b/Platform/Qemu/SbsaQemu/SbsaQemu.fdf
index 3bcf0bf0040a..c35e3ed44054 100644
--- a/Platform/Qemu/SbsaQemu/SbsaQemu.fdf
+++ b/Platform/Qemu/SbsaQemu/SbsaQemu.fdf
@@ -236,6 +236,13 @@ READ_LOCK_STATUS = TRUE
INF RuleOverride = ACPITABLE Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
+ #
+ # SMBIOS support
+ #
+ INF ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
+ INF ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
+ INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+
#
# PCI support
#
diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
index 476dc82f98f3..3abc9b64e49e 100644
--- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
+++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
@@ -50,3 +50,21 @@
[PcdsDynamic.common]
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount|0x1|UINT32|0x00000100
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount|0x1|UINT32|0x00000101
+
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer|L""|VOID*|0x00000110
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber|L""|VOID*|0x00000111
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSKU|L""|VOID*|0x00000112
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemFamily|L""|VOID*|0x00000113
+
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardAssetTag|L""|VOID*|0x00000114
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardSerialNumber|L""|VOID*|0x00000115
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardManufacturer|L""|VOID*|0x00000116
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardSKU|L""|VOID*|0x00000117
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardLocation|L""|VOID*|0x00000118
+
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSerialNumber|L""|VOID*|0x00000119
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisVersion|L""|VOID*|0x0000011A
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisManufacturer|L""|VOID*|0x0000011B
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisAssetTag|L""|VOID*|0x0000011C
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSKU|L""|VOID*|0x0000011D
+
--
2.26.2
-=-=-=-=-=-=-=-=-=-=-=-
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-=-=-=-=-=-=-=-=-=-=-=-
On Thu, Feb 18, 2021 at 20:57:41 -0700, Rebecca Cran wrote:
> o Add SMBIOS 3.4.0 tables using ArmPkg/Universal/Smbios.
> o Bump the PcdSmbiosVersion PCD from 0x300 to 0x304 to indicate support
> for SMBIOS 3.4.0, as is required by SBBR.
> o Add an implementation of OemMiscLib that provides the system
> information. The serial numbers, asset tags etc. are currently all
> fixed strings, to allow fwts to pass without errors.
> o Add SMBIOS PCDs to identify the platform. The processor serial
> number, asset tag and part number are populated because otherwise
> fwts reports errors.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
> ---
> Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 242 ++++++++++++++++++++
> Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf | 53 +++++
> Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 48 +++-
> Platform/Qemu/SbsaQemu/SbsaQemu.fdf | 7 +
> Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 18 ++
> 5 files changed, 367 insertions(+), 1 deletion(-)
>
> diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> new file mode 100644
> index 000000000000..2244e04d0e43
> --- /dev/null
> +++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> @@ -0,0 +1,242 @@
> +/** @file
> +* OemMiscLib.c
> +*
> +* Copyright (c) 2021, NUVIA Inc. All rights reserved.
> +* Copyright (c) 2020, Linaro Ltd. All rights reserved.
> +*
> +* SPDX-License-Identifier: BSD-2-Clause-Patent
> +*
> +**/
> +
> +#include <Uefi.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/FdtHelperLib.h>
> +#include <Library/HiiLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/OemMiscLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/SerialPortLib.h>
> +#include <Library/TimerLib.h>
> +#include <libfdt.h>
> +
> +/** Returns whether the specified processor is present or not.
> +
> + @param ProcessorIndex The processor index to check.
> +
> + @return TRUE if the processor is present, FALSE otherwise.
> +**/
> +BOOLEAN
> +EFIAPI
> +OemIsProcessorPresent (
> + UINTN ProcessorIndex
> + )
> +{
> + if (ProcessorIndex < CountCpusFromFdt ()) {
> + return TRUE;
> + }
> +
> + return FALSE;
> +}
> +
> +/** Gets the CPU frequency of the specified processor.
> +
> + @param ProcessorIndex Index of the processor to get the frequency for.
> +
> + @return CPU frequency in Hz
> +**/
> +UINTN
> +EFIAPI
> +OemGetCpuFreq (
> + UINT8 ProcessorIndex
> + )
> +{
> + return 2000000000; // 2 GHz
> +}
> +
> +/** Gets information about the specified processor and stores it in
> + the structures provided.
> +
> + @param ProcessorIndex Index of the processor to get the information for.
> + @param ProcessorStatus Processor status.
> + @param ProcessorCharacteristics Processor characteritics.
> + @param MiscProcessorData Miscellaneous processor information.
> +
> + @return TRUE on success, FALSE on failure.
> +**/
> +BOOLEAN
> +EFIAPI
> +OemGetProcessorInformation (
> + IN UINTN ProcessorIndex,
> + IN OUT PROCESSOR_STATUS_DATA *ProcessorStatus,
> + IN OUT PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristics,
> + IN OUT OEM_MISC_PROCESSOR_DATA *MiscProcessorData
> + )
> +{
> + UINT16 ProcessorCount;
> +
> + ProcessorCount = CountCpusFromFdt ();
> +
> + if (ProcessorIndex < ProcessorCount) {
> + ProcessorStatus->Bits.CpuStatus = 1; // CPU enabled
> + ProcessorStatus->Bits.Reserved1 = 0;
> + ProcessorStatus->Bits.SocketPopulated = 1;
> + ProcessorStatus->Bits.Reserved2 = 0;
> + } else {
> + ProcessorStatus->Bits.CpuStatus = 0; // CPU disabled
> + ProcessorStatus->Bits.Reserved1 = 0;
> + ProcessorStatus->Bits.SocketPopulated = 0;
> + ProcessorStatus->Bits.Reserved2 = 0;
> + }
> +
> + ProcessorCharacteristics->ProcessorReserved1 = 0;
> + ProcessorCharacteristics->ProcessorUnknown = 0;
> + ProcessorCharacteristics->Processor64BitCapable = 1;
> + ProcessorCharacteristics->ProcessorMultiCore = 0;
> + ProcessorCharacteristics->ProcessorHardwareThread = 0;
> + ProcessorCharacteristics->ProcessorExecuteProtection = 1;
> + ProcessorCharacteristics->ProcessorEnhancedVirtualization = 0;
> + ProcessorCharacteristics->ProcessorPowerPerformanceCtrl = 0;
> + ProcessorCharacteristics->Processor128BitCapable = 0;
> + ProcessorCharacteristics->ProcessorArm64SocId = 1;
> + ProcessorCharacteristics->ProcessorReserved2 = 0;
> +
> + MiscProcessorData->CurrentSpeed = 2000;
> + MiscProcessorData->MaxSpeed = 2000;
> + MiscProcessorData->CoreCount = 1;
> + MiscProcessorData->CoresEnabled = 1;
> + MiscProcessorData->ThreadCount = 1;
> +
> + return TRUE;
> +}
> +
> +/** Gets the maximum number of processors supported by the platform.
> +
> + @return The maximum number of processors.
> +**/
> +UINT8
> +EFIAPI
> +OemGetMaxProcessors (
> + VOID
> + )
> +{
> + return CountCpusFromFdt ();
> +}
> +
> +/** Gets information about the cache at the specified cache level.
> +
> + @param ProcessorIndex The processor to get information for.
> + @param CacheLevel The cache level to get information for.
> + @param DataCache Whether the cache is a data cache.
> + @param UnifiedCache Whether the cache is a unified cache.
> + @param SmbiosCacheTable The SMBIOS Type7 cache information structure.
> +
> + @return TRUE on success, FALSE on failure.
> +**/
> +BOOLEAN
> +EFIAPI
> +OemGetCacheInformation (
> + IN UINT8 ProcessorIndex,
> + IN UINT8 CacheLevel,
> + IN BOOLEAN DataCache,
> + IN BOOLEAN UnifiedCache,
> + IN OUT SMBIOS_TABLE_TYPE7 *SmbiosCacheTable
> + )
> +{
> + SmbiosCacheTable->CacheConfiguration = CacheLevel - 1;
> +
> + if (CacheLevel == 1 && !DataCache && !UnifiedCache) {
> + // Unknown operational mode
> + SmbiosCacheTable->CacheConfiguration |= (3 << 8);
> + } else {
> + // Write back operational mode
> + SmbiosCacheTable->CacheConfiguration |= (1 << 8);
> + }
> +
> + return TRUE;
> +}
> +
> +/** Gets the type of chassis for the system.
> +
> + @retval The type of the chassis.
> +**/
> +MISC_CHASSIS_TYPE
> +EFIAPI
> +OemGetChassisType (
> + VOID
> + )
> +{
> + return MiscChassisTypeMainServerChassis;
> +}
> +
> +/** Updates the HII string for the specified field.
> +
> + @param mHiiHandle The HII handle.
> + @param TokenToUpdate The string to update.
> + @param Field The field to get information about.
> +**/
> +VOID
> +EFIAPI
> +OemUpdateSmbiosInfo (
> + IN EFI_HII_HANDLE mHiiHandle,
> + IN EFI_STRING_ID TokenToUpdate,
> + IN OEM_MISC_SMBIOS_HII_STRING_FIELD Field
> + )
> +{
> + CHAR16 *String;
> +
> + // These values are fixed for now, but should be configurable via
> + // something like an emulated SCP.
> + switch (Field) {
> + case SystemManufacturerType01:
> + String = (CHAR16*)PcdGetPtr (PcdSystemManufacturer);
> + break;
> + case SerialNumType01:
> + String = (CHAR16*)PcdGetPtr (PcdSystemSerialNumber);
> + break;
> + case SkuNumberType01:
> + String = (CHAR16*)PcdGetPtr (PcdSystemSKU);
> + break;
> + case FamilyType01:
> + String = (CHAR16*)PcdGetPtr (PcdSystemFamily);
> + break;
> + case AssertTagType02:
> + String = (CHAR16*)PcdGetPtr (PcdBaseBoardAssetTag);
> + break;
> + case SerialNumberType02:
> + String = (CHAR16*)PcdGetPtr (PcdBaseBoardSerialNumber);
> + break;
> + case BoardManufacturerType02:
> + String = (CHAR16*)PcdGetPtr (PcdBaseBoardManufacturer);
> + break;
> + case SkuNumberType02:
> + String = (CHAR16*)PcdGetPtr (PcdBaseBoardSKU);
> + break;
> + case ChassisLocationType02:
> + String = (CHAR16*)PcdGetPtr (PcdBaseBoardLocation);
> + break;
> + case SerialNumberType03:
> + String = (CHAR16*)PcdGetPtr (PcdChassisSerialNumber);
> + break;
> + case VersionType03:
> + String = (CHAR16*)PcdGetPtr (PcdChassisVersion);
> + break;
> + case ManufacturerType03:
> + String = (CHAR16*)PcdGetPtr (PcdChassisManufacturer);
> + break;
> + case AssetTagType03:
> + String = (CHAR16*)PcdGetPtr (PcdChassisAssetTag);
> + break;
> + case SkuNumberType03:
> + String = (CHAR16*)PcdGetPtr (PcdChassisSKU);
> + break;
> + default:
> + String = NULL;
> + break;
> + }
> +
> + if (String != NULL) {
> + HiiSetString (mHiiHandle, TokenToUpdate, String, NULL);
> + }
> +}
> +
> diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
> new file mode 100644
> index 000000000000..04a07a55cee9
> --- /dev/null
> +++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
> @@ -0,0 +1,53 @@
> +#/** @file
> +# OemMiscLib.inf
> +#
> +# Copyright (c) 2021, NUVIA Inc. All rights reserved.
> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#**/
> +
> +[Defines]
> + INF_VERSION = 1.29
> + BASE_NAME = OemMiscLib
> + FILE_GUID = 958caf90-9e55-4e2a-86e0-71da21485e2c
> + MODULE_TYPE = BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = OemMiscLib
> +
> +[Sources.common]
> + OemMiscLib.c
> +
> +[Packages]
> + ArmPkg/ArmPkg.dec
> + EmbeddedPkg/EmbeddedPkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + Silicon/Qemu/SbsaQemu/SbsaQemu.dec
> +
> +[LibraryClasses]
> + BaseMemoryLib
> + FdtLib
> + FdtHelperLib
> + IoLib
> + PcdLib
> +
> +[Pcd]
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
> +
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSKU
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemFamily
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardAssetTag
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardSerialNumber
> + gArmTokenSpaceGuid.PcdBaseBoardManufacturer
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardSKU
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardLocation
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSerialNumber
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisVersion
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisManufacturer
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisAssetTag
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSKU
> diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
> index 8faad3eda217..c1f8a4696560 100644
> --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
> +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
> @@ -1,4 +1,5 @@
> #
> +# Copyright (c) 2021, NUVIA Inc. All rights reserved.
> # Copyright (c) 2019, Linaro Limited. All rights reserved.
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> @@ -122,6 +123,7 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE
> PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
>
> FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
> + OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
>
> # Debug Support
> PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
> @@ -486,6 +488,23 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE
> # enumeration to complete before installing ACPI tables.
> gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|FALSE
>
> + gArmTokenSpaceGuid.PcdSystemProductName|L"QEMU SBSA-REF Machine"
> + gArmTokenSpaceGuid.PcdSystemVersion|L"1.0"
> + gArmTokenSpaceGuid.PcdBaseBoardManufacturer|L"QEMU"
> + gArmTokenSpaceGuid.PcdBaseBoardProductName|L"SBSA-REF"
> + gArmTokenSpaceGuid.PcdBaseBoardVersion|L"1.0"
> +
> + # These values are fixed for now, but should be configurable via
> + # something like an emulated SCP.
> + gArmTokenSpaceGuid.PcdProcessorManufacturer|L"QEMU"
> + gArmTokenSpaceGuid.PcdProcessorVersion|L"arm-virt"
> + gArmTokenSpaceGuid.PcdProcessorSerialNumber|L"SN0000"
> + gArmTokenSpaceGuid.PcdProcessorAssetTag|L"AT0000"
> + gArmTokenSpaceGuid.PcdProcessorPartNumber|L"PN0000"
> +
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|L"EFI Development Kit II / SbsaQemu"
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"1.0"
> +
> [PcdsDynamicDefault.common]
> gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3
>
> @@ -510,9 +529,28 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE
> #
> # SMBIOS entry point version
> #
> - gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0300
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0304
> gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x0
>
> + gArmTokenSpaceGuid.PcdSystemBiosRelease|0x0100
> + gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease|0x0100
> +
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer|L"QEMU"
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber|L"SN0000"
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSKU|L"SK0000"
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemFamily|L"ArmVirt"
> +
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardAssetTag|L"AT0000"
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardSerialNumber|L"SN0000"
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardSKU|L"SK000"
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardLocation|L"Internal"
> +
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSerialNumber|L"SN0000"
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisVersion|L"1.0"
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisManufacturer|L"QEMU"
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisAssetTag|L"AT0000"
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSKU|L"SK0000"
> +
> ################################################################################
> #
> # Components Section - list of all EDK II Modules needed by this Platform
> @@ -670,6 +708,14 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE
> MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
> MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
>
> + #
> + # SMBIOS support
> + #
> + ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
> + ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
> + EmbeddedPkg/Library/FdtLib/FdtLib.inf
> + MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
> +
> #
> # PCI support
> #
> diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.fdf b/Platform/Qemu/SbsaQemu/SbsaQemu.fdf
> index 3bcf0bf0040a..c35e3ed44054 100644
> --- a/Platform/Qemu/SbsaQemu/SbsaQemu.fdf
> +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.fdf
> @@ -236,6 +236,13 @@ READ_LOCK_STATUS = TRUE
> INF RuleOverride = ACPITABLE Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
> INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
>
> + #
> + # SMBIOS support
> + #
> + INF ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
> + INF ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
> + INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
> +
> #
> # PCI support
> #
> diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
> index 476dc82f98f3..3abc9b64e49e 100644
> --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
> +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
> @@ -50,3 +50,21 @@
> [PcdsDynamic.common]
> gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount|0x1|UINT32|0x00000100
> gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount|0x1|UINT32|0x00000101
> +
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer|L""|VOID*|0x00000110
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber|L""|VOID*|0x00000111
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSKU|L""|VOID*|0x00000112
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemFamily|L""|VOID*|0x00000113
> +
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardAssetTag|L""|VOID*|0x00000114
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardSerialNumber|L""|VOID*|0x00000115
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardManufacturer|L""|VOID*|0x00000116
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardSKU|L""|VOID*|0x00000117
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdBaseBoardLocation|L""|VOID*|0x00000118
> +
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSerialNumber|L""|VOID*|0x00000119
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisVersion|L""|VOID*|0x0000011A
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisManufacturer|L""|VOID*|0x0000011B
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisAssetTag|L""|VOID*|0x0000011C
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSKU|L""|VOID*|0x0000011D
> +
> --
> 2.26.2
>
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