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[edk2-devel] [PATCH] MdePkg/include: Add DMAR SATC Table Definition

Sheng Wei posted 1 patch 3 years, 4 months ago
Failed in applying to current master (apply log)
.../IndustryStandard/DmaRemappingReportingTable.h  | 34 ++++++++++++++++++++--
1 file changed, 31 insertions(+), 3 deletions(-)
[edk2-devel] [PATCH] MdePkg/include: Add DMAR SATC Table Definition
Posted by Sheng Wei 3 years, 4 months ago 
SoC Integrated Address Translation Cache (SATC) reporting structure is one
of the Remapping Structure, which is imported since Intel(R) Virtualization
Technology for Directed I/O (VT-D) Architecture Specification v3.2.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3109

Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jenny Huang <jenny.huang@intel.com>
Cc: Kowalewski Robert <robert.kowalewski@intel.com>
Cc: Feng Roger <roger.feng@intel.com>
---
 .../IndustryStandard/DmaRemappingReportingTable.h  | 34 ++++++++++++++++++++--
 1 file changed, 31 insertions(+), 3 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
index 7c50dc972e..48f6959fec 100644
--- a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
+++ b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
@@ -2,13 +2,13 @@
   DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R)
   Virtualization Technology for Directed I/O (VT-D) Architecture Specification.
 
-  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
   @par Revision Reference:
     - Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture
-      Specification v2.5, Dated November 2017.
-      http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf
+      Specification v3.2, Dated October 2020.
+      https://software.intel.com/content/dam/develop/external/us/en/documents/vt-directed-io-spec.pdf
 
   @par Glossary:
     - HPET - High Precision Event Timer
@@ -39,6 +39,7 @@
 #define EFI_ACPI_DMAR_TYPE_ATSR                   0x02
 #define EFI_ACPI_DMAR_TYPE_RHSA                   0x03
 #define EFI_ACPI_DMAR_TYPE_ANDD                   0x04
+#define EFI_ACPI_DMAR_TYPE_SATC                   0x05
 ///@}
 
 ///
@@ -216,6 +217,32 @@ typedef struct {
   UINT8                           AcpiDeviceNumber;
 } EFI_ACPI_DMAR_ANDD_HEADER;
 
+/**
+  An SoC Integrated Address Translation Cache (SATC) reporting structure is
+  defined in section 8.8.
+**/
+typedef struct {
+  EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
+  /**
+    - Bit[0]: ATC_REQUIRED:
+              - If Set, indicates that every SoC integrated device enumerated
+                in this table has a functional requirement to enable its ATC
+                (via the ATS capability) for device operation.
+              - If Clear, any device enumerated in this table can operate when
+                its respective ATC is not enabled (albeit with reduced
+                performance or functionality).
+    - Bits[7:1] Reserved.
+  **/
+  UINT8                           Flags;
+  UINT8                           Reserved;
+  ///
+  /// The PCI Segment associated with this SATC structure. All SoC integrated
+  /// devices within a PCI segment with same value for Flags field must be
+  /// enumerated in the same SATC structure.
+  ///
+  UINT16                          SegmentNumber;
+} EFI_ACPI_DMAR_SATC_HEADER;
+
 /**
   DMA Remapping Reporting Structure Header as defined in section 8.1
   This header will be followed by list of Remapping Structures listed below
@@ -224,6 +251,7 @@ typedef struct {
     - Root Port ATS Capability Reporting (ATSR)
     - Remapping Hardware Static Affinity (RHSA)
     - ACPI Name-space Device Declaration (ANDD)
+    - SoC Integrated Address Translation Cache reporting (SATC)
   These structure types must by reported in numerical order.
   i.e., All remapping structures of type 0 (DRHD) enumerated before remapping
   structures of type 1 (RMRR), and so forth.
-- 
2.16.2.windows.1



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Re: [edk2-devel] [PATCH] MdePkg/include: Add DMAR SATC Table Definition
Posted by Zhiguang Liu 3 years, 4 months ago 
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>

> -----Original Message-----
> From: Sheng, W <w.sheng@intel.com>
> Sent: Friday, December 11, 2020 9:37 AM
> To: devel@edk2.groups.io
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>; Yao,
> Jiewen <jiewen.yao@intel.com>; Huang, Jenny <jenny.huang@intel.com>;
> Kowalewski, Robert <robert.kowalewski@intel.com>; Feng, Roger
> <roger.feng@intel.com>
> Subject: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
> 
> SoC Integrated Address Translation Cache (SATC) reporting structure is one
> of the Remapping Structure, which is imported since Intel(R) Virtualization
> Technology for Directed I/O (VT-D) Architecture Specification v3.2.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3109
> 
> Signed-off-by: Sheng Wei <w.sheng@intel.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Jenny Huang <jenny.huang@intel.com>
> Cc: Kowalewski Robert <robert.kowalewski@intel.com>
> Cc: Feng Roger <roger.feng@intel.com>
> ---
>  .../IndustryStandard/DmaRemappingReportingTable.h  | 34
> ++++++++++++++++++++--
>  1 file changed, 31 insertions(+), 3 deletions(-)
> 
> diff --git a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> index 7c50dc972e..48f6959fec 100644
> --- a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> +++ b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> @@ -2,13 +2,13 @@
>    DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R)
>    Virtualization Technology for Directed I/O (VT-D) Architecture Specification.
> 
> -  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
> +  Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>
>    SPDX-License-Identifier: BSD-2-Clause-Patent
> 
>    @par Revision Reference:
>      - Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture
> -      Specification v2.5, Dated November 2017.
> -
> http://www.intel.com/content/dam/www/public/us/en/documents/product-
> specifications/vt-directed-io-spec.pdf
> +      Specification v3.2, Dated October 2020.
> +
> https://software.intel.com/content/dam/develop/external/us/en/documents/vt-
> directed-io-spec.pdf
> 
>    @par Glossary:
>      - HPET - High Precision Event Timer
> @@ -39,6 +39,7 @@
>  #define EFI_ACPI_DMAR_TYPE_ATSR                   0x02
>  #define EFI_ACPI_DMAR_TYPE_RHSA                   0x03
>  #define EFI_ACPI_DMAR_TYPE_ANDD                   0x04
> +#define EFI_ACPI_DMAR_TYPE_SATC                   0x05
>  ///@}
> 
>  ///
> @@ -216,6 +217,32 @@ typedef struct {
>    UINT8                           AcpiDeviceNumber;
>  } EFI_ACPI_DMAR_ANDD_HEADER;
> 
> +/**
> +  An SoC Integrated Address Translation Cache (SATC) reporting structure is
> +  defined in section 8.8.
> +**/
> +typedef struct {
> +  EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
> +  /**
> +    - Bit[0]: ATC_REQUIRED:
> +              - If Set, indicates that every SoC integrated device enumerated
> +                in this table has a functional requirement to enable its ATC
> +                (via the ATS capability) for device operation.
> +              - If Clear, any device enumerated in this table can operate when
> +                its respective ATC is not enabled (albeit with reduced
> +                performance or functionality).
> +    - Bits[7:1] Reserved.
> +  **/
> +  UINT8                           Flags;
> +  UINT8                           Reserved;
> +  ///
> +  /// The PCI Segment associated with this SATC structure. All SoC integrated
> +  /// devices within a PCI segment with same value for Flags field must be
> +  /// enumerated in the same SATC structure.
> +  ///
> +  UINT16                          SegmentNumber;
> +} EFI_ACPI_DMAR_SATC_HEADER;
> +
>  /**
>    DMA Remapping Reporting Structure Header as defined in section 8.1
>    This header will be followed by list of Remapping Structures listed below
> @@ -224,6 +251,7 @@ typedef struct {
>      - Root Port ATS Capability Reporting (ATSR)
>      - Remapping Hardware Static Affinity (RHSA)
>      - ACPI Name-space Device Declaration (ANDD)
> +    - SoC Integrated Address Translation Cache reporting (SATC)
>    These structure types must by reported in numerical order.
>    i.e., All remapping structures of type 0 (DRHD) enumerated before
> remapping
>    structures of type 1 (RMRR), and so forth.
> --
> 2.16.2.windows.1



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[edk2-devel] 回复: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
Posted by gaoliming 3 years, 4 months ago 
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>

> -----邮件原件-----
> 发件人: Liu, Zhiguang <zhiguang.liu@intel.com>
> 发送时间: 2020年12月11日 10:51
> 收件人: Sheng, W <w.sheng@intel.com>; devel@edk2.groups.io
> 抄送: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Yao, Jiewen <jiewen.yao@intel.com>; Huang,
> Jenny <jenny.huang@intel.com>; Kowalewski, Robert
> <robert.kowalewski@intel.com>; Feng, Roger <roger.feng@intel.com>
> 主题: RE: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
> 
> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
> 
> > -----Original Message-----
> > From: Sheng, W <w.sheng@intel.com>
> > Sent: Friday, December 11, 2020 9:37 AM
> > To: devel@edk2.groups.io
> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao
> > <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>; Yao,
> > Jiewen <jiewen.yao@intel.com>; Huang, Jenny <jenny.huang@intel.com>;
> > Kowalewski, Robert <robert.kowalewski@intel.com>; Feng, Roger
> > <roger.feng@intel.com>
> > Subject: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
> >
> > SoC Integrated Address Translation Cache (SATC) reporting structure is
one
> > of the Remapping Structure, which is imported since Intel(R)
Virtualization
> > Technology for Directed I/O (VT-D) Architecture Specification v3.2.
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3109
> >
> > Signed-off-by: Sheng Wei <w.sheng@intel.com>
> > Cc: Michael D Kinney <michael.d.kinney@intel.com>
> > Cc: Liming Gao <gaoliming@byosoft.com.cn>
> > Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> > Cc: Jiewen Yao <jiewen.yao@intel.com>
> > Cc: Jenny Huang <jenny.huang@intel.com>
> > Cc: Kowalewski Robert <robert.kowalewski@intel.com>
> > Cc: Feng Roger <roger.feng@intel.com>
> > ---
> >  .../IndustryStandard/DmaRemappingReportingTable.h  | 34
> > ++++++++++++++++++++--
> >  1 file changed, 31 insertions(+), 3 deletions(-)
> >
> > diff --git
> a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > index 7c50dc972e..48f6959fec 100644
> > --- a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > +++ b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > @@ -2,13 +2,13 @@
> >    DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R)
> >    Virtualization Technology for Directed I/O (VT-D) Architecture
> Specification.
> >
> > -  Copyright (c) 2016 - 2018, Intel Corporation. All rights
reserved.<BR>
> > +  Copyright (c) 2016 - 2020, Intel Corporation. All rights
reserved.<BR>
> >    SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> >    @par Revision Reference:
> >      - Intel(R) Virtualization Technology for Directed I/O (VT-D)
> Architecture
> > -      Specification v2.5, Dated November 2017.
> > -
> >
> http://www.intel.com/content/dam/www/public/us/en/documents/product-
> > specifications/vt-directed-io-spec.pdf
> > +      Specification v3.2, Dated October 2020.
> > +
> >
> https://software.intel.com/content/dam/develop/external/us/en/documents
> /vt-
> > directed-io-spec.pdf
> >
> >    @par Glossary:
> >      - HPET - High Precision Event Timer
> > @@ -39,6 +39,7 @@
> >  #define EFI_ACPI_DMAR_TYPE_ATSR                   0x02
> >  #define EFI_ACPI_DMAR_TYPE_RHSA                   0x03
> >  #define EFI_ACPI_DMAR_TYPE_ANDD                   0x04
> > +#define EFI_ACPI_DMAR_TYPE_SATC                   0x05
> >  ///@}
> >
> >  ///
> > @@ -216,6 +217,32 @@ typedef struct {
> >    UINT8                           AcpiDeviceNumber;
> >  } EFI_ACPI_DMAR_ANDD_HEADER;
> >
> > +/**
> > +  An SoC Integrated Address Translation Cache (SATC) reporting
structure
> is
> > +  defined in section 8.8.
> > +**/
> > +typedef struct {
> > +  EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
> > +  /**
> > +    - Bit[0]: ATC_REQUIRED:
> > +              - If Set, indicates that every SoC integrated device
> enumerated
> > +                in this table has a functional requirement to enable
its
> ATC
> > +                (via the ATS capability) for device operation.
> > +              - If Clear, any device enumerated in this table can
> operate when
> > +                its respective ATC is not enabled (albeit with reduced
> > +                performance or functionality).
> > +    - Bits[7:1] Reserved.
> > +  **/
> > +  UINT8                           Flags;
> > +  UINT8                           Reserved;
> > +  ///
> > +  /// The PCI Segment associated with this SATC structure. All SoC
> integrated
> > +  /// devices within a PCI segment with same value for Flags field must
be
> > +  /// enumerated in the same SATC structure.
> > +  ///
> > +  UINT16                          SegmentNumber;
> > +} EFI_ACPI_DMAR_SATC_HEADER;
> > +
> >  /**
> >    DMA Remapping Reporting Structure Header as defined in section 8.1
> >    This header will be followed by list of Remapping Structures listed
> below
> > @@ -224,6 +251,7 @@ typedef struct {
> >      - Root Port ATS Capability Reporting (ATSR)
> >      - Remapping Hardware Static Affinity (RHSA)
> >      - ACPI Name-space Device Declaration (ANDD)
> > +    - SoC Integrated Address Translation Cache reporting (SATC)
> >    These structure types must by reported in numerical order.
> >    i.e., All remapping structures of type 0 (DRHD) enumerated before
> > remapping
> >    structures of type 1 (RMRR), and so forth.
> > --
> > 2.16.2.windows.1





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Re: [edk2-devel] 回复: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
Posted by Sheng Wei 3 years, 4 months ago 
Hi Liming,
Thank you for the "Reviewed-by".
Could you help to merge the patch to ekd2 master branch ?
Thank you.
BR
Sheng Wei

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
> gaoliming
> Sent: 2020年12月14日 10:49
> To: Liu, Zhiguang <zhiguang.liu@intel.com>; Sheng, W <w.sheng@intel.com>;
> devel@edk2.groups.io
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Yao, Jiewen
> <jiewen.yao@intel.com>; Huang, Jenny <jenny.huang@intel.com>;
> Kowalewski, Robert <robert.kowalewski@intel.com>; Feng, Roger
> <roger.feng@intel.com>
> Subject: [edk2-devel] 回复: [PATCH] MdePkg/include: Add DMAR SATC
> Table Definition
> 
> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
> 
> > -----邮件原件-----
> > 发件人: Liu, Zhiguang <zhiguang.liu@intel.com>
> > 发送时间: 2020年12月11日 10:51
> > 收件人: Sheng, W <w.sheng@intel.com>; devel@edk2.groups.io
> > 抄送: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao
> > <gaoliming@byosoft.com.cn>; Yao, Jiewen <jiewen.yao@intel.com>;
> Huang,
> > Jenny <jenny.huang@intel.com>; Kowalewski, Robert
> > <robert.kowalewski@intel.com>; Feng, Roger <roger.feng@intel.com>
> > 主题: RE: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
> >
> > Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
> >
> > > -----Original Message-----
> > > From: Sheng, W <w.sheng@intel.com>
> > > Sent: Friday, December 11, 2020 9:37 AM
> > > To: devel@edk2.groups.io
> > > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao
> > > <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>;
> > > Yao, Jiewen <jiewen.yao@intel.com>; Huang, Jenny
> > > <jenny.huang@intel.com>; Kowalewski, Robert
> > > <robert.kowalewski@intel.com>; Feng, Roger <roger.feng@intel.com>
> > > Subject: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
> > >
> > > SoC Integrated Address Translation Cache (SATC) reporting structure
> > > is
> one
> > > of the Remapping Structure, which is imported since Intel(R)
> Virtualization
> > > Technology for Directed I/O (VT-D) Architecture Specification v3.2.
> > >
> > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3109
> > >
> > > Signed-off-by: Sheng Wei <w.sheng@intel.com>
> > > Cc: Michael D Kinney <michael.d.kinney@intel.com>
> > > Cc: Liming Gao <gaoliming@byosoft.com.cn>
> > > Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> > > Cc: Jiewen Yao <jiewen.yao@intel.com>
> > > Cc: Jenny Huang <jenny.huang@intel.com>
> > > Cc: Kowalewski Robert <robert.kowalewski@intel.com>
> > > Cc: Feng Roger <roger.feng@intel.com>
> > > ---
> > >  .../IndustryStandard/DmaRemappingReportingTable.h  | 34
> > > ++++++++++++++++++++--
> > >  1 file changed, 31 insertions(+), 3 deletions(-)
> > >
> > > diff --git
> > a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > index 7c50dc972e..48f6959fec 100644
> > > ---
> a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > +++
> b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > @@ -2,13 +2,13 @@
> > >    DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R)
> > >    Virtualization Technology for Directed I/O (VT-D) Architecture
> > Specification.
> > >
> > > -  Copyright (c) 2016 - 2018, Intel Corporation. All rights
> reserved.<BR>
> > > +  Copyright (c) 2016 - 2020, Intel Corporation. All rights
> reserved.<BR>
> > >    SPDX-License-Identifier: BSD-2-Clause-Patent
> > >
> > >    @par Revision Reference:
> > >      - Intel(R) Virtualization Technology for Directed I/O (VT-D)
> > Architecture
> > > -      Specification v2.5, Dated November 2017.
> > > -
> > >
> >
> http://www.intel.com/content/dam/www/public/us/en/documents/produc
> t-
> > > specifications/vt-directed-io-spec.pdf
> > > +      Specification v3.2, Dated October 2020.
> > > +
> > >
> >
> https://software.intel.com/content/dam/develop/external/us/en/documen
> t
> > s
> > /vt-
> > > directed-io-spec.pdf
> > >
> > >    @par Glossary:
> > >      - HPET - High Precision Event Timer @@ -39,6 +39,7 @@
> > >  #define EFI_ACPI_DMAR_TYPE_ATSR                   0x02
> > >  #define EFI_ACPI_DMAR_TYPE_RHSA                   0x03
> > >  #define EFI_ACPI_DMAR_TYPE_ANDD                   0x04
> > > +#define EFI_ACPI_DMAR_TYPE_SATC                   0x05
> > >  ///@}
> > >
> > >  ///
> > > @@ -216,6 +217,32 @@ typedef struct {
> > >    UINT8                           AcpiDeviceNumber;
> > >  } EFI_ACPI_DMAR_ANDD_HEADER;
> > >
> > > +/**
> > > +  An SoC Integrated Address Translation Cache (SATC) reporting
> structure
> > is
> > > +  defined in section 8.8.
> > > +**/
> > > +typedef struct {
> > > +  EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
> > > +  /**
> > > +    - Bit[0]: ATC_REQUIRED:
> > > +              - If Set, indicates that every SoC integrated device
> > enumerated
> > > +                in this table has a functional requirement to
> > > + enable
> its
> > ATC
> > > +                (via the ATS capability) for device operation.
> > > +              - If Clear, any device enumerated in this table can
> > operate when
> > > +                its respective ATC is not enabled (albeit with reduced
> > > +                performance or functionality).
> > > +    - Bits[7:1] Reserved.
> > > +  **/
> > > +  UINT8                           Flags;
> > > +  UINT8                           Reserved;
> > > +  ///
> > > +  /// The PCI Segment associated with this SATC structure. All SoC
> > integrated
> > > +  /// devices within a PCI segment with same value for Flags field
> > > + must
> be
> > > +  /// enumerated in the same SATC structure.
> > > +  ///
> > > +  UINT16                          SegmentNumber;
> > > +} EFI_ACPI_DMAR_SATC_HEADER;
> > > +
> > >  /**
> > >    DMA Remapping Reporting Structure Header as defined in section 8.1
> > >    This header will be followed by list of Remapping Structures
> > > listed
> > below
> > > @@ -224,6 +251,7 @@ typedef struct {
> > >      - Root Port ATS Capability Reporting (ATSR)
> > >      - Remapping Hardware Static Affinity (RHSA)
> > >      - ACPI Name-space Device Declaration (ANDD)
> > > +    - SoC Integrated Address Translation Cache reporting (SATC)
> > >    These structure types must by reported in numerical order.
> > >    i.e., All remapping structures of type 0 (DRHD) enumerated before
> > > remapping
> > >    structures of type 1 (RMRR), and so forth.
> > > --
> > > 2.16.2.windows.1
> 
> 
> 
> 
> 
> 
> 



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From 20c39ba1bff1fc9c93d443252c659044b44cf0c6 Mon Sep 17 00:00:00 2001
From: Sheng Wei <w.sheng@intel.com>
Date: Mon, 7 Dec 2020 16:34:44 +0800
Subject: [PATCH] MdePkg/include: Add DMAR SATC Table Definition

SoC Integrated Address Translation Cache (SATC) reporting structure is one
of the Remapping Structure, which is imported since Intel(R) Virtualization
Technology for Directed I/O (VT-D) Architecture Specification v3.2.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3109

Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jenny Huang <jenny.huang@intel.com>
Cc: Kowalewski Robert <robert.kowalewski@intel.com>
Cc: Feng Roger <roger.feng@intel.com>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
---
 .../IndustryStandard/DmaRemappingReportingTable.h  | 34 ++++++++++++++++++++--
 1 file changed, 31 insertions(+), 3 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
index 7c50dc972e..48f6959fec 100644
--- a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
+++ b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
@@ -2,13 +2,13 @@
   DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R)
   Virtualization Technology for Directed I/O (VT-D) Architecture Specification.
 
-  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
   @par Revision Reference:
     - Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture
-      Specification v2.5, Dated November 2017.
-      http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf
+      Specification v3.2, Dated October 2020.
+      https://software.intel.com/content/dam/develop/external/us/en/documents/vt-directed-io-spec.pdf
 
   @par Glossary:
     - HPET - High Precision Event Timer
@@ -39,6 +39,7 @@
 #define EFI_ACPI_DMAR_TYPE_ATSR                   0x02
 #define EFI_ACPI_DMAR_TYPE_RHSA                   0x03
 #define EFI_ACPI_DMAR_TYPE_ANDD                   0x04
+#define EFI_ACPI_DMAR_TYPE_SATC                   0x05
 ///@}
 
 ///
@@ -216,6 +217,32 @@ typedef struct {
   UINT8                           AcpiDeviceNumber;
 } EFI_ACPI_DMAR_ANDD_HEADER;
 
+/**
+  An SoC Integrated Address Translation Cache (SATC) reporting structure is
+  defined in section 8.8.
+**/
+typedef struct {
+  EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
+  /**
+    - Bit[0]: ATC_REQUIRED:
+              - If Set, indicates that every SoC integrated device enumerated
+                in this table has a functional requirement to enable its ATC
+                (via the ATS capability) for device operation.
+              - If Clear, any device enumerated in this table can operate when
+                its respective ATC is not enabled (albeit with reduced
+                performance or functionality).
+    - Bits[7:1] Reserved.
+  **/
+  UINT8                           Flags;
+  UINT8                           Reserved;
+  ///
+  /// The PCI Segment associated with this SATC structure. All SoC integrated
+  /// devices within a PCI segment with same value for Flags field must be
+  /// enumerated in the same SATC structure.
+  ///
+  UINT16                          SegmentNumber;
+} EFI_ACPI_DMAR_SATC_HEADER;
+
 /**
   DMA Remapping Reporting Structure Header as defined in section 8.1
   This header will be followed by list of Remapping Structures listed below
@@ -224,6 +251,7 @@ typedef struct {
     - Root Port ATS Capability Reporting (ATSR)
     - Remapping Hardware Static Affinity (RHSA)
     - ACPI Name-space Device Declaration (ANDD)
+    - SoC Integrated Address Translation Cache reporting (SATC)
   These structure types must by reported in numerical order.
   i.e., All remapping structures of type 0 (DRHD) enumerated before remapping
   structures of type 1 (RMRR), and so forth.
-- 
2.16.2.windows.1
回复: [edk2-devel] 回复: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
Posted by gaoliming 3 years, 4 months ago 
PR https://github.com/tianocore/edk2/pull/1230 is created. 

> -----邮件原件-----
> 发件人: bounce+27952+68842+4905953+8761045@groups.io
> <bounce+27952+68842+4905953+8761045@groups.io> 代表 Sheng Wei
> 发送时间: 2020年12月15日 13:59
> 收件人: devel@edk2.groups.io; gaoliming@byosoft.com.cn; Liu, Zhiguang
> <zhiguang.liu@intel.com>
> 抄送: Kinney, Michael D <michael.d.kinney@intel.com>; Yao, Jiewen
> <jiewen.yao@intel.com>; Huang, Jenny <jenny.huang@intel.com>;
> Kowalewski, Robert <robert.kowalewski@intel.com>; Feng, Roger
> <roger.feng@intel.com>
> 主题: Re: [edk2-devel] 回复: [PATCH] MdePkg/include: Add DMAR SATC
> Table Definition
> 
> Hi Liming,
> Thank you for the "Reviewed-by".
> Could you help to merge the patch to ekd2 master branch ?
> Thank you.
> BR
> Sheng Wei
> 
> > -----Original Message-----
> > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
> > gaoliming
> > Sent: 2020年12月14日 10:49
> > To: Liu, Zhiguang <zhiguang.liu@intel.com>; Sheng, W
> <w.sheng@intel.com>;
> > devel@edk2.groups.io
> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Yao, Jiewen
> > <jiewen.yao@intel.com>; Huang, Jenny <jenny.huang@intel.com>;
> > Kowalewski, Robert <robert.kowalewski@intel.com>; Feng, Roger
> > <roger.feng@intel.com>
> > Subject: [edk2-devel] 回复: [PATCH] MdePkg/include: Add DMAR SATC
> > Table Definition
> >
> > Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
> >
> > > -----邮件原件-----
> > > 发件人: Liu, Zhiguang <zhiguang.liu@intel.com>
> > > 发送时间: 2020年12月11日 10:51
> > > 收件人: Sheng, W <w.sheng@intel.com>; devel@edk2.groups.io
> > > 抄送: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao
> > > <gaoliming@byosoft.com.cn>; Yao, Jiewen <jiewen.yao@intel.com>;
> > Huang,
> > > Jenny <jenny.huang@intel.com>; Kowalewski, Robert
> > > <robert.kowalewski@intel.com>; Feng, Roger <roger.feng@intel.com>
> > > 主题: RE: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
> > >
> > > Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
> > >
> > > > -----Original Message-----
> > > > From: Sheng, W <w.sheng@intel.com>
> > > > Sent: Friday, December 11, 2020 9:37 AM
> > > > To: devel@edk2.groups.io
> > > > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao
> > > > <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>;
> > > > Yao, Jiewen <jiewen.yao@intel.com>; Huang, Jenny
> > > > <jenny.huang@intel.com>; Kowalewski, Robert
> > > > <robert.kowalewski@intel.com>; Feng, Roger <roger.feng@intel.com>
> > > > Subject: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
> > > >
> > > > SoC Integrated Address Translation Cache (SATC) reporting structure
> > > > is
> > one
> > > > of the Remapping Structure, which is imported since Intel(R)
> > Virtualization
> > > > Technology for Directed I/O (VT-D) Architecture Specification v3.2.
> > > >
> > > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3109
> > > >
> > > > Signed-off-by: Sheng Wei <w.sheng@intel.com>
> > > > Cc: Michael D Kinney <michael.d.kinney@intel.com>
> > > > Cc: Liming Gao <gaoliming@byosoft.com.cn>
> > > > Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> > > > Cc: Jiewen Yao <jiewen.yao@intel.com>
> > > > Cc: Jenny Huang <jenny.huang@intel.com>
> > > > Cc: Kowalewski Robert <robert.kowalewski@intel.com>
> > > > Cc: Feng Roger <roger.feng@intel.com>
> > > > ---
> > > >  .../IndustryStandard/DmaRemappingReportingTable.h  | 34
> > > > ++++++++++++++++++++--
> > > >  1 file changed, 31 insertions(+), 3 deletions(-)
> > > >
> > > > diff --git
> > > a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > > b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > > index 7c50dc972e..48f6959fec 100644
> > > > ---
> > a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > > +++
> > b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > > @@ -2,13 +2,13 @@
> > > >    DMA Remapping Reporting (DMAR) ACPI table definition from
> Intel(R)
> > > >    Virtualization Technology for Directed I/O (VT-D) Architecture
> > > Specification.
> > > >
> > > > -  Copyright (c) 2016 - 2018, Intel Corporation. All rights
> > reserved.<BR>
> > > > +  Copyright (c) 2016 - 2020, Intel Corporation. All rights
> > reserved.<BR>
> > > >    SPDX-License-Identifier: BSD-2-Clause-Patent
> > > >
> > > >    @par Revision Reference:
> > > >      - Intel(R) Virtualization Technology for Directed I/O (VT-D)
> > > Architecture
> > > > -      Specification v2.5, Dated November 2017.
> > > > -
> > > >
> > >
> > http://www.intel.com/content/dam/www/public/us/en/documents/produc
> > t-
> > > > specifications/vt-directed-io-spec.pdf
> > > > +      Specification v3.2, Dated October 2020.
> > > > +
> > > >
> > >
> > https://software.intel.com/content/dam/develop/external/us/en/documen
> > t
> > > s
> > > /vt-
> > > > directed-io-spec.pdf
> > > >
> > > >    @par Glossary:
> > > >      - HPET - High Precision Event Timer @@ -39,6 +39,7 @@
> > > >  #define EFI_ACPI_DMAR_TYPE_ATSR                   0x02
> > > >  #define EFI_ACPI_DMAR_TYPE_RHSA                   0x03
> > > >  #define EFI_ACPI_DMAR_TYPE_ANDD                   0x04
> > > > +#define EFI_ACPI_DMAR_TYPE_SATC                   0x05
> > > >  ///@}
> > > >
> > > >  ///
> > > > @@ -216,6 +217,32 @@ typedef struct {
> > > >    UINT8                           AcpiDeviceNumber;
> > > >  } EFI_ACPI_DMAR_ANDD_HEADER;
> > > >
> > > > +/**
> > > > +  An SoC Integrated Address Translation Cache (SATC) reporting
> > structure
> > > is
> > > > +  defined in section 8.8.
> > > > +**/
> > > > +typedef struct {
> > > > +  EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
> > > > +  /**
> > > > +    - Bit[0]: ATC_REQUIRED:
> > > > +              - If Set, indicates that every SoC integrated device
> > > enumerated
> > > > +                in this table has a functional requirement to
> > > > + enable
> > its
> > > ATC
> > > > +                (via the ATS capability) for device operation.
> > > > +              - If Clear, any device enumerated in this table can
> > > operate when
> > > > +                its respective ATC is not enabled (albeit with
> reduced
> > > > +                performance or functionality).
> > > > +    - Bits[7:1] Reserved.
> > > > +  **/
> > > > +  UINT8                           Flags;
> > > > +  UINT8                           Reserved;
> > > > +  ///
> > > > +  /// The PCI Segment associated with this SATC structure. All SoC
> > > integrated
> > > > +  /// devices within a PCI segment with same value for Flags field
> > > > + must
> > be
> > > > +  /// enumerated in the same SATC structure.
> > > > +  ///
> > > > +  UINT16                          SegmentNumber;
> > > > +} EFI_ACPI_DMAR_SATC_HEADER;
> > > > +
> > > >  /**
> > > >    DMA Remapping Reporting Structure Header as defined in section
> 8.1
> > > >    This header will be followed by list of Remapping Structures
> > > > listed
> > > below
> > > > @@ -224,6 +251,7 @@ typedef struct {
> > > >      - Root Port ATS Capability Reporting (ATSR)
> > > >      - Remapping Hardware Static Affinity (RHSA)
> > > >      - ACPI Name-space Device Declaration (ANDD)
> > > > +    - SoC Integrated Address Translation Cache reporting (SATC)
> > > >    These structure types must by reported in numerical order.
> > > >    i.e., All remapping structures of type 0 (DRHD) enumerated before
> > > > remapping
> > > >    structures of type 1 (RMRR), and so forth.
> > > > --
> > > > 2.16.2.windows.1
> >
> >
> >
> >
> >
> >
> >
> 
> 
> 
> 
> 





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Re: [edk2-devel] 回复: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
Posted by Sheng Wei 3 years, 4 months ago 
Hi Liming,
I just check the PR, there is a "tianocore.PatchCheck" failing.

The fail belongs to the commit "Merge branch 'master' into MdeDmar"   c5741f1.
The commit of " MdePkg/include: Add DMAR SATC Table Definition " is af411fd.

Is it any thing needs to change on this PR ?
BR
Sheng Wei

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
> gaoliming
> Sent: 2020年12月15日 15:16
> To: devel@edk2.groups.io; Sheng, W <w.sheng@intel.com>; Liu, Zhiguang
> <zhiguang.liu@intel.com>
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Yao, Jiewen
> <jiewen.yao@intel.com>; Huang, Jenny <jenny.huang@intel.com>;
> Kowalewski, Robert <robert.kowalewski@intel.com>; Feng, Roger
> <roger.feng@intel.com>
> Subject: 回复: [edk2-devel] 回复: [PATCH] MdePkg/include: Add DMAR
> SATC Table Definition
> 
> PR https://github.com/tianocore/edk2/pull/1230 is created.
> 
> > -----邮件原件-----
> > 发件人: bounce+27952+68842+4905953+8761045@groups.io
> > <bounce+27952+68842+4905953+8761045@groups.io> 代表 Sheng Wei
> > 发送时间: 2020年12月15日 13:59
> > 收件人: devel@edk2.groups.io; gaoliming@byosoft.com.cn; Liu, Zhiguang
> > <zhiguang.liu@intel.com>
> > 抄送: Kinney, Michael D <michael.d.kinney@intel.com>; Yao, Jiewen
> > <jiewen.yao@intel.com>; Huang, Jenny <jenny.huang@intel.com>;
> > Kowalewski, Robert <robert.kowalewski@intel.com>; Feng, Roger
> > <roger.feng@intel.com>
> > 主题: Re: [edk2-devel] 回复: [PATCH] MdePkg/include: Add DMAR SATC
> Table
> > Definition
> >
> > Hi Liming,
> > Thank you for the "Reviewed-by".
> > Could you help to merge the patch to ekd2 master branch ?
> > Thank you.
> > BR
> > Sheng Wei
> >
> > > -----Original Message-----
> > > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
> > > gaoliming
> > > Sent: 2020年12月14日 10:49
> > > To: Liu, Zhiguang <zhiguang.liu@intel.com>; Sheng, W
> > <w.sheng@intel.com>;
> > > devel@edk2.groups.io
> > > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Yao, Jiewen
> > > <jiewen.yao@intel.com>; Huang, Jenny <jenny.huang@intel.com>;
> > > Kowalewski, Robert <robert.kowalewski@intel.com>; Feng, Roger
> > > <roger.feng@intel.com>
> > > Subject: [edk2-devel] 回复: [PATCH] MdePkg/include: Add DMAR SATC
> > > Table Definition
> > >
> > > Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
> > >
> > > > -----邮件原件-----
> > > > 发件人: Liu, Zhiguang <zhiguang.liu@intel.com>
> > > > 发送时间: 2020年12月11日 10:51
> > > > 收件人: Sheng, W <w.sheng@intel.com>; devel@edk2.groups.io
> > > > 抄送: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao
> > > > <gaoliming@byosoft.com.cn>; Yao, Jiewen <jiewen.yao@intel.com>;
> > > Huang,
> > > > Jenny <jenny.huang@intel.com>; Kowalewski, Robert
> > > > <robert.kowalewski@intel.com>; Feng, Roger <roger.feng@intel.com>
> > > > 主题: RE: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
> > > >
> > > > Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
> > > >
> > > > > -----Original Message-----
> > > > > From: Sheng, W <w.sheng@intel.com>
> > > > > Sent: Friday, December 11, 2020 9:37 AM
> > > > > To: devel@edk2.groups.io
> > > > > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao
> > > > > <gaoliming@byosoft.com.cn>; Liu, Zhiguang
> > > > > <zhiguang.liu@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>;
> > > > > Huang, Jenny <jenny.huang@intel.com>; Kowalewski, Robert
> > > > > <robert.kowalewski@intel.com>; Feng, Roger
> > > > > <roger.feng@intel.com>
> > > > > Subject: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
> > > > >
> > > > > SoC Integrated Address Translation Cache (SATC) reporting
> > > > > structure is
> > > one
> > > > > of the Remapping Structure, which is imported since Intel(R)
> > > Virtualization
> > > > > Technology for Directed I/O (VT-D) Architecture Specification v3.2.
> > > > >
> > > > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3109
> > > > >
> > > > > Signed-off-by: Sheng Wei <w.sheng@intel.com>
> > > > > Cc: Michael D Kinney <michael.d.kinney@intel.com>
> > > > > Cc: Liming Gao <gaoliming@byosoft.com.cn>
> > > > > Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> > > > > Cc: Jiewen Yao <jiewen.yao@intel.com>
> > > > > Cc: Jenny Huang <jenny.huang@intel.com>
> > > > > Cc: Kowalewski Robert <robert.kowalewski@intel.com>
> > > > > Cc: Feng Roger <roger.feng@intel.com>
> > > > > ---
> > > > >  .../IndustryStandard/DmaRemappingReportingTable.h  | 34
> > > > > ++++++++++++++++++++--
> > > > >  1 file changed, 31 insertions(+), 3 deletions(-)
> > > > >
> > > > > diff --git
> > > > a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > > >
> b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > > > index 7c50dc972e..48f6959fec 100644
> > > > > ---
> > > a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > > > +++
> > > b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > > > @@ -2,13 +2,13 @@
> > > > >    DMA Remapping Reporting (DMAR) ACPI table definition from
> > Intel(R)
> > > > >    Virtualization Technology for Directed I/O (VT-D)
> > > > > Architecture
> > > > Specification.
> > > > >
> > > > > -  Copyright (c) 2016 - 2018, Intel Corporation. All rights
> > > reserved.<BR>
> > > > > +  Copyright (c) 2016 - 2020, Intel Corporation. All rights
> > > reserved.<BR>
> > > > >    SPDX-License-Identifier: BSD-2-Clause-Patent
> > > > >
> > > > >    @par Revision Reference:
> > > > >      - Intel(R) Virtualization Technology for Directed I/O
> > > > > (VT-D)
> > > > Architecture
> > > > > -      Specification v2.5, Dated November 2017.
> > > > > -
> > > > >
> > > >
> > >
> http://www.intel.com/content/dam/www/public/us/en/documents/produc
> > > t-
> > > > > specifications/vt-directed-io-spec.pdf
> > > > > +      Specification v3.2, Dated October 2020.
> > > > > +
> > > > >
> > > >
> > >
> https://software.intel.com/content/dam/develop/external/us/en/docume
> > > n
> > > t
> > > > s
> > > > /vt-
> > > > > directed-io-spec.pdf
> > > > >
> > > > >    @par Glossary:
> > > > >      - HPET - High Precision Event Timer @@ -39,6 +39,7 @@
> > > > >  #define EFI_ACPI_DMAR_TYPE_ATSR                   0x02
> > > > >  #define EFI_ACPI_DMAR_TYPE_RHSA                   0x03
> > > > >  #define EFI_ACPI_DMAR_TYPE_ANDD                   0x04
> > > > > +#define EFI_ACPI_DMAR_TYPE_SATC                   0x05
> > > > >  ///@}
> > > > >
> > > > >  ///
> > > > > @@ -216,6 +217,32 @@ typedef struct {
> > > > >    UINT8                           AcpiDeviceNumber;
> > > > >  } EFI_ACPI_DMAR_ANDD_HEADER;
> > > > >
> > > > > +/**
> > > > > +  An SoC Integrated Address Translation Cache (SATC) reporting
> > > structure
> > > > is
> > > > > +  defined in section 8.8.
> > > > > +**/
> > > > > +typedef struct {
> > > > > +  EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
> > > > > +  /**
> > > > > +    - Bit[0]: ATC_REQUIRED:
> > > > > +              - If Set, indicates that every SoC integrated
> > > > > +device
> > > > enumerated
> > > > > +                in this table has a functional requirement to
> > > > > + enable
> > > its
> > > > ATC
> > > > > +                (via the ATS capability) for device operation.
> > > > > +              - If Clear, any device enumerated in this table
> > > > > + can
> > > > operate when
> > > > > +                its respective ATC is not enabled (albeit with
> > reduced
> > > > > +                performance or functionality).
> > > > > +    - Bits[7:1] Reserved.
> > > > > +  **/
> > > > > +  UINT8                           Flags;
> > > > > +  UINT8                           Reserved;
> > > > > +  ///
> > > > > +  /// The PCI Segment associated with this SATC structure. All
> > > > > + SoC
> > > > integrated
> > > > > +  /// devices within a PCI segment with same value for Flags
> > > > > + field must
> > > be
> > > > > +  /// enumerated in the same SATC structure.
> > > > > +  ///
> > > > > +  UINT16                          SegmentNumber;
> > > > > +} EFI_ACPI_DMAR_SATC_HEADER;
> > > > > +
> > > > >  /**
> > > > >    DMA Remapping Reporting Structure Header as defined in
> > > > > section
> > 8.1
> > > > >    This header will be followed by list of Remapping Structures
> > > > > listed
> > > > below
> > > > > @@ -224,6 +251,7 @@ typedef struct {
> > > > >      - Root Port ATS Capability Reporting (ATSR)
> > > > >      - Remapping Hardware Static Affinity (RHSA)
> > > > >      - ACPI Name-space Device Declaration (ANDD)
> > > > > +    - SoC Integrated Address Translation Cache reporting (SATC)
> > > > >    These structure types must by reported in numerical order.
> > > > >    i.e., All remapping structures of type 0 (DRHD) enumerated
> > > > > before remapping
> > > > >    structures of type 1 (RMRR), and so forth.
> > > > > --
> > > > > 2.16.2.windows.1
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> >
> >
> >
> >
> >
> 
> 
> 
> 
> 
> 
> 



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回复: [edk2-devel] 回复: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
Posted by gaoliming 3 years, 4 months ago 
I just update PR. Please check again. 

> -----邮件原件-----
> 发件人: bounce+27952+68855+4905953+8761045@groups.io
> <bounce+27952+68855+4905953+8761045@groups.io> 代表 Sheng Wei
> 发送时间: 2020年12月15日 16:56
> 收件人: devel@edk2.groups.io; gaoliming@byosoft.com.cn; Liu, Zhiguang
> <zhiguang.liu@intel.com>
> 抄送: Kinney, Michael D <michael.d.kinney@intel.com>; Yao, Jiewen
> <jiewen.yao@intel.com>; Huang, Jenny <jenny.huang@intel.com>;
> Kowalewski, Robert <robert.kowalewski@intel.com>; Feng, Roger
> <roger.feng@intel.com>
> 主题: Re: [edk2-devel] 回复: [PATCH] MdePkg/include: Add DMAR SATC
> Table Definition
> 
> Hi Liming,
> I just check the PR, there is a "tianocore.PatchCheck" failing.
> 
> The fail belongs to the commit "Merge branch 'master' into MdeDmar"
> c5741f1.
> The commit of " MdePkg/include: Add DMAR SATC Table Definition " is
> af411fd.
> 
> Is it any thing needs to change on this PR ?
> BR
> Sheng Wei
> 
> > -----Original Message-----
> > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
> > gaoliming
> > Sent: 2020年12月15日 15:16
> > To: devel@edk2.groups.io; Sheng, W <w.sheng@intel.com>; Liu, Zhiguang
> > <zhiguang.liu@intel.com>
> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Yao, Jiewen
> > <jiewen.yao@intel.com>; Huang, Jenny <jenny.huang@intel.com>;
> > Kowalewski, Robert <robert.kowalewski@intel.com>; Feng, Roger
> > <roger.feng@intel.com>
> > Subject: 回复: [edk2-devel] 回复: [PATCH] MdePkg/include: Add DMAR
> > SATC Table Definition
> >
> > PR https://github.com/tianocore/edk2/pull/1230 is created.
> >
> > > -----邮件原件-----
> > > 发件人: bounce+27952+68842+4905953+8761045@groups.io
> > > <bounce+27952+68842+4905953+8761045@groups.io> 代表 Sheng Wei
> > > 发送时间: 2020年12月15日 13:59
> > > 收件人: devel@edk2.groups.io; gaoliming@byosoft.com.cn; Liu, Zhiguang
> > > <zhiguang.liu@intel.com>
> > > 抄送: Kinney, Michael D <michael.d.kinney@intel.com>; Yao, Jiewen
> > > <jiewen.yao@intel.com>; Huang, Jenny <jenny.huang@intel.com>;
> > > Kowalewski, Robert <robert.kowalewski@intel.com>; Feng, Roger
> > > <roger.feng@intel.com>
> > > 主题: Re: [edk2-devel] 回复: [PATCH] MdePkg/include: Add DMAR SATC
> > Table
> > > Definition
> > >
> > > Hi Liming,
> > > Thank you for the "Reviewed-by".
> > > Could you help to merge the patch to ekd2 master branch ?
> > > Thank you.
> > > BR
> > > Sheng Wei
> > >
> > > > -----Original Message-----
> > > > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
> > > > gaoliming
> > > > Sent: 2020年12月14日 10:49
> > > > To: Liu, Zhiguang <zhiguang.liu@intel.com>; Sheng, W
> > > <w.sheng@intel.com>;
> > > > devel@edk2.groups.io
> > > > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Yao, Jiewen
> > > > <jiewen.yao@intel.com>; Huang, Jenny <jenny.huang@intel.com>;
> > > > Kowalewski, Robert <robert.kowalewski@intel.com>; Feng, Roger
> > > > <roger.feng@intel.com>
> > > > Subject: [edk2-devel] 回复: [PATCH] MdePkg/include: Add DMAR SATC
> > > > Table Definition
> > > >
> > > > Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
> > > >
> > > > > -----邮件原件-----
> > > > > 发件人: Liu, Zhiguang <zhiguang.liu@intel.com>
> > > > > 发送时间: 2020年12月11日 10:51
> > > > > 收件人: Sheng, W <w.sheng@intel.com>; devel@edk2.groups.io
> > > > > 抄送: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao
> > > > > <gaoliming@byosoft.com.cn>; Yao, Jiewen <jiewen.yao@intel.com>;
> > > > Huang,
> > > > > Jenny <jenny.huang@intel.com>; Kowalewski, Robert
> > > > > <robert.kowalewski@intel.com>; Feng, Roger <roger.feng@intel.com>
> > > > > 主题: RE: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
> > > > >
> > > > > Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
> > > > >
> > > > > > -----Original Message-----
> > > > > > From: Sheng, W <w.sheng@intel.com>
> > > > > > Sent: Friday, December 11, 2020 9:37 AM
> > > > > > To: devel@edk2.groups.io
> > > > > > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao
> > > > > > <gaoliming@byosoft.com.cn>; Liu, Zhiguang
> > > > > > <zhiguang.liu@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>;
> > > > > > Huang, Jenny <jenny.huang@intel.com>; Kowalewski, Robert
> > > > > > <robert.kowalewski@intel.com>; Feng, Roger
> > > > > > <roger.feng@intel.com>
> > > > > > Subject: [PATCH] MdePkg/include: Add DMAR SATC Table Definition
> > > > > >
> > > > > > SoC Integrated Address Translation Cache (SATC) reporting
> > > > > > structure is
> > > > one
> > > > > > of the Remapping Structure, which is imported since Intel(R)
> > > > Virtualization
> > > > > > Technology for Directed I/O (VT-D) Architecture Specification
v3.2.
> > > > > >
> > > > > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3109
> > > > > >
> > > > > > Signed-off-by: Sheng Wei <w.sheng@intel.com>
> > > > > > Cc: Michael D Kinney <michael.d.kinney@intel.com>
> > > > > > Cc: Liming Gao <gaoliming@byosoft.com.cn>
> > > > > > Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> > > > > > Cc: Jiewen Yao <jiewen.yao@intel.com>
> > > > > > Cc: Jenny Huang <jenny.huang@intel.com>
> > > > > > Cc: Kowalewski Robert <robert.kowalewski@intel.com>
> > > > > > Cc: Feng Roger <roger.feng@intel.com>
> > > > > > ---
> > > > > >  .../IndustryStandard/DmaRemappingReportingTable.h  | 34
> > > > > > ++++++++++++++++++++--
> > > > > >  1 file changed, 31 insertions(+), 3 deletions(-)
> > > > > >
> > > > > > diff --git
> > > > > a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > > > >
> > b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > > > > index 7c50dc972e..48f6959fec 100644
> > > > > > ---
> > > > a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > > > > +++
> > > > b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
> > > > > > @@ -2,13 +2,13 @@
> > > > > >    DMA Remapping Reporting (DMAR) ACPI table definition from
> > > Intel(R)
> > > > > >    Virtualization Technology for Directed I/O (VT-D)
> > > > > > Architecture
> > > > > Specification.
> > > > > >
> > > > > > -  Copyright (c) 2016 - 2018, Intel Corporation. All rights
> > > > reserved.<BR>
> > > > > > +  Copyright (c) 2016 - 2020, Intel Corporation. All rights
> > > > reserved.<BR>
> > > > > >    SPDX-License-Identifier: BSD-2-Clause-Patent
> > > > > >
> > > > > >    @par Revision Reference:
> > > > > >      - Intel(R) Virtualization Technology for Directed I/O
> > > > > > (VT-D)
> > > > > Architecture
> > > > > > -      Specification v2.5, Dated November 2017.
> > > > > > -
> > > > > >
> > > > >
> > > >
> > http://www.intel.com/content/dam/www/public/us/en/documents/produc
> > > > t-
> > > > > > specifications/vt-directed-io-spec.pdf
> > > > > > +      Specification v3.2, Dated October 2020.
> > > > > > +
> > > > > >
> > > > >
> > > >
> > https://software.intel.com/content/dam/develop/external/us/en/docume
> > > > n
> > > > t
> > > > > s
> > > > > /vt-
> > > > > > directed-io-spec.pdf
> > > > > >
> > > > > >    @par Glossary:
> > > > > >      - HPET - High Precision Event Timer @@ -39,6 +39,7 @@
> > > > > >  #define EFI_ACPI_DMAR_TYPE_ATSR                   0x02
> > > > > >  #define EFI_ACPI_DMAR_TYPE_RHSA                   0x03
> > > > > >  #define EFI_ACPI_DMAR_TYPE_ANDD                   0x04
> > > > > > +#define EFI_ACPI_DMAR_TYPE_SATC                   0x05
> > > > > >  ///@}
> > > > > >
> > > > > >  ///
> > > > > > @@ -216,6 +217,32 @@ typedef struct {
> > > > > >    UINT8                           AcpiDeviceNumber;
> > > > > >  } EFI_ACPI_DMAR_ANDD_HEADER;
> > > > > >
> > > > > > +/**
> > > > > > +  An SoC Integrated Address Translation Cache (SATC) reporting
> > > > structure
> > > > > is
> > > > > > +  defined in section 8.8.
> > > > > > +**/
> > > > > > +typedef struct {
> > > > > > +  EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
> > > > > > +  /**
> > > > > > +    - Bit[0]: ATC_REQUIRED:
> > > > > > +              - If Set, indicates that every SoC integrated
> > > > > > +device
> > > > > enumerated
> > > > > > +                in this table has a functional requirement to
> > > > > > + enable
> > > > its
> > > > > ATC
> > > > > > +                (via the ATS capability) for device operation.
> > > > > > +              - If Clear, any device enumerated in this table
> > > > > > + can
> > > > > operate when
> > > > > > +                its respective ATC is not enabled (albeit with
> > > reduced
> > > > > > +                performance or functionality).
> > > > > > +    - Bits[7:1] Reserved.
> > > > > > +  **/
> > > > > > +  UINT8                           Flags;
> > > > > > +  UINT8                           Reserved;
> > > > > > +  ///
> > > > > > +  /// The PCI Segment associated with this SATC structure. All
> > > > > > + SoC
> > > > > integrated
> > > > > > +  /// devices within a PCI segment with same value for Flags
> > > > > > + field must
> > > > be
> > > > > > +  /// enumerated in the same SATC structure.
> > > > > > +  ///
> > > > > > +  UINT16                          SegmentNumber;
> > > > > > +} EFI_ACPI_DMAR_SATC_HEADER;
> > > > > > +
> > > > > >  /**
> > > > > >    DMA Remapping Reporting Structure Header as defined in
> > > > > > section
> > > 8.1
> > > > > >    This header will be followed by list of Remapping Structures
> > > > > > listed
> > > > > below
> > > > > > @@ -224,6 +251,7 @@ typedef struct {
> > > > > >      - Root Port ATS Capability Reporting (ATSR)
> > > > > >      - Remapping Hardware Static Affinity (RHSA)
> > > > > >      - ACPI Name-space Device Declaration (ANDD)
> > > > > > +    - SoC Integrated Address Translation Cache reporting (SATC)
> > > > > >    These structure types must by reported in numerical order.
> > > > > >    i.e., All remapping structures of type 0 (DRHD) enumerated
> > > > > > before remapping
> > > > > >    structures of type 1 (RMRR), and so forth.
> > > > > > --
> > > > > > 2.16.2.windows.1
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > >
> > >
> > >
> > >
> > >
> >
> >
> >
> >
> >
> >
> >
> 
> 
> 
> 
> 





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