From nobody Fri May 3 16:55:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+68678+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+68678+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1607650633; cv=none; d=zohomail.com; s=zohoarc; b=IUbfAPdP/c+FPfhVB0jIyP2PXLdUuUZlFS7983E/nTC9VZczpwYkXQyv8BwkLUhXg/ykxbuzI/tSqKlhI05+icO0WHmSj3y8PFg5vwqaicuEa3S69Tb8/T99VJSH+BVV6r6rEO/VfuxG8HLYHo4GyKNMxfjqLZU2LNpF157BttE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1607650633; h=Cc:Date:From:List-Id:List-Unsubscribe:Message-ID:Reply-To:Sender:Subject:To; bh=sY8/newxYB+k4XFExYoBx//Qo43lR2nilZ77o5THByo=; b=FWnJ123IxCMVqLXgqRz3LhrQYApbWEap3LU7JED0DilzOWQuOZuQwXS2RhLEq4ssVZUxlJ2k/BEPsSi3+XD5r4Pi6MrCd0Kg02SY8BiaNvVua8Z3wFsC7QGrxNxVWbOjBs96Ef+j1Hti0m5dkGSCOTwM/IbtUDf7BOgsppS4DYU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+68678+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1607650632325331.4301630852883; Thu, 10 Dec 2020 17:37:12 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id D9Q1YY1788612xiPb01J373e; Thu, 10 Dec 2020 17:37:11 -0800 X-Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mx.groups.io with SMTP id smtpd.web12.354.1607650631455065618 for ; Thu, 10 Dec 2020 17:37:11 -0800 IronPort-SDR: M9fkYHz1XZY8H1VHfGwbCER3M75pvvLxFzG/aLP8MmrjHqi0t0vNmEB+XB8XcF4dT0Dw0nwIJ8 XvJSDgqDjXqg== X-IronPort-AV: E=McAfee;i="6000,8403,9831"; a="238464904" X-IronPort-AV: E=Sophos;i="5.78,409,1599548400"; d="scan'208";a="238464904" X-Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Dec 2020 17:37:10 -0800 IronPort-SDR: G/jSDSU4mxC1X6mw/LZmojvAaCP+fKoYN8UHi3FLrnMceH/p7bAmBw4r9BA/MdjG3uIaMki7Uo pkujmk3/NBog== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,409,1599548400"; d="scan'208";a="440212870" X-Received: from shwdesssddpdwei.ccr.corp.intel.com ([10.239.157.46]) by fmsmga001.fm.intel.com with ESMTP; 10 Dec 2020 17:37:08 -0800 From: "Sheng Wei" To: devel@edk2.groups.io Cc: Michael D Kinney , Liming Gao , Zhiguang Liu , Jiewen Yao , Jenny Huang , Kowalewski Robert , Feng Roger Subject: [edk2-devel] [PATCH] MdePkg/include: Add DMAR SATC Table Definition Date: Fri, 11 Dec 2020 09:36:53 +0800 Message-Id: <20201211013653.11624-1-w.sheng@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,w.sheng@intel.com X-Gm-Message-State: KrESyF5lzTgJ4zRhTHw7ZYAGx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1607650631; bh=reDCnlUPXikfwDLaVJ/VtH92T+ADRWwxRvf5OPRWFGo=; h=Cc:Date:From:Reply-To:Subject:To; b=N9CSo8igMO+21to/9KyAf+U9RgvIe8N3BJzGMrfBDZl4c5d/pBPRgcYCEoxaj/9trKX g8wlzdXr+3GKcgwqs9trw1asRivhgKuAJkW+oS4fv756mvDZhYa/ZlhmDpgAIfaccTpQl qgjCRmRiR7h103FT1H/nCNMWTZ0I/7cYyKM= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" SoC Integrated Address Translation Cache (SATC) reporting structure is one of the Remapping Structure, which is imported since Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture Specification v3.2. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3109 Signed-off-by: Sheng Wei Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Cc: Jiewen Yao Cc: Jenny Huang Cc: Kowalewski Robert Cc: Feng Roger Reviewed-by: Liming Gao Reviewed-by: Zhiguang Liu --- .../IndustryStandard/DmaRemappingReportingTable.h | 34 ++++++++++++++++++= ++-- 1 file changed, 31 insertions(+), 3 deletions(-) diff --git a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h b= /MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h index 7c50dc972e..48f6959fec 100644 --- a/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h +++ b/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h @@ -2,13 +2,13 @@ DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture Specifica= tion. =20 - Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Revision Reference: - Intel(R) Virtualization Technology for Directed I/O (VT-D) Architect= ure - Specification v2.5, Dated November 2017. - http://www.intel.com/content/dam/www/public/us/en/documents/product-= specifications/vt-directed-io-spec.pdf + Specification v3.2, Dated October 2020. + https://software.intel.com/content/dam/develop/external/us/en/docume= nts/vt-directed-io-spec.pdf =20 @par Glossary: - HPET - High Precision Event Timer @@ -39,6 +39,7 @@ #define EFI_ACPI_DMAR_TYPE_ATSR 0x02 #define EFI_ACPI_DMAR_TYPE_RHSA 0x03 #define EFI_ACPI_DMAR_TYPE_ANDD 0x04 +#define EFI_ACPI_DMAR_TYPE_SATC 0x05 ///@} =20 /// @@ -216,6 +217,32 @@ typedef struct { UINT8 AcpiDeviceNumber; } EFI_ACPI_DMAR_ANDD_HEADER; =20 +/** + An SoC Integrated Address Translation Cache (SATC) reporting structure is + defined in section 8.8. +**/ +typedef struct { + EFI_ACPI_DMAR_STRUCTURE_HEADER Header; + /** + - Bit[0]: ATC_REQUIRED: + - If Set, indicates that every SoC integrated device enumera= ted + in this table has a functional requirement to enable its A= TC + (via the ATS capability) for device operation. + - If Clear, any device enumerated in this table can operate = when + its respective ATC is not enabled (albeit with reduced + performance or functionality). + - Bits[7:1] Reserved. + **/ + UINT8 Flags; + UINT8 Reserved; + /// + /// The PCI Segment associated with this SATC structure. All SoC integra= ted + /// devices within a PCI segment with same value for Flags field must be + /// enumerated in the same SATC structure. + /// + UINT16 SegmentNumber; +} EFI_ACPI_DMAR_SATC_HEADER; + /** DMA Remapping Reporting Structure Header as defined in section 8.1 This header will be followed by list of Remapping Structures listed below @@ -224,6 +251,7 @@ typedef struct { - Root Port ATS Capability Reporting (ATSR) - Remapping Hardware Static Affinity (RHSA) - ACPI Name-space Device Declaration (ANDD) + - SoC Integrated Address Translation Cache reporting (SATC) These structure types must by reported in numerical order. i.e., All remapping structures of type 0 (DRHD) enumerated before remapp= ing structures of type 1 (RMRR), and so forth. --=20 2.16.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#68678): https://edk2.groups.io/g/devel/message/68678 Mute This Topic: https://groups.io/mt/78870051/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-