.../Feature/VTd/IntelVTdPmrPei/DmarTable.c | 38 +++++++++++++++------- 1 file changed, 26 insertions(+), 12 deletions(-)
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2775
Signed-off-by: Evelyn Wang <iwen.evelyn.wang@intel.com>
Cc: Jenny Huang <jenny.huang@intel.com>
Cc: More Shih <more.shih@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: W Sheng <w.sheng@intel.com>
---
.../Feature/VTd/IntelVTdPmrPei/DmarTable.c | 38 +++++++++++++++-------
1 file changed, 26 insertions(+), 12 deletions(-)
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/DmarTable.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/DmarTable.c
index d920d136f1..fd64051032 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/DmarTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/DmarTable.c
@@ -1,6 +1,6 @@
/** @file
- Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -13,7 +13,7 @@
#include <Library/HobLib.h>
#include <IndustryStandard/Vtd.h>
#include <Ppi/VtdInfo.h>
-
+#include <Guid/VtdPmrInfoHob.h>
#include "IntelVTdPmrPei.h"
/**
@@ -502,19 +502,17 @@ ProcessRmrr (
UINT64 RmrrMask;
UINTN LowBottom;
UINTN LowTop;
- UINTN HighBottom;
+ UINT64 HighBottom;
UINT64 HighTop;
EFI_ACPI_DMAR_HEADER *AcpiDmarTable;
+ VTD_PMR_INFO_HOB *VtdPmrHob;
+ VOID *VtdPmrHobPtr;
+ VtdPmrHobPtr = GetFirstGuidHob (&gVtdPmrInfoDataHobGuid);
AcpiDmarTable = VTdInfo->AcpiDmarTable;
DEBUG ((DEBUG_INFO," RMRR (Base 0x%016lx, Limit 0x%016lx)\n", DmarRmrr->ReservedMemoryRegionBaseAddress, DmarRmrr->ReservedMemoryRegionLimitAddress));
- if ((DmarRmrr->ReservedMemoryRegionBaseAddress == 0) ||
- (DmarRmrr->ReservedMemoryRegionLimitAddress == 0)) {
- return ;
- }
-
DmarDevScopeEntry = (EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER *)((UINTN)(DmarRmrr + 1));
while ((UINTN)DmarDevScopeEntry < (UINTN)DmarRmrr + DmarRmrr->Header.Length) {
ASSERT (DmarDevScopeEntry->Type == EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT);
@@ -523,10 +521,26 @@ ProcessRmrr (
if (VTdIndex != (UINTN)-1) {
RmrrMask = LShiftU64 (1, VTdIndex);
- LowBottom = 0;
- LowTop = (UINTN)DmarRmrr->ReservedMemoryRegionBaseAddress;
- HighBottom = (UINTN)DmarRmrr->ReservedMemoryRegionLimitAddress + 1;
- HighTop = LShiftU64 (1, VTdInfo->HostAddressWidth + 1);
+ if (VtdPmrHobPtr == NULL) {
+ LowBottom = 0;
+ LowTop = (UINTN)DmarRmrr->ReservedMemoryRegionBaseAddress;
+ HighBottom = DmarRmrr->ReservedMemoryRegionLimitAddress + 1;
+ HighTop = LShiftU64 (1, VTdInfo->HostAddressWidth + 1);
+ } else {
+ /**
+ When gVtdPmrInfoDataHobGuid exists, it means:
+ 1. Dma buffer is reserved by memory initialize code
+ 2. PeiGetVtdPmrAlignmentLib is used to get alignment
+ 3. PMR ranges are determined by the system memory map
+ 4. PMR ranges will be conveyed through VTD_PMR_INFO_HOB
+ 5. All IOMMU PMR should have the same ranges
+ **/
+ VtdPmrHob = GET_GUID_HOB_DATA (VtdPmrHobPtr);
+ LowBottom = VtdPmrHob->ProtectedLowBase;
+ LowTop = VtdPmrHob->ProtectedLowLimit;
+ HighBottom = VtdPmrHob->ProtectedHighBase;
+ HighTop = VtdPmrHob->ProtectedHighLimit;
+ }
SetDmaProtectedRange (
VTdInfo,
--
2.16.2.windows.1
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Evelyn, Can you include more info in the commit message? such was reason and result of this change. > -----Original Message----- > From: Wang, Iwen Evelyn <iwen.evelyn.wang@intel.com> > Sent: Tuesday, June 2, 2020 7:49 AM > To: devel@edk2.groups.io > Cc: Huang, Jenny <jenny.huang@intel.com>; Shih, More <more.shih@intel.com>; Ni, Ray <ray.ni@intel.com>; Chaganty, > Rangasai V <rangasai.v.chaganty@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>; Sheng, W <w.sheng@intel.com> > Subject: [PATCH] IntelSiliconPkg-Vtd: Set all IOMMU PMR to same range > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2775 > > Signed-off-by: Evelyn Wang <iwen.evelyn.wang@intel.com> > Cc: Jenny Huang <jenny.huang@intel.com> > Cc: More Shih <more.shih@intel.com> > Cc: Ray Ni <ray.ni@intel.com> > Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> > Cc: Jiewen Yao <jiewen.yao@intel.com> > Cc: W Sheng <w.sheng@intel.com> > --- > .../Feature/VTd/IntelVTdPmrPei/DmarTable.c | 38 +++++++++++++++------- > 1 file changed, 26 insertions(+), 12 deletions(-) > > diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/DmarTable.c > b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/DmarTable.c > index d920d136f1..fd64051032 100644 > --- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/DmarTable.c > +++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/DmarTable.c > @@ -1,6 +1,6 @@ > /** @file > > - Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR> > + Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR> > SPDX-License-Identifier: BSD-2-Clause-Patent > > **/ > @@ -13,7 +13,7 @@ > #include <Library/HobLib.h> > #include <IndustryStandard/Vtd.h> > #include <Ppi/VtdInfo.h> > - > +#include <Guid/VtdPmrInfoHob.h> > #include "IntelVTdPmrPei.h" > > /** > @@ -502,19 +502,17 @@ ProcessRmrr ( > UINT64 RmrrMask; > UINTN LowBottom; > UINTN LowTop; > - UINTN HighBottom; > + UINT64 HighBottom; > UINT64 HighTop; > EFI_ACPI_DMAR_HEADER *AcpiDmarTable; > + VTD_PMR_INFO_HOB *VtdPmrHob; > + VOID *VtdPmrHobPtr; > > + VtdPmrHobPtr = GetFirstGuidHob (&gVtdPmrInfoDataHobGuid); > AcpiDmarTable = VTdInfo->AcpiDmarTable; > > DEBUG ((DEBUG_INFO," RMRR (Base 0x%016lx, Limit 0x%016lx)\n", DmarRmrr->ReservedMemoryRegionBaseAddress, > DmarRmrr->ReservedMemoryRegionLimitAddress)); > > - if ((DmarRmrr->ReservedMemoryRegionBaseAddress == 0) || > - (DmarRmrr->ReservedMemoryRegionLimitAddress == 0)) { > - return ; > - } > - > DmarDevScopeEntry = (EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER *)((UINTN)(DmarRmrr + 1)); > while ((UINTN)DmarDevScopeEntry < (UINTN)DmarRmrr + DmarRmrr->Header.Length) { > ASSERT (DmarDevScopeEntry->Type == EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT); > @@ -523,10 +521,26 @@ ProcessRmrr ( > if (VTdIndex != (UINTN)-1) { > RmrrMask = LShiftU64 (1, VTdIndex); > > - LowBottom = 0; > - LowTop = (UINTN)DmarRmrr->ReservedMemoryRegionBaseAddress; > - HighBottom = (UINTN)DmarRmrr->ReservedMemoryRegionLimitAddress + 1; > - HighTop = LShiftU64 (1, VTdInfo->HostAddressWidth + 1); > + if (VtdPmrHobPtr == NULL) { > + LowBottom = 0; > + LowTop = (UINTN)DmarRmrr->ReservedMemoryRegionBaseAddress; > + HighBottom = DmarRmrr->ReservedMemoryRegionLimitAddress + 1; > + HighTop = LShiftU64 (1, VTdInfo->HostAddressWidth + 1); > + } else { > + /** > + When gVtdPmrInfoDataHobGuid exists, it means: > + 1. Dma buffer is reserved by memory initialize code > + 2. PeiGetVtdPmrAlignmentLib is used to get alignment > + 3. PMR ranges are determined by the system memory map > + 4. PMR ranges will be conveyed through VTD_PMR_INFO_HOB > + 5. All IOMMU PMR should have the same ranges > + **/ > + VtdPmrHob = GET_GUID_HOB_DATA (VtdPmrHobPtr); > + LowBottom = VtdPmrHob->ProtectedLowBase; > + LowTop = VtdPmrHob->ProtectedLowLimit; > + HighBottom = VtdPmrHob->ProtectedHighBase; > + HighTop = VtdPmrHob->ProtectedHighLimit; > + } > > SetDmaProtectedRange ( > VTdInfo, > -- > 2.16.2.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#60558): https://edk2.groups.io/g/devel/message/60558 Mute This Topic: https://groups.io/mt/74618024/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
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