Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl | 52 ++++++++++++++++++++ Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h | 4 ++ 2 files changed, 56 insertions(+)
Add ACPI descriptions of the GPIO and external interrupt (EXIU)
controllers as well as the power button. Note that on rev 0.3
boards, the power button appears to reset the system (this was
not the case on rev 0.1 boards), so it is included for reference
primarily. The same GPIO event mechanism will be used in the future
for reporting hardware errors to the OS.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl | 52 ++++++++++++++++++++
Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h | 4 ++
2 files changed, 56 insertions(+)
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
index aab4fbf0e6b4..acb77739ded6 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
@@ -201,5 +201,57 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "SNI", "SYNQUACR",
}
})
}
+
+ Device (GPIO) {
+ Name (_HID, "SCX0007")
+ Name (_UID, Zero)
+ Name (_CRS, ResourceTemplate () {
+ Memory32Fixed (ReadWrite, SYNQUACER_GPIO_BASE, SYNQUACER_GPIO_SIZE)
+ Memory32Fixed (ReadWrite, SYNQUACER_EXIU_BASE, SYNQUACER_EXIU_SIZE)
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 144 }
+ })
+ Name (_DSD,
+ Package () // _DSD: Device-Specific Data
+ {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package ()
+ {
+ Package () { "socionext,spi-base", 112 },
+ Package ()
+ {
+ "gpio-line-names",
+ Package ()
+ {
+ "DSW3-PIN1", "DSW3-PIN2", "DSW3-PIN3", "DSW3-PIN4",
+ "DSW3-PIN5", "DSW3-PIN6", "DSW3-PIN7", "DSW3-PIN8",
+ "PSIN#", "PWROFF#", "GPIO-A", "GPIO-B",
+ "GPIO-C", "GPIO-D", "PCIE1EXTINT", "PCIE0EXTINT",
+ "PHY2-INT#", "PHY1-INT#", "GPIO-E", "GPIO-F",
+ "GPIO-G", "GPIO-H", "GPIO-I", "GPIO-J",
+ "GPIO-K", "GPIO-L", "PEC-PD26", "PEC-PD27",
+ "PEC-PD28", "PEC-PD29", "PEC-PD30", "PEC-PD31"
+ }
+ }
+ }
+ }
+ )
+ Name (_AEI, ResourceTemplate () {
+ GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullDefault,, "\\_SB.GPIO")
+ {
+ 0x08
+ }
+ })
+ Method (_E08, 0x0, NotSerialized) {
+ Notify (\_SB.PWRB, 0x80)
+ }
+ }
+
+ Device (PWRB) {
+ Name (_HID, "PNP0C0C")
+ Name (_UID, Zero)
+ Method (_STA, 0x0, NotSerialized) {
+ Return (0xF)
+ }
+ }
} // Scope (_SB)
}
diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
index b0fcc306c1ae..cff981c4f8ae 100644
--- a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
+++ b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
@@ -42,6 +42,10 @@
#define SYNQUACER_GPIO_BASE 0x51000000
#define SYNQUACER_GPIO_SIZE SIZE_4KB
+// EXIU interrupt controller
+#define SYNQUACER_EXIU_BASE 0x510c0000
+#define SYNQUACER_EXIU_SIZE 0x20
+
// I2C0 block
#define SYNQUACER_I2C0_BASE 0x51200000
#define SYNQUACER_I2C0_SIZE SIZE_4KB
--
2.20.1
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On Thu, Apr 25, 2019 at 12:51:27PM +0200, Ard Biesheuvel wrote: > Add ACPI descriptions of the GPIO and external interrupt (EXIU) > controllers as well as the power button. Note that on rev 0.3 > boards, the power button appears to reset the system (this was > not the case on rev 0.1 boards), so it is included for reference > primarily. The same GPIO event mechanism will be used in the future > for reporting hardware errors to the OS. > > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> With a contibuted-under: Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> > --- > Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl | 52 ++++++++++++++++++++ > Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h | 4 ++ > 2 files changed, 56 insertions(+) > > diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl > index aab4fbf0e6b4..acb77739ded6 100644 > --- a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl > +++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl > @@ -201,5 +201,57 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "SNI", "SYNQUACR", > } > }) > } > + > + Device (GPIO) { > + Name (_HID, "SCX0007") > + Name (_UID, Zero) > + Name (_CRS, ResourceTemplate () { > + Memory32Fixed (ReadWrite, SYNQUACER_GPIO_BASE, SYNQUACER_GPIO_SIZE) > + Memory32Fixed (ReadWrite, SYNQUACER_EXIU_BASE, SYNQUACER_EXIU_SIZE) > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 144 } > + }) > + Name (_DSD, > + Package () // _DSD: Device-Specific Data > + { > + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), > + Package () > + { > + Package () { "socionext,spi-base", 112 }, > + Package () > + { > + "gpio-line-names", > + Package () > + { > + "DSW3-PIN1", "DSW3-PIN2", "DSW3-PIN3", "DSW3-PIN4", > + "DSW3-PIN5", "DSW3-PIN6", "DSW3-PIN7", "DSW3-PIN8", > + "PSIN#", "PWROFF#", "GPIO-A", "GPIO-B", > + "GPIO-C", "GPIO-D", "PCIE1EXTINT", "PCIE0EXTINT", > + "PHY2-INT#", "PHY1-INT#", "GPIO-E", "GPIO-F", > + "GPIO-G", "GPIO-H", "GPIO-I", "GPIO-J", > + "GPIO-K", "GPIO-L", "PEC-PD26", "PEC-PD27", > + "PEC-PD28", "PEC-PD29", "PEC-PD30", "PEC-PD31" > + } > + } > + } > + } > + ) > + Name (_AEI, ResourceTemplate () { > + GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullDefault,, "\\_SB.GPIO") > + { > + 0x08 > + } > + }) > + Method (_E08, 0x0, NotSerialized) { > + Notify (\_SB.PWRB, 0x80) > + } > + } > + > + Device (PWRB) { > + Name (_HID, "PNP0C0C") > + Name (_UID, Zero) > + Method (_STA, 0x0, NotSerialized) { > + Return (0xF) > + } > + } > } // Scope (_SB) > } > diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h > index b0fcc306c1ae..cff981c4f8ae 100644 > --- a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h > +++ b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h > @@ -42,6 +42,10 @@ > #define SYNQUACER_GPIO_BASE 0x51000000 > #define SYNQUACER_GPIO_SIZE SIZE_4KB > > +// EXIU interrupt controller > +#define SYNQUACER_EXIU_BASE 0x510c0000 > +#define SYNQUACER_EXIU_SIZE 0x20 > + > // I2C0 block > #define SYNQUACER_I2C0_BASE 0x51200000 > #define SYNQUACER_I2C0_SIZE SIZE_4KB > -- > 2.20.1 > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#39636): https://edk2.groups.io/g/devel/message/39636 Mute This Topic: https://groups.io/mt/31340875/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
On Fri, 26 Apr 2019 at 12:58, Leif Lindholm <leif.lindholm@linaro.org> wrote: > > On Thu, Apr 25, 2019 at 12:51:27PM +0200, Ard Biesheuvel wrote: > > Add ACPI descriptions of the GPIO and external interrupt (EXIU) > > controllers as well as the power button. Note that on rev 0.3 > > boards, the power button appears to reset the system (this was > > not the case on rev 0.1 boards), so it is included for reference > > primarily. The same GPIO event mechanism will be used in the future > > for reporting hardware errors to the OS. > > > > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > > With a contibuted-under: > Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> > Thanks, but I'll need to respin this in any case. > > --- > > Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl | 52 ++++++++++++++++++++ > > Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h | 4 ++ > > 2 files changed, 56 insertions(+) > > > > diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl > > index aab4fbf0e6b4..acb77739ded6 100644 > > --- a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl > > +++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl > > @@ -201,5 +201,57 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "SNI", "SYNQUACR", > > } > > }) > > } > > + > > + Device (GPIO) { > > + Name (_HID, "SCX0007") > > + Name (_UID, Zero) > > + Name (_CRS, ResourceTemplate () { > > + Memory32Fixed (ReadWrite, SYNQUACER_GPIO_BASE, SYNQUACER_GPIO_SIZE) > > + Memory32Fixed (ReadWrite, SYNQUACER_EXIU_BASE, SYNQUACER_EXIU_SIZE) > > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 144 } > > + }) > > + Name (_DSD, > > + Package () // _DSD: Device-Specific Data > > + { > > + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), > > + Package () > > + { > > + Package () { "socionext,spi-base", 112 }, > > + Package () > > + { > > + "gpio-line-names", > > + Package () > > + { > > + "DSW3-PIN1", "DSW3-PIN2", "DSW3-PIN3", "DSW3-PIN4", > > + "DSW3-PIN5", "DSW3-PIN6", "DSW3-PIN7", "DSW3-PIN8", > > + "PSIN#", "PWROFF#", "GPIO-A", "GPIO-B", > > + "GPIO-C", "GPIO-D", "PCIE1EXTINT", "PCIE0EXTINT", > > + "PHY2-INT#", "PHY1-INT#", "GPIO-E", "GPIO-F", > > + "GPIO-G", "GPIO-H", "GPIO-I", "GPIO-J", > > + "GPIO-K", "GPIO-L", "PEC-PD26", "PEC-PD27", > > + "PEC-PD28", "PEC-PD29", "PEC-PD30", "PEC-PD31" > > + } > > + } > > + } > > + } > > + ) > > + Name (_AEI, ResourceTemplate () { > > + GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullDefault,, "\\_SB.GPIO") > > + { > > + 0x08 > > + } > > + }) > > + Method (_E08, 0x0, NotSerialized) { > > + Notify (\_SB.PWRB, 0x80) > > + } > > + } > > + > > + Device (PWRB) { > > + Name (_HID, "PNP0C0C") > > + Name (_UID, Zero) > > + Method (_STA, 0x0, NotSerialized) { > > + Return (0xF) > > + } > > + } > > } // Scope (_SB) > > } > > diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h > > index b0fcc306c1ae..cff981c4f8ae 100644 > > --- a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h > > +++ b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h > > @@ -42,6 +42,10 @@ > > #define SYNQUACER_GPIO_BASE 0x51000000 > > #define SYNQUACER_GPIO_SIZE SIZE_4KB > > > > +// EXIU interrupt controller > > +#define SYNQUACER_EXIU_BASE 0x510c0000 > > +#define SYNQUACER_EXIU_SIZE 0x20 > > + > > // I2C0 block > > #define SYNQUACER_I2C0_BASE 0x51200000 > > #define SYNQUACER_I2C0_SIZE SIZE_4KB > > -- > > 2.20.1 > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#39760): https://edk2.groups.io/g/devel/message/39760 Mute This Topic: https://groups.io/mt/31340875/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
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