From nobody Fri May 10 08:36:25 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+39540+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+39540+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1556189496; cv=none; d=zoho.com; s=zohoarc; b=kABBN/gtrdzeo1ZWsXS5V+/oec/EGFeZ6Z+MZ+TE2DBuZqbMLHSlEy6V7HZXl/kAxHp0x0iRzajLzM07/w6J4ndMYBakhpSPGIqmHE9ljDZbp2uTBIbjo8E4ccoo27k8y+6WCBdn135PsX3h+zd2jtX68Zxrfd+msLWG6BKzvqE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1556189496; h=Content-Transfer-Encoding:Cc:Date:From:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To:ARC-Authentication-Results; bh=NEgl6mKbn77hxqhaSKL6dbWmHTDHY3QYq2DqpRa4n1U=; b=Q0wUt+3FfZ1fAEdNFeAuhmo4gcU//J3RdzEXOBoL+RoGuFG/lHgxx4NFjrZZzWUKUz033/zTNAPVyG4aKtBma6dpjEHIj2G6LPvwYaAfOMg0Pa+TkLYVtXDVCuIyuj+X0nPA8in6OgRaRW0N5kPOtHeeJQKABE1Y6rXLr8qR/y0= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+39540+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1556189496541738.3614925878189; Thu, 25 Apr 2019 03:51:36 -0700 (PDT) Return-Path: X-Received: from mail-wr1-f42.google.com (mail-wr1-f42.google.com [209.85.221.42]) by groups.io with SMTP; Thu, 25 Apr 2019 03:51:35 -0700 X-Received: by mail-wr1-f42.google.com with SMTP id g3so29617377wrx.9 for ; Thu, 25 Apr 2019 03:51:35 -0700 (PDT) X-Gm-Message-State: APjAAAVogLmvOk7zWL36oTijMjdnrF/MrNligJPgH3euF4GhtuWmbA+l Vi/9gozMg0Vmb1PVuT7g0wrK4px9TV65/w== X-Google-Smtp-Source: APXvYqyunjQXecMPlK6HaKmsUBGy4R/4z7PuB4GBHNQ/hjZRixw6Ay8aMGhYUzHu5jFeM/8HBmFDuA== X-Received: by 2002:a5d:670b:: with SMTP id o11mr24411612wru.125.1556189493730; Thu, 25 Apr 2019 03:51:33 -0700 (PDT) X-Received: from sudo.home ([2a01:cb1d:112:6f00:95f:9014:5be9:5288]) by smtp.gmail.com with ESMTPSA id n17sm18449197wrw.77.2019.04.25.03.51.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 25 Apr 2019 03:51:32 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: leif.lindholm@linaro.org, graeme.gregory@linaro.org, masahisa.kojima@linaro.org, Ard Biesheuvel Subject: [edk2-devel] [PATCH edk2-platforms] Silicon/SynQuacer: add ACPI description of GPIO controller and power button Date: Thu, 25 Apr 2019 12:51:27 +0200 Message-Id: <20190425105127.26429-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ard.biesheuvel@linaro.org Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1556189496; bh=W9ULiSKszpqEJJ4n8TD9VB3JHt9hYAaAM4UKdyVkXEg=; h=Cc:Date:From:Reply-To:Subject:To; b=gYsYKncQjGMcWkqvbshbu7ge0cDgr6b703QNFYzasgsEuJBzhVnwSdW26bzA0bM9lkH VLWPFWGrot11J33s1dCA3J6H9CCHGofceQGxVJ3h+4N7ctBrGjpV1yGHK4hAvYVsdDBTA 4EIVd0pJ4UwCR0aZFBDT/+D5PVhEysUiihk= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Add ACPI descriptions of the GPIO and external interrupt (EXIU) controllers as well as the power button. Note that on rev 0.3 boards, the power button appears to reset the system (this was not the case on rev 0.1 boards), so it is included for reference primarily. The same GPIO event mechanism will be used in the future for reporting hardware errors to the OS. Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl | 52 ++++++++++++= ++++++++ Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h | 4 ++ 2 files changed, 56 insertions(+) diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl b/Silicon/Soci= onext/SynQuacer/AcpiTables/Dsdt.asl index aab4fbf0e6b4..acb77739ded6 100644 --- a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl +++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl @@ -201,5 +201,57 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "SNI", "S= YNQUACR", } }) } + + Device (GPIO) { + Name (_HID, "SCX0007") + Name (_UID, Zero) + Name (_CRS, ResourceTemplate () { + Memory32Fixed (ReadWrite, SYNQUACER_GPIO_BASE, SYNQUACER_GPIO_SIZE) + Memory32Fixed (ReadWrite, SYNQUACER_EXIU_BASE, SYNQUACER_EXIU_SIZE) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 144 } + }) + Name (_DSD, + Package () // _DSD: Device-Specific Data + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () + { + Package () { "socionext,spi-base", 112 }, + Package () + { + "gpio-line-names", + Package () + { + "DSW3-PIN1", "DSW3-PIN2", "DSW3-PIN3", "DSW3-PIN4", + "DSW3-PIN5", "DSW3-PIN6", "DSW3-PIN7", "DSW3-PIN8", + "PSIN#", "PWROFF#", "GPIO-A", "GPIO-B", + "GPIO-C", "GPIO-D", "PCIE1EXTINT", "PCIE0EXTINT", + "PHY2-INT#", "PHY1-INT#", "GPIO-E", "GPIO-F", + "GPIO-G", "GPIO-H", "GPIO-I", "GPIO-J", + "GPIO-K", "GPIO-L", "PEC-PD26", "PEC-PD27", + "PEC-PD28", "PEC-PD29", "PEC-PD30", "PEC-PD31" + } + } + } + } + ) + Name (_AEI, ResourceTemplate () { + GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullDefault,, "\\_SB.G= PIO") + { + 0x08 + } + }) + Method (_E08, 0x0, NotSerialized) { + Notify (\_SB.PWRB, 0x80) + } + } + + Device (PWRB) { + Name (_HID, "PNP0C0C") + Name (_UID, Zero) + Method (_STA, 0x0, NotSerialized) { + Return (0xF) + } + } } // Scope (_SB) } diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h b/Sil= icon/Socionext/SynQuacer/Include/Platform/MemoryMap.h index b0fcc306c1ae..cff981c4f8ae 100644 --- a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h +++ b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h @@ -42,6 +42,10 @@ #define SYNQUACER_GPIO_BASE 0x51000000 #define SYNQUACER_GPIO_SIZE SIZE_4KB =20 +// EXIU interrupt controller +#define SYNQUACER_EXIU_BASE 0x510c0000 +#define SYNQUACER_EXIU_SIZE 0x20 + // I2C0 block #define SYNQUACER_I2C0_BASE 0x51200000 #define SYNQUACER_I2C0_SIZE SIZE_4KB --=20 2.20.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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