Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
---
Platform/BroxtonPlatformPkg/BuildBios.bat | 6 ++++++
Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc | 2 +-
.../BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Ia32/InitNEM.asm | 4 ++--
3 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/Platform/BroxtonPlatformPkg/BuildBios.bat b/Platform/BroxtonPlatformPkg/BuildBios.bat
index a326d3c64..0ebc5705a 100644
--- a/Platform/BroxtonPlatformPkg/BuildBios.bat
+++ b/Platform/BroxtonPlatformPkg/BuildBios.bat
@@ -317,6 +317,12 @@ if ErrorLevel 1 goto BldFail
echo Building ResetVector...
set ResetVectorPath=%WORKSPACE%\%PLATFORM_RC_PACKAGE%\Cpu\ResetVector
+
+pushd %ResetVectorPath%\Vtf0
+ nasm.exe %Nasm_Flags% -o Bin\ResetVector.ia32.port80.raw ResetVectorCode.asm
+ python %CORE_PATH%\UefiCpuPkg\ResetVector\Vtf0\Tools\FixupForRawSection.py Bin\ResetVector.ia32.port80.raw
+popd
+
pushd %ResetVectorPath%\Vtf1
nasm.exe %Nasm_Flags% -o Bin\ResetVector.ia32.port80.raw ResetVectorCode.asm
python %CORE_PATH%\UefiCpuPkg\ResetVector\Vtf0\Tools\FixupForRawSection.py Bin\ResetVector.ia32.port80.raw
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc
index e8866a0dc..ff751c164 100644
--- a/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc
+++ b/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc
@@ -152,7 +152,7 @@
DEFINE FSP_IBBL_SIZE = 0x2000
DEFINE BLD_IBBL_SIZE = 0x6000
- DEFINE FSP_IBBM_SIZE = 0x56000
+ DEFINE FSP_IBBM_SIZE = 0x58000
DEFINE BLD_IBBM_SIZE = 0x1E000
DEFINE CAR_BASE_ADDRESS = 0xFEF00000 # @PcdTemporaryRamBase
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Ia32/InitNEM.asm b/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Ia32/InitNEM.asm
index 9fa43fcc3..28560ab89 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Ia32/InitNEM.asm
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Ia32/InitNEM.asm
@@ -1,7 +1,7 @@
;; @file
; Search for the Boot Firmware Volume (BFV) base address.
;
-; Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>
;
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
@@ -183,7 +183,7 @@ istruc HobStruc
dd 0x00100000 ; .CarSize
dd 0xFFF00000 ; .IBBSource = Not used
dd 0xFEF45000 ; .IBBBase = .CarBase
- dd 0x00078000 ; .IBBSize = PcdFlashFvIBBMSize = FLASH_REGION_FV_IBBM_SIZE in .fdf
+ dd 0x00076000 ; .IBBSize = size of (FVIBBM.fv+FSP_M.fv) = BLD_IBBM_SIZE + FSP_IBBM_SIZE = 0x76000
dd 0xFFFFF000 ; .IBBLSource = 0x100000000 - .IBBLSize = PcdFlashFvIBBLBase
dd 0xFEF40000 ; .IBBLBase = .IBBBase + .IBBSize
dd 0x00001000 ; .IBBLSize = PcdFlashFvIBBLSize = FLASH_REGION_FV_IBBL_SIZE in .fdf
--
2.11.0.windows.1
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