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When validating decoder IW/IG when setting up regions, the granularity
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When validating decoder IW/IG when setting up regions, the granularity
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is irrelevant when iw=1 - all accesses will always route to the only
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is irrelevant when iw=1 - all accesses will always route to the only
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target anyway - so all ig values are "correct". Loosen the requirement
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target anyway - so all ig values are "correct". Loosen the requirement
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that `ig = (parent_iw * parent_ig)` when iw=1.
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that `ig = (parent_iw * parent_ig)` when iw=1.
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On some Zen5 platforms, the platform BIOS specifies a 256-byte
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interleave granularity window for host bridges when there is only
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one target downstream. This leads to Linux rejecting the configuration
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of a region with a x2 root with two x1 hostbridges.
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Decoder Programming:
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root - iw:2 ig:256
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hb1 - iw:1 ig:256 (Linux expects 512)
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hb2 - iw:1 ig:256 (Linux expects 512)
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ep1 - iw:2 ig:256
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ep2 - iw:2 ig:256
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This change allows all decoders downstream of a passthrough decoder to
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also be configured as passthrough (iw:1 ig:X), but still disallows
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downstream decoders from applying subsequent interleaves.
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e.g. in the above example if there was another decoder south of hb1
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attempting to interleave 2 endpoints - Linux would enforce hb1.ig=512
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because the southern decoder would have iw:2 and require ig=pig*piw.
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Signed-off-by: Gregory Price <gourry@gourry.net>
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Signed-off-by: Gregory Price <gourry@gourry.net>
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Reviewed-by: Dave Jiang <dave.jiang@intel.com>
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---
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---
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drivers/cxl/core/region.c | 2 +-
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drivers/cxl/core/region.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
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diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
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