There's a series of bugfix that's been accepted:

https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git/commit/?id=d80a3091308491455b6501b1c4b68698c4a7cd24

However, The series is making the driver poke into IOMMU internals instead of

implementing appropriate IOMMU workarounds. After discussion, the series was reverted:

https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git/commit/?id=249cfa318fb1b77eb726c2ff4f74c9685f04e568

But only two patches are related to the IOMMU.

Other patches involve only the modification of the driver.

This series resends other patches.

---

ChangeLog:

v2 RESEND -> v3:

- Add one comment, suggested by Michal Swiatkowski.

v2 RESEND: https://lore.kernel.org/all/20241217010839.1742227-1-shaojijie@huawei.com/

v2 -> v2 RESEND:

- Send to net instead of net-next.

v2: https://lore.kernel.org/all/20241216132346.1197079-1-shaojijie@huawei.com/

v1 -> v2:

- Fix a data inconsistency issue caused by simultaneous access of multiple readers,

suggested by Jakub.

v1: https://lore.kernel.org/all/20241107133023.3813095-1-shaojijie@huawei.com/

---

Hao Lan (4):

net: hns3: fixed reset failure issues caused by the incorrect reset

type

net: hns3: fix missing features due to dev->features configuration too

early

net: hns3: Resolved the issue that the debugfs query result is

inconsistent.

net: hns3: fixed hclge_fetch_pf_reg accesses bar space out of bounds

issue

Jian Shen (2):

net: hns3: don't auto enable misc vector

net: hns3: initialize reset_timer before hclgevf_misc_irq_init()

Jie Wang (1):

net: hns3: fix kernel crash when 1588 is sent on HIP08 devices

drivers/net/ethernet/hisilicon/hns3/hnae3.h | 3 -

.../ethernet/hisilicon/hns3/hns3_debugfs.c | 96 ++++++-------------

.../net/ethernet/hisilicon/hns3/hns3_enet.c | 1 -

.../hisilicon/hns3/hns3pf/hclge_main.c | 45 +++++++--

.../hisilicon/hns3/hns3pf/hclge_ptp.c | 3 +

.../hisilicon/hns3/hns3pf/hclge_regs.c | 9 +-

.../hisilicon/hns3/hns3vf/hclgevf_main.c | 41 ++++++--

.../hisilicon/hns3/hns3vf/hclgevf_regs.c | 9 +-

8 files changed, 114 insertions(+), 93 deletions(-)

From: Hao Lan <lanhao@huawei.com>

When a reset type that is not supported by the driver is input, a reset

pending flag bit of the HNAE3_NONE_RESET type is generated in

reset_pending. The driver does not have a mechanism to clear this type

of error. As a result, the driver considers that the reset is not

complete. This patch provides a mechanism to clear the

HNAE3_NONE_RESET flag and the parameter of

hnae3_ae_ops.set_default_reset_request is verified.

The error message:

hns3 0000:39:01.0: cmd failed -16

hns3 0000:39:01.0: hclge device re-init failed, VF is disabled!

hns3 0000:39:01.0: failed to reset VF stack

hns3 0000:39:01.0: failed to reset VF(4)

hns3 0000:39:01.0: prepare reset(2) wait done

hns3 0000:39:01.0 eth4: already uninitialized

Use the crash tool to view struct hclgevf_dev:

struct hclgevf_dev {

...

    default_reset_request = 0x20,

    reset_level = HNAE3_NONE_RESET,

    reset_pending = 0x100,

    reset_type = HNAE3_NONE_RESET,

...

};

Fixes: 720bd5837e37 ("net: hns3: add set_default_reset_request in the hnae3_ae_ops")

Signed-off-by: Hao Lan <lanhao@huawei.com>

Signed-off-by: Jijie Shao <shaojijie@huawei.com>

---

.../hisilicon/hns3/hns3pf/hclge_main.c | 33 ++++++++++++++--

.../hisilicon/hns3/hns3vf/hclgevf_main.c | 38 ++++++++++++++++---

2 files changed, 61 insertions(+), 10 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

index XXXXXXX..XXXXXXX 100644

--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

@@ -XXX,XX +XXX,XX @@ static int hclge_set_vf_link_state(struct hnae3_handle *handle, int vf,

    return ret;

}

+static void hclge_set_reset_pending(struct hclge_dev *hdev,

+                 enum hnae3_reset_type reset_type)

+{

+    /* When an incorrect reset type is executed, the get_reset_level

+     * function generates the HNAE3_NONE_RESET flag. As a result, this

+     * type do not need to pending.

+     */

+    if (reset_type != HNAE3_NONE_RESET)

+        set_bit(reset_type, &hdev->reset_pending);

+}

+

static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval)

{

    u32 cmdq_src_reg, msix_src_reg, hw_err_src_reg;

@@ -XXX,XX +XXX,XX @@ static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval)

     */

    if (BIT(HCLGE_VECTOR0_IMPRESET_INT_B) & msix_src_reg) {

        dev_info(&hdev->pdev->dev, "IMP reset interrupt\n");

-        set_bit(HNAE3_IMP_RESET, &hdev->reset_pending);

+        hclge_set_reset_pending(hdev, HNAE3_IMP_RESET);

        set_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state);

        *clearval = BIT(HCLGE_VECTOR0_IMPRESET_INT_B);

        hdev->rst_stats.imp_rst_cnt++;

@@ -XXX,XX +XXX,XX @@ static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval)

    if (BIT(HCLGE_VECTOR0_GLOBALRESET_INT_B) & msix_src_reg) {

        dev_info(&hdev->pdev->dev, "global reset interrupt\n");

        set_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state);

-        set_bit(HNAE3_GLOBAL_RESET, &hdev->reset_pending);

+        hclge_set_reset_pending(hdev, HNAE3_GLOBAL_RESET);

        *clearval = BIT(HCLGE_VECTOR0_GLOBALRESET_INT_B);

        hdev->rst_stats.global_rst_cnt++;

        return HCLGE_VECTOR0_EVENT_RST;

@@ -XXX,XX +XXX,XX @@ static void hclge_do_reset(struct hclge_dev *hdev)

    case HNAE3_FUNC_RESET:

        dev_info(&pdev->dev, "PF reset requested\n");

        /* schedule again to check later */

-        set_bit(HNAE3_FUNC_RESET, &hdev->reset_pending);

+        hclge_set_reset_pending(hdev, HNAE3_FUNC_RESET);

        hclge_reset_task_schedule(hdev);

        break;

    default:

@@ -XXX,XX +XXX,XX @@ static enum hnae3_reset_type hclge_get_reset_level(struct hnae3_ae_dev *ae_dev,

        clear_bit(HNAE3_FLR_RESET, addr);

    }

+    clear_bit(HNAE3_NONE_RESET, addr);

+

    if (hdev->reset_type != HNAE3_NONE_RESET &&

     rst_level < hdev->reset_type)

        return HNAE3_NONE_RESET;

@@ -XXX,XX +XXX,XX @@ static bool hclge_reset_err_handle(struct hclge_dev *hdev)

        return false;

    } else if (hdev->rst_stats.reset_fail_cnt < MAX_RESET_FAIL_CNT) {

        hdev->rst_stats.reset_fail_cnt++;

-        set_bit(hdev->reset_type, &hdev->reset_pending);

+        hclge_set_reset_pending(hdev, hdev->reset_type);

        dev_info(&hdev->pdev->dev,

             "re-schedule reset task(%u)\n",

             hdev->rst_stats.reset_fail_cnt);

@@ -XXX,XX +XXX,XX @@ static void hclge_reset_event(struct pci_dev *pdev, struct hnae3_handle *handle)

static void hclge_set_def_reset_request(struct hnae3_ae_dev *ae_dev,

                    enum hnae3_reset_type rst_type)

{

+#define HCLGE_SUPPORT_RESET_TYPE \

+    (BIT(HNAE3_FLR_RESET) | BIT(HNAE3_FUNC_RESET) | \

+    BIT(HNAE3_GLOBAL_RESET) | BIT(HNAE3_IMP_RESET))

+

    struct hclge_dev *hdev = ae_dev->priv;

+    if (!(BIT(rst_type) & HCLGE_SUPPORT_RESET_TYPE)) {

+        /* To prevent reset triggered by hclge_reset_event */

+        set_bit(HNAE3_NONE_RESET, &hdev->default_reset_request);

+        dev_warn(&hdev->pdev->dev, "unsupported reset type %d\n",

+             rst_type);

+        return;

+    }

+

    set_bit(rst_type, &hdev->default_reset_request);

}

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c

index XXXXXXX..XXXXXXX 100644

--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c

+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c

@@ -XXX,XX +XXX,XX @@ static int hclgevf_notify_roce_client(struct hclgevf_dev *hdev,

    return ret;

}

+static void hclgevf_set_reset_pending(struct hclgevf_dev *hdev,

+                 enum hnae3_reset_type reset_type)

+{

+    /* When an incorrect reset type is executed, the get_reset_level

+     * function generates the HNAE3_NONE_RESET flag. As a result, this

+     * type do not need to pending.

+     */

+    if (reset_type != HNAE3_NONE_RESET)

+        set_bit(reset_type, &hdev->reset_pending);

+}

+

static int hclgevf_reset_wait(struct hclgevf_dev *hdev)

{

#define HCLGEVF_RESET_WAIT_US    20000

@@ -XXX,XX +XXX,XX @@ static void hclgevf_reset_err_handle(struct hclgevf_dev *hdev)

        hdev->rst_stats.rst_fail_cnt);

    if (hdev->rst_stats.rst_fail_cnt < HCLGEVF_RESET_MAX_FAIL_CNT)

-        set_bit(hdev->reset_type, &hdev->reset_pending);

+        hclgevf_set_reset_pending(hdev, hdev->reset_type);

    if (hclgevf_is_reset_pending(hdev)) {

        set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state);

@@ -XXX,XX +XXX,XX @@ static enum hnae3_reset_type hclgevf_get_reset_level(unsigned long *addr)

        clear_bit(HNAE3_FLR_RESET, addr);

    }

+    clear_bit(HNAE3_NONE_RESET, addr);

+

    return rst_level;

}

@@ -XXX,XX +XXX,XX @@ static void hclgevf_reset_event(struct pci_dev *pdev,

    struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);

    struct hclgevf_dev *hdev = ae_dev->priv;

-    dev_info(&hdev->pdev->dev, "received reset request from VF enet\n");

-

    if (hdev->default_reset_request)

        hdev->reset_level =

            hclgevf_get_reset_level(&hdev->default_reset_request);

    else

        hdev->reset_level = HNAE3_VF_FUNC_RESET;

+    dev_info(&hdev->pdev->dev, "received reset request from VF enet, reset level is %d\n",

+         hdev->reset_level);

+

    /* reset of this VF requested */

    set_bit(HCLGEVF_RESET_REQUESTED, &hdev->reset_state);

    hclgevf_reset_task_schedule(hdev);

@@ -XXX,XX +XXX,XX @@ static void hclgevf_reset_event(struct pci_dev *pdev,

static void hclgevf_set_def_reset_request(struct hnae3_ae_dev *ae_dev,

                     enum hnae3_reset_type rst_type)

{

+#define HCLGEVF_SUPPORT_RESET_TYPE \

+    (BIT(HNAE3_VF_RESET) | BIT(HNAE3_VF_FUNC_RESET) | \

+    BIT(HNAE3_VF_PF_FUNC_RESET) | BIT(HNAE3_VF_FULL_RESET) | \

+    BIT(HNAE3_FLR_RESET) | BIT(HNAE3_VF_EXP_RESET))

+

    struct hclgevf_dev *hdev = ae_dev->priv;

+    if (!(BIT(rst_type) & HCLGEVF_SUPPORT_RESET_TYPE)) {

+        /* To prevent reset triggered by hclge_reset_event */

+        set_bit(HNAE3_NONE_RESET, &hdev->default_reset_request);

+        dev_info(&hdev->pdev->dev, "unsupported reset type %d\n",

+             rst_type);

+        return;

+    }

    set_bit(rst_type, &hdev->default_reset_request);

}

@@ -XXX,XX +XXX,XX @@ static void hclgevf_reset_service_task(struct hclgevf_dev *hdev)

         */

        if (hdev->reset_attempts > HCLGEVF_MAX_RESET_ATTEMPTS_CNT) {

            /* prepare for full reset of stack + pcie interface */

-            set_bit(HNAE3_VF_FULL_RESET, &hdev->reset_pending);

+            hclgevf_set_reset_pending(hdev, HNAE3_VF_FULL_RESET);

            /* "defer" schedule the reset task again */

            set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state);

        } else {

            hdev->reset_attempts++;

-            set_bit(hdev->reset_level, &hdev->reset_pending);

+            hclgevf_set_reset_pending(hdev, hdev->reset_level);

            set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state);

        }

        hclgevf_reset_task_schedule(hdev);

@@ -XXX,XX +XXX,XX @@ static enum hclgevf_evt_cause hclgevf_check_evt_cause(struct hclgevf_dev *hdev,

        rst_ing_reg = hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING);

        dev_info(&hdev->pdev->dev,

             "receive reset interrupt 0x%x!\n", rst_ing_reg);

-        set_bit(HNAE3_VF_RESET, &hdev->reset_pending);

+        hclgevf_set_reset_pending(hdev, HNAE3_VF_RESET);

        set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state);

        set_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state);

        *clearval = ~(1U << HCLGEVF_VECTOR0_RST_INT_B);

--

2.33.0

From: Hao Lan <lanhao@huawei.com>

This patch modifies the implementation of debugfs:

When the user process stops unexpectedly, not all data of the file system

is read. In this case, the save_buf pointer is not released. When the

user process is called next time, save_buf is used to copy the cached

data to the user space. As a result, the queried data is stale.

To solve this problem, this patch implements .open() and .release() handler

for debugfs file_operations. moving allocation buffer and execution

of the cmd to the .open() handler and freeing in to the .release() handler.

Allocate separate buffer for each reader and associate the buffer

with the file pointer.

When different user read processes no longer share the buffer,

the stale data problem is fixed.

Fixes: 5e69ea7ee2a6 ("net: hns3: refactor the debugfs process")

Signed-off-by: Hao Lan <lanhao@huawei.com>

Signed-off-by: Guangwei Zhang <zhangwangwei6@huawei.com>

Signed-off-by: Jijie Shao <shaojijie@huawei.com>

Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>

---

ChangeLog:

v1 -> v2:

- Fix a data inconsistency issue caused by simultaneous access of multiple readers,

suggested by Jakub.

v1: https://lore.kernel.org/all/20241107133023.3813095-1-shaojijie@huawei.com/

---

drivers/net/ethernet/hisilicon/hns3/hnae3.h | 3 -

.../ethernet/hisilicon/hns3/hns3_debugfs.c | 96 ++++++-------------

2 files changed, 31 insertions(+), 68 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h

index XXXXXXX..XXXXXXX 100644

--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h

+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h

@@ -XXX,XX +XXX,XX @@ struct hnae3_handle {

    u8 netdev_flags;

    struct dentry *hnae3_dbgfs;

-    /* protects concurrent contention between debugfs commands */

-    struct mutex dbgfs_lock;

-    char **dbgfs_buf;

    /* Network interface message level enabled bits */

    u32 msg_enable;

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c

index XXXXXXX..XXXXXXX 100644

--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c

+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c

@@ -XXX,XX +XXX,XX @@ static int hns3_dbg_read_cmd(struct hns3_dbg_data *dbg_data,

static ssize_t hns3_dbg_read(struct file *filp, char __user *buffer,

             size_t count, loff_t *ppos)

{

-    struct hns3_dbg_data *dbg_data = filp->private_data;

+    char *buf = filp->private_data;

+

+    return simple_read_from_buffer(buffer, count, ppos, buf, strlen(buf));

+}

+

+static int hns3_dbg_open(struct inode *inode, struct file *filp)

+{

+    struct hns3_dbg_data *dbg_data = inode->i_private;

    struct hnae3_handle *handle = dbg_data->handle;

    struct hns3_nic_priv *priv = handle->priv;

-    ssize_t size = 0;

-    char **save_buf;

-    char *read_buf;

    u32 index;

+    char *buf;

    int ret;

+    if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||

+     test_bit(HNS3_NIC_STATE_RESETTING, &priv->state))

+        return -EBUSY;

+

    ret = hns3_dbg_get_cmd_index(dbg_data, &index);

    if (ret)

        return ret;

-    mutex_lock(&handle->dbgfs_lock);

-    save_buf = &handle->dbgfs_buf[index];

-

-    if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||

-     test_bit(HNS3_NIC_STATE_RESETTING, &priv->state)) {

-        ret = -EBUSY;

-        goto out;

-    }

-

-    if (*save_buf) {

-        read_buf = *save_buf;

-    } else {

-        read_buf = kvzalloc(hns3_dbg_cmd[index].buf_len, GFP_KERNEL);

-        if (!read_buf) {

-            ret = -ENOMEM;

-            goto out;

-        }

-

-        /* save the buffer addr until the last read operation */

-        *save_buf = read_buf;

-

-        /* get data ready for the first time to read */

-        ret = hns3_dbg_read_cmd(dbg_data, hns3_dbg_cmd[index].cmd,

-                    read_buf, hns3_dbg_cmd[index].buf_len);

-        if (ret)

-            goto out;

-    }

+    buf = kvzalloc(hns3_dbg_cmd[index].buf_len, GFP_KERNEL);

+    if (!buf)

+        return -ENOMEM;

-    size = simple_read_from_buffer(buffer, count, ppos, read_buf,

-                 strlen(read_buf));

-    if (size > 0) {

-        mutex_unlock(&handle->dbgfs_lock);

-        return size;

+    ret = hns3_dbg_read_cmd(dbg_data, hns3_dbg_cmd[index].cmd,

+                buf, hns3_dbg_cmd[index].buf_len);

+    if (ret) {

+        kvfree(buf);

+        return ret;

    }

-out:

-    /* free the buffer for the last read operation */

-    if (*save_buf) {

-        kvfree(*save_buf);

-        *save_buf = NULL;

-    }

+    filp->private_data = buf;

+    return 0;

+}

-    mutex_unlock(&handle->dbgfs_lock);

-    return ret;

+static int hns3_dbg_release(struct inode *inode, struct file *filp)

+{

+    kvfree(filp->private_data);

+    filp->private_data = NULL;

+    return 0;

}

static const struct file_operations hns3_dbg_fops = {

    .owner = THIS_MODULE,

-    .open = simple_open,

+    .open = hns3_dbg_open,

    .read = hns3_dbg_read,

+    .release = hns3_dbg_release,

};

static int hns3_dbg_bd_file_init(struct hnae3_handle *handle, u32 cmd)

@@ -XXX,XX +XXX,XX @@ int hns3_dbg_init(struct hnae3_handle *handle)

    int ret;

    u32 i;

-    handle->dbgfs_buf = devm_kcalloc(&handle->pdev->dev,

-                     ARRAY_SIZE(hns3_dbg_cmd),

-                     sizeof(*handle->dbgfs_buf),

-                     GFP_KERNEL);

-    if (!handle->dbgfs_buf)

-        return -ENOMEM;

-

    hns3_dbg_dentry[HNS3_DBG_DENTRY_COMMON].dentry =

                debugfs_create_dir(name, hns3_dbgfs_root);

    handle->hnae3_dbgfs = hns3_dbg_dentry[HNS3_DBG_DENTRY_COMMON].dentry;

@@ -XXX,XX +XXX,XX @@ int hns3_dbg_init(struct hnae3_handle *handle)

            debugfs_create_dir(hns3_dbg_dentry[i].name,

                     handle->hnae3_dbgfs);

-    mutex_init(&handle->dbgfs_lock);

-

    for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd); i++) {

        if ((hns3_dbg_cmd[i].cmd == HNAE3_DBG_CMD_TM_NODES &&

         ae_dev->dev_version <= HNAE3_DEVICE_VERSION_V2) ||

@@ -XXX,XX +XXX,XX @@ int hns3_dbg_init(struct hnae3_handle *handle)

out:

    debugfs_remove_recursive(handle->hnae3_dbgfs);

    handle->hnae3_dbgfs = NULL;

-    mutex_destroy(&handle->dbgfs_lock);

    return ret;

}

void hns3_dbg_uninit(struct hnae3_handle *handle)

{

-    u32 i;

-

    debugfs_remove_recursive(handle->hnae3_dbgfs);

    handle->hnae3_dbgfs = NULL;

-

-    for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd); i++)

-        if (handle->dbgfs_buf[i]) {

-            kvfree(handle->dbgfs_buf[i]);

-            handle->dbgfs_buf[i] = NULL;

-        }

-

-    mutex_destroy(&handle->dbgfs_lock);

}

void hns3_dbg_register_debugfs(const char *debugfs_dir_name)

--

2.33.0

From: Jian Shen <shenjian15@huawei.com>

Currently, there is a time window between misc irq enabled

and service task inited. If an interrupte is reported at

this time, it will cause warning like below:

[ 16.324639] Call trace:

[ 16.324641] __queue_delayed_work+0xb8/0xe0

[ 16.324643] mod_delayed_work_on+0x78/0xd0

[ 16.324655] hclge_errhand_task_schedule+0x58/0x90 [hclge]

[ 16.324662] hclge_misc_irq_handle+0x168/0x240 [hclge]

[ 16.324666] __handle_irq_event_percpu+0x64/0x1e0

[ 16.324667] handle_irq_event+0x80/0x170

[ 16.324670] handle_fasteoi_edge_irq+0x110/0x2bc

[ 16.324671] __handle_domain_irq+0x84/0xfc

[ 16.324673] gic_handle_irq+0x88/0x2c0

[ 16.324674] el1_irq+0xb8/0x140

[ 16.324677] arch_cpu_idle+0x18/0x40

[ 16.324679] default_idle_call+0x5c/0x1bc

[ 16.324682] cpuidle_idle_call+0x18c/0x1c4

[ 16.324684] do_idle+0x174/0x17c

[ 16.324685] cpu_startup_entry+0x30/0x6c

[ 16.324687] secondary_start_kernel+0x1a4/0x280

[ 16.324688] ---[ end trace 6aa0bff672a964aa ]---

So don't auto enable misc vector when request irq..

Fixes: 7be1b9f3e99f ("net: hns3: make hclge_service use delayed workqueue")

Signed-off-by: Jian Shen <shenjian15@huawei.com>

.../net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 12 +++++++-----

1 file changed, 7 insertions(+), 5 deletions(-)

@@ -XXX,XX +XXX,XX @@

#include <linux/etherdevice.h>

#include <linux/init.h>

#include <linux/interrupt.h>

+#include <linux/irq.h>

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/netdevice.h>

@@ -XXX,XX +XXX,XX @@ static int hclge_misc_irq_init(struct hclge_dev *hdev)

    snprintf(hdev->misc_vector.name, HNAE3_INT_NAME_LEN, "%s-misc-%s",

         HCLGE_NAME, pci_name(hdev->pdev));

    ret = request_irq(hdev->misc_vector.vector_irq, hclge_misc_irq_handle,

-             0, hdev->misc_vector.name, hdev);

+             IRQF_NO_AUTOEN, hdev->misc_vector.name, hdev);

    if (ret) {

        hclge_free_vector(hdev, 0);

        dev_err(&hdev->pdev->dev, "request misc irq(%d) fail\n",

@@ -XXX,XX +XXX,XX @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)

    hclge_init_rxd_adv_layout(hdev);

-    /* Enable MISC vector(vector0) */

-    hclge_enable_vector(&hdev->misc_vector, true);

-

    ret = hclge_init_wol(hdev);

    if (ret)

        dev_warn(&pdev->dev,

@@ -XXX,XX +XXX,XX @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)

    hclge_state_init(hdev);

    hdev->last_reset_time = jiffies;

+    /* Enable MISC vector(vector0) */

+    enable_irq(hdev->misc_vector.vector_irq);

+    hclge_enable_vector(&hdev->misc_vector, true);

+

    dev_info(&hdev->pdev->dev, "%s driver initialization finished.\n",

         HCLGE_DRIVER_NAME);

@@ -XXX,XX +XXX,XX @@ static void hclge_uninit_ae_dev(struct hnae3_ae_dev *ae_dev)

    /* Disable MISC vector(vector0) */

    hclge_enable_vector(&hdev->misc_vector, false);

-    synchronize_irq(hdev->misc_vector.vector_irq);

+    disable_irq(hdev->misc_vector.vector_irq);

    /* Disable all hw interrupts */

    hclge_config_mac_tnl_int(hdev, false);

Currently the misc irq is initialized before reset_timer setup. But

it will access the reset_timer in the irq handler. So initialize

the reset_timer earlier.

Fixes: ff200099d271 ("net: hns3: remove unnecessary work in hclgevf_main")

ChangeLog:

v2 RESEND -> v3:

- Add one comment, suggested by Michal Swiatkowski.

v2 RESEND: https://lore.kernel.org/all/20241217010839.1742227-1-shaojijie@huawei.com/

---

drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 3 ++-

1 file changed, 2 insertions(+), 1 deletion(-)

@@ -XXX,XX +XXX,XX @@ static void hclgevf_state_init(struct hclgevf_dev *hdev)

    clear_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state);

    INIT_DELAYED_WORK(&hdev->service_task, hclgevf_service_task);

+    /* timer needs to be initialized before misc irq */

+    timer_setup(&hdev->reset_timer, hclgevf_reset_timer, 0);

    mutex_init(&hdev->mbx_resp.mbx_mutex);

    sema_init(&hdev->reset_sem, 1);

         HCLGEVF_DRIVER_NAME);

    hclgevf_task_schedule(hdev, round_jiffies_relative(HZ));

-    timer_setup(&hdev->reset_timer, hclgevf_reset_timer, 0);

    return 0;

The TQP BAR space is divided into two segments. TQPs 0-1023 and TQPs

1024-1279 are in different BAR space addresses. However,

hclge_fetch_pf_reg does not distinguish the tqp space information when

reading the tqp space information. When the number of TQPs is greater

than 1024, access bar space overwriting occurs.

The problem of different segments has been considered during the

initialization of tqp.io_base. Therefore, tqp.io_base is directly used

when the queue is read in hclge_fetch_pf_reg.

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_regs.c | 9 +++++----

.../net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c | 9 +++++----

2 files changed, 10 insertions(+), 8 deletions(-)

    reg_um = ARRAY_SIZE(ring_reg_addr_list);

        reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_RING, reg_um, reg);

+        tqp = &hdev->htqp[j].q;

        for (i = 0; i < reg_um; i++)

-            *reg++ = hclgevf_read_dev(&hdev->hw,

-                         ring_reg_addr_list[i] +

-                         HCLGEVF_RING_REG_OFFSET * j);

+            *reg++ = readl_relaxed(tqp->io_base -

+                     HCLGEVF_TQP_REG_OFFSET +

+                     ring_reg_addr_list[i]);

    reg_um = ARRAY_SIZE(tqp_intr_reg_addr_list);