Series comparison

-[PATCH net 0/3] There are some bugfix for the HNS3 ethernet driver
+[PATCH net 0/8] There are some bugfix for the HNS3 ethernet driver
 There are some bugfix for the HNS3 ethernet driver
-Hao Lan (1):
+Hao Lan (2):
-  net: hns3: fix spelling mistake "reg_um" -> "reg_num"
+  net: hns3: add new 200G link modes for hisilicon device
   net: hns3: Disable SerDes serial loopback for HiLink H60
 Jian Shen (1):
-  net: hns3: store rx VLAN tag offload state for VF
+  net: hns3: add checking for vf id of mailbox
 Jie Wang (1):
   net: hns3: fix port duplex configure error in IMP reset
 Jijie Shao (2):
   net: hns3: fix wrong judgment condition issue
   net: hns3: fix delete tc fail issue
 Peiyang Wang (1):
   net: hns3: fix reset timeout under full functions and queues
 Yonglong Liu (1):
-  net: hns3: fix a use of uninitialized variable problem
+  net: hns3: fix kernel crash when 1588 is received on HIP08 devices
- .../hisilicon/hns3/hns3pf/hclge_main.c        |  2 +-
+ drivers/net/ethernet/hisilicon/hns3/hnae3.h   |  2 +
- .../hisilicon/hns3/hns3vf/hclgevf_main.c      | 25 ++++++++++++-----
+ .../hns3/hns3_common/hclge_comm_cmd.c         |  2 +-
- .../hisilicon/hns3/hns3vf/hclgevf_main.h      |  3 ++-
+ .../hns3/hns3_common/hclge_comm_cmd.h         |  2 +-
- .../hisilicon/hns3/hns3vf/hclgevf_regs.c      | 27 ++++++++++---------
+ .../net/ethernet/hisilicon/hns3/hns3_dcbnl.c  |  2 +-
-files changed, 36 insertions(+), 21 deletions(-)
+ .../ethernet/hisilicon/hns3/hns3_debugfs.c    |  2 +
  .../hisilicon/hns3/hns3pf/hclge_cmd.h         |  3 +-
  .../hisilicon/hns3/hns3pf/hclge_dcb.c         |  2 +
  .../hisilicon/hns3/hns3pf/hclge_main.c        | 44 +++++++++++++------
  .../hisilicon/hns3/hns3pf/hclge_main.h        | 11 ++++-
  .../hisilicon/hns3/hns3pf/hclge_mbx.c         |  7 +--
  .../hisilicon/hns3/hns3pf/hclge_ptp.c         |  2 +-
  .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 16 +++++++
  .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.h |  1 +
 files changed, 74 insertions(+), 22 deletions(-)
 --
-.33.0
+.30.0

-New patch
+[PATCH net 1/8] net: hns3: fix wrong judgment condition issue
+In hns3_dcbnl_ieee_delapp, should check ieee_delapp not ieee_setapp.
+This path fix the wrong judgment.
+Fixes: 0ba22bcb222d ("net: hns3: add support config dscp map to tc")
+Signed-off-by: Jijie Shao <shaojijie@huawei.com>
+---
+ drivers/net/ethernet/hisilicon/hns3/hns3_dcbnl.c | 2 +-
+file changed, 1 insertion(+), 1 deletion(-)
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_dcbnl.c b/drivers/net/ethernet/hisilicon/hns3/hns3_dcbnl.c
+index XXXXXXX..XXXXXXX 100644
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3_dcbnl.c
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3_dcbnl.c
+@@ -XXX,XX +XXX,XX @@ static int hns3_dcbnl_ieee_delapp(struct net_device *ndev, struct dcb_app *app)
+     if (hns3_nic_resetting(ndev))
+         return -EBUSY;
+-    if (h->kinfo.dcb_ops->ieee_setapp)
++    if (h->kinfo.dcb_ops->ieee_delapp)
+         return h->kinfo.dcb_ops->ieee_delapp(h, app);
+     return -EOPNOTSUPP;
+--
+.30.0

-New patch
+[PATCH net 2/8] net: hns3: add new 200G link modes for hisilicon device
+From: Hao Lan <lanhao@huawei.com>
+The hisilicon device now supports a new 200G link interface,
+which query from firmware in a new bit. Therefore,
+the HCLGE_SUPPORT_200G_R4_BIT capability bit has been added.
+The HCLGE_SUPPORT_200G_BIT has been renamed as
+HCLGE_SUPPORT_200G_R4_EXT_BIT, and the firmware has
+extended support for this mode.
+Fixes: ae6f010cb1a7 ("net: hns3: add support for 200G device")
+Signed-off-by: Hao Lan <lanhao@huawei.com>
+Signed-off-by: Jijie Shao <shaojijie@huawei.com>
+---
+ .../hisilicon/hns3/hns3pf/hclge_main.c        | 28 ++++++++++++-------
+ .../hisilicon/hns3/hns3pf/hclge_main.h        |  5 +++-
+files changed, 22 insertions(+), 11 deletions(-)
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+index XXXXXXX..XXXXXXX 100644
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+@@ -XXX,XX +XXX,XX @@ static const struct hclge_speed_bit_map speed_bit_map[] = {
+     {HCLGE_MAC_SPEED_40G, HCLGE_SUPPORT_40G_BIT},
+     {HCLGE_MAC_SPEED_50G, HCLGE_SUPPORT_50G_BITS},
+     {HCLGE_MAC_SPEED_100G, HCLGE_SUPPORT_100G_BITS},
+-    {HCLGE_MAC_SPEED_200G, HCLGE_SUPPORT_200G_BIT},
++    {HCLGE_MAC_SPEED_200G, HCLGE_SUPPORT_200G_BITS},
+ };
+ static int hclge_get_speed_bit(u32 speed, u32 *speed_bit)
+@@ -XXX,XX +XXX,XX @@ static void hclge_update_fec_support(struct hclge_mac *mac)
+                  mac->supported);
+ }
+-static const struct hclge_link_mode_bmap hclge_sr_link_mode_bmap[8] = {
++static const struct hclge_link_mode_bmap hclge_sr_link_mode_bmap[] = {
+     {HCLGE_SUPPORT_10G_BIT, ETHTOOL_LINK_MODE_10000baseSR_Full_BIT},
+     {HCLGE_SUPPORT_25G_BIT, ETHTOOL_LINK_MODE_25000baseSR_Full_BIT},
+     {HCLGE_SUPPORT_40G_BIT, ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT},
+@@ -XXX,XX +XXX,XX @@ static const struct hclge_link_mode_bmap hclge_sr_link_mode_bmap[8] = {
+     {HCLGE_SUPPORT_50G_R1_BIT, ETHTOOL_LINK_MODE_50000baseSR_Full_BIT},
+     {HCLGE_SUPPORT_100G_R4_BIT, ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT},
+     {HCLGE_SUPPORT_100G_R2_BIT, ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT},
+-    {HCLGE_SUPPORT_200G_BIT, ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT},
++    {HCLGE_SUPPORT_200G_R4_EXT_BIT,
++     ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT},
++    {HCLGE_SUPPORT_200G_R4_BIT, ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT},
+ };
+-static const struct hclge_link_mode_bmap hclge_lr_link_mode_bmap[6] = {
++static const struct hclge_link_mode_bmap hclge_lr_link_mode_bmap[] = {
+     {HCLGE_SUPPORT_10G_BIT, ETHTOOL_LINK_MODE_10000baseLR_Full_BIT},
+     {HCLGE_SUPPORT_40G_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT},
+     {HCLGE_SUPPORT_50G_R1_BIT, ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT},
+@@ -XXX,XX +XXX,XX @@ static const struct hclge_link_mode_bmap hclge_lr_link_mode_bmap[6] = {
+      ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT},
+     {HCLGE_SUPPORT_100G_R2_BIT,
+      ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT},
+-    {HCLGE_SUPPORT_200G_BIT,
++    {HCLGE_SUPPORT_200G_R4_EXT_BIT,
++     ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT},
++    {HCLGE_SUPPORT_200G_R4_BIT,
+      ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT},
+ };
+-static const struct hclge_link_mode_bmap hclge_cr_link_mode_bmap[8] = {
++static const struct hclge_link_mode_bmap hclge_cr_link_mode_bmap[] = {
+     {HCLGE_SUPPORT_10G_BIT, ETHTOOL_LINK_MODE_10000baseCR_Full_BIT},
+     {HCLGE_SUPPORT_25G_BIT, ETHTOOL_LINK_MODE_25000baseCR_Full_BIT},
+     {HCLGE_SUPPORT_40G_BIT, ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT},
+@@ -XXX,XX +XXX,XX @@ static const struct hclge_link_mode_bmap hclge_cr_link_mode_bmap[8] = {
+     {HCLGE_SUPPORT_50G_R1_BIT, ETHTOOL_LINK_MODE_50000baseCR_Full_BIT},
+     {HCLGE_SUPPORT_100G_R4_BIT, ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT},
+     {HCLGE_SUPPORT_100G_R2_BIT, ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT},
+-    {HCLGE_SUPPORT_200G_BIT, ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT},
++    {HCLGE_SUPPORT_200G_R4_EXT_BIT,
++     ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT},
++    {HCLGE_SUPPORT_200G_R4_BIT, ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT},
+ };
+-static const struct hclge_link_mode_bmap hclge_kr_link_mode_bmap[9] = {
++static const struct hclge_link_mode_bmap hclge_kr_link_mode_bmap[] = {
+     {HCLGE_SUPPORT_1G_BIT, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT},
+     {HCLGE_SUPPORT_10G_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
+     {HCLGE_SUPPORT_25G_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT},
+@@ -XXX,XX +XXX,XX @@ static const struct hclge_link_mode_bmap hclge_kr_link_mode_bmap[9] = {
+     {HCLGE_SUPPORT_50G_R1_BIT, ETHTOOL_LINK_MODE_50000baseKR_Full_BIT},
+     {HCLGE_SUPPORT_100G_R4_BIT, ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT},
+     {HCLGE_SUPPORT_100G_R2_BIT, ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT},
+-    {HCLGE_SUPPORT_200G_BIT, ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT},
++    {HCLGE_SUPPORT_200G_R4_EXT_BIT,
++     ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT},
++    {HCLGE_SUPPORT_200G_R4_BIT, ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT},
+ };
+ static void hclge_convert_setting_sr(u16 speed_ability,
+@@ -XXX,XX +XXX,XX @@ static void hclge_parse_link_mode(struct hclge_dev *hdev, u16 speed_ability)
+ static u32 hclge_get_max_speed(u16 speed_ability)
+ {
+-    if (speed_ability & HCLGE_SUPPORT_200G_BIT)
++    if (speed_ability & HCLGE_SUPPORT_200G_BITS)
+         return HCLGE_MAC_SPEED_200G;
+     if (speed_ability & HCLGE_SUPPORT_100G_BITS)
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
+index XXXXXXX..XXXXXXX 100644
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
+@@ -XXX,XX +XXX,XX @@ enum HLCGE_PORT_TYPE {
+ #define HCLGE_SUPPORT_40G_BIT        BIT(5)
+ #define HCLGE_SUPPORT_100M_BIT        BIT(6)
+ #define HCLGE_SUPPORT_10M_BIT        BIT(7)
+-#define HCLGE_SUPPORT_200G_BIT        BIT(8)
++#define HCLGE_SUPPORT_200G_R4_EXT_BIT    BIT(8)
+ #define HCLGE_SUPPORT_50G_R1_BIT    BIT(9)
+ #define HCLGE_SUPPORT_100G_R2_BIT    BIT(10)
++#define HCLGE_SUPPORT_200G_R4_BIT    BIT(11)
+ #define HCLGE_SUPPORT_GE \
+     (HCLGE_SUPPORT_1G_BIT | HCLGE_SUPPORT_100M_BIT | HCLGE_SUPPORT_10M_BIT)
+@@ -XXX,XX +XXX,XX @@ enum HLCGE_PORT_TYPE {
+     (HCLGE_SUPPORT_50G_R2_BIT | HCLGE_SUPPORT_50G_R1_BIT)
+ #define HCLGE_SUPPORT_100G_BITS \
+     (HCLGE_SUPPORT_100G_R4_BIT | HCLGE_SUPPORT_100G_R2_BIT)
++#define HCLGE_SUPPORT_200G_BITS \
++    (HCLGE_SUPPORT_200G_R4_EXT_BIT | HCLGE_SUPPORT_200G_R4_BIT)
+ enum HCLGE_DEV_STATE {
+     HCLGE_STATE_REINITING,
+--
+.30.0

-[PATCH net 2/3] net: hns3: fix spelling mistake "reg_um" -> "reg_num"
+[PATCH net 3/8] net: hns3: Disable SerDes serial loopback for HiLink H60
 From: Hao Lan <lanhao@huawei.com>
-There are spelling mistakes in hclgevf_get_regs. Fix them.
+When the hilink version is H60, the serdes serial loopback test is not
 supported. This patch add hilink version detection. When the version
 is H60, the serdes serial loopback test will be disable.
 Signed-off-by: Hao Lan <lanhao@huawei.com>
 Signed-off-by: Jijie Shao <shaojijie@huawei.com>
 ---
- .../hisilicon/hns3/hns3vf/hclgevf_regs.c      | 27 ++++++++++---------
+ drivers/net/ethernet/hisilicon/hns3/hnae3.h             | 1 +
-file changed, 14 insertions(+), 13 deletions(-)
+ drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c      | 2 ++
  drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h  | 3 ++-
  drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 9 +++++++--
  drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h | 6 ++++++
 files changed, 18 insertions(+), 3 deletions(-)
-diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
 index XXXXXXX..XXXXXXX 100644
---- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c
+--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
-+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c
++++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
-@@ -XXX,XX +XXX,XX @@ void hclgevf_get_regs(struct hnae3_handle *handle, u32 *version,
+@@ -XXX,XX +XXX,XX @@ struct hnae3_dev_specs {
+     u16 mc_mac_size;
-     struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
+     u32 mac_stats_num;
-     struct hnae3_queue *tqp;
+     u8 tnl_num;
--    int i, j, reg_um;
++    u8 hilink_version;
-+    int i, j, reg_num;
+ };
-     u32 *reg = data;
+ struct hnae3_client_ops {
-     *version = hdev->fw_version;
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
-     reg += hclgevf_reg_get_header(reg);
+index XXXXXXX..XXXXXXX 100644
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
-     /* fetching per-VF registers values from VF PCIe register space */
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
--    reg_um = ARRAY_SIZE(cmdq_reg_addr_list);
+@@ -XXX,XX +XXX,XX @@ hns3_dbg_dev_specs(struct hnae3_handle *h, char *buf, int len, int *pos)
--    reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_CMDQ, reg_um, reg);
+     *pos += scnprintf(buf + *pos, len - *pos,
--    for (i = 0; i < reg_um; i++)
+               "TX timeout threshold: %d seconds\n",
-+    reg_num = ARRAY_SIZE(cmdq_reg_addr_list);
+               dev->watchdog_timeo / HZ);
-+    reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_CMDQ, reg_num, reg);
++    *pos += scnprintf(buf + *pos, len - *pos, "Hilink Version: %u\n",
-+    for (i = 0; i < reg_num; i++)
++              dev_specs->hilink_version);
-         *reg++ = hclgevf_read_dev(&hdev->hw, cmdq_reg_addr_list[i]);
+ }
--    reg_um = ARRAY_SIZE(common_reg_addr_list);
+ static int hns3_dbg_dev_info(struct hnae3_handle *h, char *buf, int len)
--    reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_COMMON, reg_um, reg);
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
--    for (i = 0; i < reg_um; i++)
+index XXXXXXX..XXXXXXX 100644
-+    reg_num = ARRAY_SIZE(common_reg_addr_list);
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
-+    reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_COMMON, reg_num, reg);
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
-+    for (i = 0; i < reg_num; i++)
+@@ -XXX,XX +XXX,XX @@ struct hclge_dev_specs_1_cmd {
-         *reg++ = hclgevf_read_dev(&hdev->hw, common_reg_addr_list[i]);
+     __le16 mc_mac_size;
+     u8 rsv1[6];
--    reg_um = ARRAY_SIZE(ring_reg_addr_list);
+     u8 tnl_num;
-+    reg_num = ARRAY_SIZE(ring_reg_addr_list);
+-    u8 rsv2[5];
-     for (j = 0; j < hdev->num_tqps; j++) {
++    u8 hilink_version;
--        reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_RING, reg_um, reg);
++    u8 rsv2[4];
-+        reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_RING, reg_num, reg);
+ };
-         tqp = &hdev->htqp[j].q;
--        for (i = 0; i < reg_um; i++)
+ /* mac speed type defined in firmware command */
-+        for (i = 0; i < reg_num; i++)
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
-             *reg++ = readl_relaxed(tqp->io_base -
+index XXXXXXX..XXXXXXX 100644
-                            HCLGEVF_TQP_REG_OFFSET +
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
-                            ring_reg_addr_list[i]);
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
-     }
+@@ -XXX,XX +XXX,XX @@ static int hclge_get_sset_count(struct hnae3_handle *handle, int stringset)
+             handle->flags |= HNAE3_SUPPORT_APP_LOOPBACK;
--    reg_um = ARRAY_SIZE(tqp_intr_reg_addr_list);
+         }
-+    reg_num = ARRAY_SIZE(tqp_intr_reg_addr_list);
-     for (j = 0; j < hdev->num_msi_used - 1; j++) {
+-        count += 1;
--        reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_TQP_INTR, reg_um, reg);
+-        handle->flags |= HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK;
--        for (i = 0; i < reg_um; i++)
++        if (hdev->ae_dev->dev_specs.hilink_version !=
-+        reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_TQP_INTR,
++            HCLGE_HILINK_H60) {
-+                       reg_num, reg);
++            count += 1;
-+        for (i = 0; i < reg_num; i++)
++            handle->flags |= HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK;
-             *reg++ = hclgevf_read_dev(&hdev->hw,
++        }
-                           tqp_intr_reg_addr_list[i] +
++
-                           HCLGEVF_RING_INT_REG_OFFSET * j);
+         count += 1;
          handle->flags |= HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK;
          count += 1;
@@ -XXX,XX +XXX,XX @@ static void hclge_parse_dev_specs(struct hclge_dev *hdev,
      ae_dev->dev_specs.umv_size = le16_to_cpu(req1->umv_size);
      ae_dev->dev_specs.mc_mac_size = le16_to_cpu(req1->mc_mac_size);
      ae_dev->dev_specs.tnl_num = req1->tnl_num;
 +    ae_dev->dev_specs.hilink_version = req1->hilink_version;
  }
  static void hclge_check_dev_specs(struct hclge_dev *hdev)
 diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
 index XXXXXXX..XXXXXXX 100644
 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
 +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
@@ -XXX,XX +XXX,XX @@ enum HCLGE_MAC_DUPLEX {
      HCLGE_MAC_FULL
  };
 +/* hilink version */
 +enum hclge_hilink_version {
 +    HCLGE_HILINK_H32 = 0,
 +    HCLGE_HILINK_H60 = 1,
 +};
 +
  #define QUERY_SFP_SPEED        0
  #define QUERY_ACTIVE_SPEED    1
 --
-.33.0
+.30.0

-New patch
+[PATCH net 4/8] net: hns3: fix kernel crash when 1588 is received on HIP08 devices
+From: Yonglong Liu <liuyonglong@huawei.com>
+The HIP08 devices does not register the ptp devices, so the
+hdev->ptp is NULL, but the hardware can receive 1588 messages,
+and set the HNS3_RXD_TS_VLD_B bit, so, if match this case, the
+access of hdev->ptp->flags will cause a kernel crash:
+[ 5888.946472] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000018
+[ 5888.946475] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000018
+...
+[ 5889.266118] pc : hclge_ptp_get_rx_hwts+0x40/0x170 [hclge]
+[ 5889.272612] lr : hclge_ptp_get_rx_hwts+0x34/0x170 [hclge]
+[ 5889.279101] sp : ffff800012c3bc50
+[ 5889.283516] x29: ffff800012c3bc50 x28: ffff2040002be040
+[ 5889.289927] x27: ffff800009116484 x26: 0000000080007500
+[ 5889.296333] x25: 0000000000000000 x24: ffff204001c6f000
+[ 5889.302738] x23: ffff204144f53c00 x22: 0000000000000000
+[ 5889.309134] x21: 0000000000000000 x20: ffff204004220080
+[ 5889.315520] x19: ffff204144f53c00 x18: 0000000000000000
+[ 5889.321897] x17: 0000000000000000 x16: 0000000000000000
+[ 5889.328263] x15: 0000004000140ec8 x14: 0000000000000000
+[ 5889.334617] x13: 0000000000000000 x12: 00000000010011df
+[ 5889.340965] x11: bbfeff4d22000000 x10: 0000000000000000
+[ 5889.347303] x9 : ffff800009402124 x8 : 0200f78811dfbb4d
+[ 5889.353637] x7 : 2200000000191b01 x6 : ffff208002a7d480
+[ 5889.359959] x5 : 0000000000000000 x4 : 0000000000000000
+[ 5889.366271] x3 : 0000000000000000 x2 : 0000000000000000
+[ 5889.372567] x1 : 0000000000000000 x0 : ffff20400095c080
+[ 5889.378857] Call trace:
+[ 5889.382285] hclge_ptp_get_rx_hwts+0x40/0x170 [hclge]
+[ 5889.388304] hns3_handle_bdinfo+0x324/0x410 [hns3]
+[ 5889.394055] hns3_handle_rx_bd+0x60/0x150 [hns3]
+[ 5889.399624] hns3_clean_rx_ring+0x84/0x170 [hns3]
+[ 5889.405270] hns3_nic_common_poll+0xa8/0x220 [hns3]
+[ 5889.411084] napi_poll+0xcc/0x264
+[ 5889.415329] net_rx_action+0xd4/0x21c
+[ 5889.419911] __do_softirq+0x130/0x358
+[ 5889.424484] irq_exit+0x134/0x154
+[ 5889.428700] __handle_domain_irq+0x88/0xf0
+[ 5889.433684] gic_handle_irq+0x78/0x2c0
+[ 5889.438319] el1_irq+0xb8/0x140
+[ 5889.442354] arch_cpu_idle+0x18/0x40
+[ 5889.446816] default_idle_call+0x5c/0x1c0
+[ 5889.451714] cpuidle_idle_call+0x174/0x1b0
+[ 5889.456692] do_idle+0xc8/0x160
+[ 5889.460717] cpu_startup_entry+0x30/0xfc
+[ 5889.465523] secondary_start_kernel+0x158/0x1ec
+[ 5889.470936] Code: 97ffab78 f9411c14 91408294 f9457284 (f9400c80)
+[ 5889.477950] SMP: stopping secondary CPUs
+[ 5890.514626] SMP: failed to stop secondary CPUs 0-69,71-95
+[ 5890.522951] Starting crashdump kernel...
+Fixes: 0bf5eb788512 ("net: hns3: add support for PTP")
+Signed-off-by: Yonglong Liu <liuyonglong@huawei.com>
+Signed-off-by: Jijie Shao <shaojijie@huawei.com>
+---
+ drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c | 2 +-
+file changed, 1 insertion(+), 1 deletion(-)
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
+index XXXXXXX..XXXXXXX 100644
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
+@@ -XXX,XX +XXX,XX @@ void hclge_ptp_get_rx_hwts(struct hnae3_handle *handle, struct sk_buff *skb,
+     u64 ns = nsec;
+     u32 sec_h;
+-    if (!test_bit(HCLGE_PTP_FLAG_RX_EN, &hdev->ptp->flags))
++    if (!hdev->ptp || !test_bit(HCLGE_PTP_FLAG_RX_EN, &hdev->ptp->flags))
+         return;
+     /* Since the BD does not have enough space for the higher 16 bits of
+--
+.30.0

-New patch
+[PATCH net 5/8] net: hns3: fix delete tc fail issue
+When the tc is removed during reset, hns3 driver will return a errcode.
+But kernel ignores this errcode, As a result,
+the driver status is inconsistent with the kernel status.
+This patch retains the deletion status when the deletion fails
+and continues to delete after the reset to ensure that
+the status of the driver is consistent with that of kernel.
+Signed-off-by: Jijie Shao <shaojijie@huawei.com>
+---
+ drivers/net/ethernet/hisilicon/hns3/hnae3.h      |  1 +
+ .../ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c   |  2 ++
+ .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c  |  2 ++
+ .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.c    | 16 ++++++++++++++++
+ .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.h    |  1 +
+files changed, 22 insertions(+)
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+index XXXXXXX..XXXXXXX 100644
+--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
++++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+@@ -XXX,XX +XXX,XX @@ struct hnae3_tc_info {
+     u8 max_tc; /* Total number of TCs */
+     u8 num_tc; /* Total number of enabled TCs */
+     bool mqprio_active;
++    bool mqprio_destroy;
+     bool dcb_ets_active;
+ };
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c
+index XXXXXXX..XXXXXXX 100644
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c
+@@ -XXX,XX +XXX,XX @@ static int hclge_setup_tc(struct hnae3_handle *h,
+         return ret;
+     }
++    kinfo->tc_info.mqprio_destroy = !tc;
++
+     ret = hclge_notify_down_uinit(hdev);
+     if (ret)
+         return ret;
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+index XXXXXXX..XXXXXXX 100644
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+@@ -XXX,XX +XXX,XX @@ static int hclge_reset_ae_dev(struct hnae3_ae_dev *ae_dev)
+         return ret;
+     }
++    hclge_reset_tc_config(hdev);
++
+     ret = hclge_tm_init_hw(hdev, true);
+     if (ret) {
+         dev_err(&pdev->dev, "tm init hw fail, ret =%d\n", ret);
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
+index XXXXXXX..XXXXXXX 100644
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
+@@ -XXX,XX +XXX,XX @@ int hclge_tm_flush_cfg(struct hclge_dev *hdev, bool enable)
+     return ret;
+ }
++
++void hclge_reset_tc_config(struct hclge_dev *hdev)
++{
++    struct hclge_vport *vport = &hdev->vport[0];
++    struct hnae3_knic_private_info *kinfo;
++
++    kinfo = &vport->nic.kinfo;
++
++    if (!kinfo->tc_info.mqprio_destroy)
++        return;
++
++    /* clear tc info, including mqprio_destroy and mqprio_active */
++    memset(&kinfo->tc_info, 0, sizeof(kinfo->tc_info));
++    hclge_tm_schd_info_update(hdev, 0);
++    hclge_comm_rss_indir_init_cfg(hdev->ae_dev, &hdev->rss_cfg);
++}
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
+index XXXXXXX..XXXXXXX 100644
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
+@@ -XXX,XX +XXX,XX @@ int hclge_tm_get_port_shaper(struct hclge_dev *hdev,
+ int hclge_up_to_tc_map(struct hclge_dev *hdev);
+ int hclge_dscp_to_tc_map(struct hclge_dev *hdev);
+ int hclge_tm_flush_cfg(struct hclge_dev *hdev, bool enable);
++void hclge_reset_tc_config(struct hclge_dev *hdev);
+ #endif
+--
+.30.0

-New patch
+[PATCH net 6/8] net: hns3: fix reset timeout under full functions and queues
+From: Peiyang Wang <wangpeiyang1@huawei.com>
+The cmdq reset command times out when all VFs are enabled and the queue is
+full. The hardware processing time exceeds the timeout set by the driver.
+In order to avoid the above extreme situations, the driver extends the
+reset timeout to 1 second.
+Signed-off-by: Peiyang Wang <wangpeiyang1@huawei.com>
+Signed-off-by: Jijie Shao <shaojijie@huawei.com>
+---
+ .../net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c    | 2 +-
+ .../net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h    | 2 +-
+files changed, 2 insertions(+), 2 deletions(-)
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c
+index XXXXXXX..XXXXXXX 100644
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c
+@@ -XXX,XX +XXX,XX @@ static int hclge_comm_cmd_csq_done(struct hclge_comm_hw *hw)
+ static u32 hclge_get_cmdq_tx_timeout(u16 opcode, u32 tx_timeout)
+ {
+     static const struct hclge_cmdq_tx_timeout_map cmdq_tx_timeout_map[] = {
+-        {HCLGE_OPC_CFG_RST_TRIGGER, HCLGE_COMM_CMDQ_TX_TIMEOUT_500MS},
++        {HCLGE_OPC_CFG_RST_TRIGGER, HCLGE_COMM_CMDQ_CFG_RST_TIMEOUT},
+     };
+     u32 i;
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h
+index XXXXXXX..XXXXXXX 100644
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h
+@@ -XXX,XX +XXX,XX @@
+ #define HCLGE_COMM_NIC_CMQ_DESC_NUM_S        3
+ #define HCLGE_COMM_NIC_CMQ_DESC_NUM        1024
+ #define HCLGE_COMM_CMDQ_TX_TIMEOUT_DEFAULT    30000
+-#define HCLGE_COMM_CMDQ_TX_TIMEOUT_500MS    500000
++#define HCLGE_COMM_CMDQ_CFG_RST_TIMEOUT        1000000
+ enum hclge_opcode_type {
+     /* Generic commands */
+--
+.30.0

-[PATCH net 1/3] net: hns3: fix a use of uninitialized variable problem
+[PATCH net 7/8] net: hns3: fix port duplex configure error in IMP reset
-From: Yonglong Liu <liuyonglong@huawei.com>
+From: Jie Wang <wangjie125@huawei.com>
-In hclge_add_fd_entry(), if the flow type is FLOW_EXT, and the data of
+Currently, the mac port is fixed to configured as full dplex mode in
-m_ext is all zero, then some members of the local variable "info" are
+hclge_mac_init() when driver initialization or reset restore. Users may
-not initialized.
+change the mode to half duplex with ethtool,  so it may cause the user
 configuration dropped after reset.
-Fixes: 67b0e1428e2f ("net: hns3: add support for user-def data of flow director")
+To fix it, don't change the duplex mode when resetting.
-Signed-off-by: Yonglong Liu <liuyonglong@huawei.com>
 Fixes: 2d03eacc0b7e ("net: hns3: Only update mac configuation when necessary")
 Signed-off-by: Jie Wang <wangjie125@huawei.com>
 Signed-off-by: Jijie Shao <shaojijie@huawei.com>
 ---
- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 2 +-
+ drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 5 ++++-
-file changed, 1 insertion(+), 1 deletion(-)
+file changed, 4 insertions(+), 1 deletion(-)
 diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
 index XXXXXXX..XXXXXXX 100644
 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
 +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
-@@ -XXX,XX +XXX,XX @@ static int hclge_add_fd_entry(struct hnae3_handle *handle,
+@@ -XXX,XX +XXX,XX @@ static int hclge_mac_init(struct hclge_dev *hdev)
-                   struct ethtool_rxnfc *cmd)
+     int ret;
- {
-     struct hclge_vport *vport = hclge_get_vport(handle);
+     hdev->support_sfp_query = true;
-+    struct hclge_fd_user_def_info info = {0};
+-    hdev->hw.mac.duplex = HCLGE_MAC_FULL;
-     struct hclge_dev *hdev = vport->back;
++
--    struct hclge_fd_user_def_info info;
++    if (!test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state))
-     u16 dst_vport_id = 0, q_index = 0;
++        hdev->hw.mac.duplex = HCLGE_MAC_FULL;
-     struct ethtool_rx_flow_spec *fs;
++
-     struct hclge_fd_rule *rule;
+     ret = hclge_cfg_mac_speed_dup_hw(hdev, hdev->hw.mac.speed,
                       hdev->hw.mac.duplex, hdev->hw.mac.lane_num);
      if (ret)
 --
-.33.0
+.30.0

-[PATCH net 3/3] net: hns3: store rx VLAN tag offload state for VF
+[PATCH net 8/8] net: hns3: add checking for vf id of mailbox
 From: Jian Shen <shenjian15@huawei.com>
-The VF driver missed to store the rx VLAN tag strip state when
+Add checking for vf id of mailbox, in order to avoid array
-user change the rx VLAN tag offload state. And it will default
+out-of-bounds risk.
 to enable the rx vlan tag strip when re-init VF device after
 reset. So if user disable rx VLAN tag offload, and trig reset,
 then the HW will still strip the VLAN tag from packet nad fill
 into RX BD, but the VF driver will ignore it for rx VLAN tag
 offload disabled. It may cause the rx VLAN tag dropped.
-Fixes: b2641e2ad456 ("net: hns3: Add support of hardware rx-vlan-offload to HNS3 VF driver")
 Signed-off-by: Jian Shen <shenjian15@huawei.com>
 Signed-off-by: Jijie Shao <shaojijie@huawei.com>
 ---
- .../hisilicon/hns3/hns3vf/hclgevf_main.c      | 25 ++++++++++++++-----
+ drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c | 7 ++++---
- .../hisilicon/hns3/hns3vf/hclgevf_main.h      |  3 ++-
+file changed, 4 insertions(+), 3 deletions(-)
 files changed, 21 insertions(+), 7 deletions(-)
-diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
+diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
 index XXXXXXX..XXXXXXX 100644
---- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
+--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
-+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
++++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
-@@ -XXX,XX +XXX,XX @@ static void hclgevf_sync_vlan_filter(struct hclgevf_dev *hdev)
+@@ -XXX,XX +XXX,XX @@ void hclge_mbx_handler(struct hclge_dev *hdev)
-     rtnl_unlock();
+         req = (struct hclge_mbx_vf_to_pf_cmd *)desc->data;
- }
+         flag = le16_to_cpu(crq->desc[crq->next_to_use].flag);
--static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable)
+-        if (unlikely(!hnae3_get_bit(flag, HCLGE_CMDQ_RX_OUTVLD_B))) {
-+static int hclgevf_en_hw_strip_rxvtag_cmd(struct hclgevf_dev *hdev, bool enable)
++        if (unlikely(!hnae3_get_bit(flag, HCLGE_CMDQ_RX_OUTVLD_B) ||
- {
++                 req->mbx_src_vfid > hdev->num_req_vfs)) {
--    struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
+             dev_warn(&hdev->pdev->dev,
-     struct hclge_vf_to_pf_msg send_msg;
+-                 "dropped invalid mailbox message, code = %u\n",
+-                 req->msg.code);
-     hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN,
++                 "dropped invalid mailbox message, code = %u, vfid = %u\n",
-@@ -XXX,XX +XXX,XX @@ static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable)
++                 req->msg.code, req->mbx_src_vfid);
-     return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0);
- }
+             /* dropping/not processing this invalid message */
+             crq->desc[crq->next_to_use].flag = 0;
 +static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable)
 +{
 +    struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 +    int ret;
 +
 +    ret = hclgevf_en_hw_strip_rxvtag_cmd(hdev, enable);
 +    if (ret)
 +        return ret;
 +
 +    hdev->rxvtag_strip_en = enable;
 +    return 0;
 +}
 +
  static int hclgevf_reset_tqp(struct hnae3_handle *handle)
  {
  #define HCLGEVF_RESET_ALL_QUEUE_DONE    1U
@@ -XXX,XX +XXX,XX @@ static int hclgevf_rss_init_hw(struct hclgevf_dev *hdev)
                        tc_valid, tc_size);
  }
 -static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev)
 +static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev,
 +                    bool rxvtag_strip_en)
  {
      struct hnae3_handle *nic = &hdev->nic;
      int ret;
 -    ret = hclgevf_en_hw_strip_rxvtag(nic, true);
 +    ret = hclgevf_en_hw_strip_rxvtag(nic, rxvtag_strip_en);
      if (ret) {
          dev_err(&hdev->pdev->dev,
              "failed to enable rx vlan offload, ret = %d\n", ret);
@@ -XXX,XX +XXX,XX @@ static int hclgevf_reset_hdev(struct hclgevf_dev *hdev)
      if (ret)
          return ret;
 -    ret = hclgevf_init_vlan_config(hdev);
 +    ret = hclgevf_init_vlan_config(hdev, hdev->rxvtag_strip_en);
      if (ret) {
          dev_err(&hdev->pdev->dev,
              "failed(%d) to initialize VLAN config\n", ret);
@@ -XXX,XX +XXX,XX @@ static int hclgevf_init_hdev(struct hclgevf_dev *hdev)
          goto err_config;
      }
 -    ret = hclgevf_init_vlan_config(hdev);
 +    ret = hclgevf_init_vlan_config(hdev, true);
      if (ret) {
          dev_err(&hdev->pdev->dev,
              "failed(%d) to initialize VLAN config\n", ret);
 diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h
 index XXXXXXX..XXXXXXX 100644
 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h
 +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h
@@ -XXX,XX +XXX,XX @@ struct hclgevf_dev {
      u16 *vector_status;
      int *vector_irq;
 -    bool gro_en;
 +    u32 gro_en :1;
 +    u32 rxvtag_strip_en :1;
      unsigned long vlan_del_fail_bmap[BITS_TO_LONGS(VLAN_N_VID)];
 --
-.33.0
+.30.0

From: Yonglong Liu <liuyonglong@huawei.com>

In hclge_add_fd_entry(), if the flow type is FLOW_EXT, and the data of
m_ext is all zero, then some members of the local variable "info" are
not initialized.

Fixes: 67b0e1428e2f ("net: hns3: add support for user-def data of flow director")
Signed-off-by: Yonglong Liu <liuyonglong@huawei.com>
Signed-off-by: Jijie Shao <shaojijie@huawei.com>
---
 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

From: Hao Lan <lanhao@huawei.com>

There are spelling mistakes in hclgevf_get_regs. Fix them.

Signed-off-by: Hao Lan <lanhao@huawei.com>
Signed-off-by: Jijie Shao <shaojijie@huawei.com>
---
 .../hisilicon/hns3/hns3vf/hclgevf_regs.c      | 27 ++++++++++---------
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c
@@ -XXX,XX +XXX,XX @@ void hclgevf_get_regs(struct hnae3_handle *handle, u32 *version,
 
 	struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 	struct hnae3_queue *tqp;
-	int i, j, reg_um;
+	int i, j, reg_num;
 	u32 *reg = data;
 
 	*version = hdev->fw_version;
 	reg += hclgevf_reg_get_header(reg);
 
 	/* fetching per-VF registers values from VF PCIe register space */
-	reg_um = ARRAY_SIZE(cmdq_reg_addr_list);
-	reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_CMDQ, reg_um, reg);
-	for (i = 0; i < reg_um; i++)
+	reg_num = ARRAY_SIZE(cmdq_reg_addr_list);
+	reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_CMDQ, reg_num, reg);
+	for (i = 0; i < reg_num; i++)
 		*reg++ = hclgevf_read_dev(&hdev->hw, cmdq_reg_addr_list[i]);
 
-	reg_um = ARRAY_SIZE(common_reg_addr_list);
-	reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_COMMON, reg_um, reg);
-	for (i = 0; i < reg_um; i++)
+	reg_num = ARRAY_SIZE(common_reg_addr_list);
+	reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_COMMON, reg_num, reg);
+	for (i = 0; i < reg_num; i++)
 		*reg++ = hclgevf_read_dev(&hdev->hw, common_reg_addr_list[i]);
 
-	reg_um = ARRAY_SIZE(ring_reg_addr_list);
+	reg_num = ARRAY_SIZE(ring_reg_addr_list);
 	for (j = 0; j < hdev->num_tqps; j++) {
-		reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_RING, reg_um, reg);
+		reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_RING, reg_num, reg);
 		tqp = &hdev->htqp[j].q;
-		for (i = 0; i < reg_um; i++)
+		for (i = 0; i < reg_num; i++)
 			*reg++ = readl_relaxed(tqp->io_base -
 					       HCLGEVF_TQP_REG_OFFSET +
 					       ring_reg_addr_list[i]);
 	}
 
-	reg_um = ARRAY_SIZE(tqp_intr_reg_addr_list);
+	reg_num = ARRAY_SIZE(tqp_intr_reg_addr_list);
 	for (j = 0; j < hdev->num_msi_used - 1; j++) {
-		reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_TQP_INTR, reg_um, reg);
-		for (i = 0; i < reg_um; i++)
+		reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_TQP_INTR,
+					   reg_num, reg);
+		for (i = 0; i < reg_num; i++)
 			*reg++ = hclgevf_read_dev(&hdev->hw,
 						  tqp_intr_reg_addr_list[i] +
 						  HCLGEVF_RING_INT_REG_OFFSET * j);
-- 
2.33.0

From: Jian Shen <shenjian15@huawei.com>

The VF driver missed to store the rx VLAN tag strip state when
user change the rx VLAN tag offload state. And it will default
to enable the rx vlan tag strip when re-init VF device after
reset. So if user disable rx VLAN tag offload, and trig reset,
then the HW will still strip the VLAN tag from packet nad fill
into RX BD, but the VF driver will ignore it for rx VLAN tag
offload disabled. It may cause the rx VLAN tag dropped.

Fixes: b2641e2ad456 ("net: hns3: Add support of hardware rx-vlan-offload to HNS3 VF driver")
Signed-off-by: Jian Shen <shenjian15@huawei.com>
Signed-off-by: Jijie Shao <shaojijie@huawei.com>
---
 .../hisilicon/hns3/hns3vf/hclgevf_main.c      | 25 ++++++++++++++-----
 .../hisilicon/hns3/hns3vf/hclgevf_main.h      |  3 ++-
 2 files changed, 21 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
@@ -XXX,XX +XXX,XX @@ static void hclgevf_sync_vlan_filter(struct hclgevf_dev *hdev)
 	rtnl_unlock();
 }
 
-static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable)
+static int hclgevf_en_hw_strip_rxvtag_cmd(struct hclgevf_dev *hdev, bool enable)
 {
-	struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
 	struct hclge_vf_to_pf_msg send_msg;
 
 	hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN,
@@ -XXX,XX +XXX,XX @@ static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable)
 	return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0);
 }
 
+static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable)
+{
+	struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
+	int ret;
+
+	ret = hclgevf_en_hw_strip_rxvtag_cmd(hdev, enable);
+	if (ret)
+		return ret;
+
+	hdev->rxvtag_strip_en = enable;
+	return 0;
+}
+
 static int hclgevf_reset_tqp(struct hnae3_handle *handle)
 {
 #define HCLGEVF_RESET_ALL_QUEUE_DONE	1U
@@ -XXX,XX +XXX,XX @@ static int hclgevf_rss_init_hw(struct hclgevf_dev *hdev)
 					  tc_valid, tc_size);
 }
 
-static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev)
+static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev,
+				    bool rxvtag_strip_en)
 {
 	struct hnae3_handle *nic = &hdev->nic;
 	int ret;
 
-	ret = hclgevf_en_hw_strip_rxvtag(nic, true);
+	ret = hclgevf_en_hw_strip_rxvtag(nic, rxvtag_strip_en);
 	if (ret) {
 		dev_err(&hdev->pdev->dev,
 			"failed to enable rx vlan offload, ret = %d\n", ret);
@@ -XXX,XX +XXX,XX @@ static int hclgevf_reset_hdev(struct hclgevf_dev *hdev)
 	if (ret)
 		return ret;
 
-	ret = hclgevf_init_vlan_config(hdev);
+	ret = hclgevf_init_vlan_config(hdev, hdev->rxvtag_strip_en);
 	if (ret) {
 		dev_err(&hdev->pdev->dev,
 			"failed(%d) to initialize VLAN config\n", ret);
@@ -XXX,XX +XXX,XX @@ static int hclgevf_init_hdev(struct hclgevf_dev *hdev)
 		goto err_config;
 	}
 
-	ret = hclgevf_init_vlan_config(hdev);
+	ret = hclgevf_init_vlan_config(hdev, true);
 	if (ret) {
 		dev_err(&hdev->pdev->dev,
 			"failed(%d) to initialize VLAN config\n", ret);
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h
@@ -XXX,XX +XXX,XX @@ struct hclgevf_dev {
 	u16 *vector_status;
 	int *vector_irq;
 
-	bool gro_en;
+	u32 gro_en :1;
+	u32 rxvtag_strip_en :1;
 
 	unsigned long vlan_del_fail_bmap[BITS_TO_LONGS(VLAN_N_VID)];
 
-- 
2.33.0

There are some bugfix for the HNS3 ethernet driver

Hao Lan (2):
  net: hns3: add new 200G link modes for hisilicon device
  net: hns3: Disable SerDes serial loopback for HiLink H60

Jian Shen (1):
  net: hns3: add checking for vf id of mailbox

Jie Wang (1):
  net: hns3: fix port duplex configure error in IMP reset

Jijie Shao (2):
  net: hns3: fix wrong judgment condition issue
  net: hns3: fix delete tc fail issue

Peiyang Wang (1):
  net: hns3: fix reset timeout under full functions and queues

Yonglong Liu (1):
  net: hns3: fix kernel crash when 1588 is received on HIP08 devices

drivers/net/ethernet/hisilicon/hns3/hnae3.h   |  2 +
 .../hns3/hns3_common/hclge_comm_cmd.c         |  2 +-
 .../hns3/hns3_common/hclge_comm_cmd.h         |  2 +-
 .../net/ethernet/hisilicon/hns3/hns3_dcbnl.c  |  2 +-
 .../ethernet/hisilicon/hns3/hns3_debugfs.c    |  2 +
 .../hisilicon/hns3/hns3pf/hclge_cmd.h         |  3 +-
 .../hisilicon/hns3/hns3pf/hclge_dcb.c         |  2 +
 .../hisilicon/hns3/hns3pf/hclge_main.c        | 44 +++++++++++++------
 .../hisilicon/hns3/hns3pf/hclge_main.h        | 11 ++++-
 .../hisilicon/hns3/hns3pf/hclge_mbx.c         |  7 +--
 .../hisilicon/hns3/hns3pf/hclge_ptp.c         |  2 +-
 .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 16 +++++++
 .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.h |  1 +
 13 files changed, 74 insertions(+), 22 deletions(-)

-- 
2.30.0

From: Hao Lan <lanhao@huawei.com>

The hisilicon device now supports a new 200G link interface,
which query from firmware in a new bit. Therefore,
the HCLGE_SUPPORT_200G_R4_BIT capability bit has been added.
The HCLGE_SUPPORT_200G_BIT has been renamed as
HCLGE_SUPPORT_200G_R4_EXT_BIT, and the firmware has
extended support for this mode.

Fixes: ae6f010cb1a7 ("net: hns3: add support for 200G device")
Signed-off-by: Hao Lan <lanhao@huawei.com>
Signed-off-by: Jijie Shao <shaojijie@huawei.com>
---
 .../hisilicon/hns3/hns3pf/hclge_main.c        | 28 ++++++++++++-------
 .../hisilicon/hns3/hns3pf/hclge_main.h        |  5 +++-
 2 files changed, 22 insertions(+), 11 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -XXX,XX +XXX,XX @@ static const struct hclge_speed_bit_map speed_bit_map[] = {
 	{HCLGE_MAC_SPEED_40G, HCLGE_SUPPORT_40G_BIT},
 	{HCLGE_MAC_SPEED_50G, HCLGE_SUPPORT_50G_BITS},
 	{HCLGE_MAC_SPEED_100G, HCLGE_SUPPORT_100G_BITS},
-	{HCLGE_MAC_SPEED_200G, HCLGE_SUPPORT_200G_BIT},
+	{HCLGE_MAC_SPEED_200G, HCLGE_SUPPORT_200G_BITS},
 };
 
 static int hclge_get_speed_bit(u32 speed, u32 *speed_bit)
@@ -XXX,XX +XXX,XX @@ static void hclge_update_fec_support(struct hclge_mac *mac)
 				 mac->supported);
 }
 
-static const struct hclge_link_mode_bmap hclge_sr_link_mode_bmap[8] = {
+static const struct hclge_link_mode_bmap hclge_sr_link_mode_bmap[] = {
 	{HCLGE_SUPPORT_10G_BIT, ETHTOOL_LINK_MODE_10000baseSR_Full_BIT},
 	{HCLGE_SUPPORT_25G_BIT, ETHTOOL_LINK_MODE_25000baseSR_Full_BIT},
 	{HCLGE_SUPPORT_40G_BIT, ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT},
@@ -XXX,XX +XXX,XX @@ static const struct hclge_link_mode_bmap hclge_sr_link_mode_bmap[8] = {
 	{HCLGE_SUPPORT_50G_R1_BIT, ETHTOOL_LINK_MODE_50000baseSR_Full_BIT},
 	{HCLGE_SUPPORT_100G_R4_BIT, ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT},
 	{HCLGE_SUPPORT_100G_R2_BIT, ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT},
-	{HCLGE_SUPPORT_200G_BIT, ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT},
+	{HCLGE_SUPPORT_200G_R4_EXT_BIT,
+	 ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT},
+	{HCLGE_SUPPORT_200G_R4_BIT, ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT},
 };
 
-static const struct hclge_link_mode_bmap hclge_lr_link_mode_bmap[6] = {
+static const struct hclge_link_mode_bmap hclge_lr_link_mode_bmap[] = {
 	{HCLGE_SUPPORT_10G_BIT, ETHTOOL_LINK_MODE_10000baseLR_Full_BIT},
 	{HCLGE_SUPPORT_40G_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT},
 	{HCLGE_SUPPORT_50G_R1_BIT, ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT},
@@ -XXX,XX +XXX,XX @@ static const struct hclge_link_mode_bmap hclge_lr_link_mode_bmap[6] = {
 	 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT},
 	{HCLGE_SUPPORT_100G_R2_BIT,
 	 ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT},
-	{HCLGE_SUPPORT_200G_BIT,
+	{HCLGE_SUPPORT_200G_R4_EXT_BIT,
+	 ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT},
+	{HCLGE_SUPPORT_200G_R4_BIT,
 	 ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT},
 };
 
-static const struct hclge_link_mode_bmap hclge_cr_link_mode_bmap[8] = {
+static const struct hclge_link_mode_bmap hclge_cr_link_mode_bmap[] = {
 	{HCLGE_SUPPORT_10G_BIT, ETHTOOL_LINK_MODE_10000baseCR_Full_BIT},
 	{HCLGE_SUPPORT_25G_BIT, ETHTOOL_LINK_MODE_25000baseCR_Full_BIT},
 	{HCLGE_SUPPORT_40G_BIT, ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT},
@@ -XXX,XX +XXX,XX @@ static const struct hclge_link_mode_bmap hclge_cr_link_mode_bmap[8] = {
 	{HCLGE_SUPPORT_50G_R1_BIT, ETHTOOL_LINK_MODE_50000baseCR_Full_BIT},
 	{HCLGE_SUPPORT_100G_R4_BIT, ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT},
 	{HCLGE_SUPPORT_100G_R2_BIT, ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT},
-	{HCLGE_SUPPORT_200G_BIT, ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT},
+	{HCLGE_SUPPORT_200G_R4_EXT_BIT,
+	 ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT},
+	{HCLGE_SUPPORT_200G_R4_BIT, ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT},
 };
 
-static const struct hclge_link_mode_bmap hclge_kr_link_mode_bmap[9] = {
+static const struct hclge_link_mode_bmap hclge_kr_link_mode_bmap[] = {
 	{HCLGE_SUPPORT_1G_BIT, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT},
 	{HCLGE_SUPPORT_10G_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
 	{HCLGE_SUPPORT_25G_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT},
@@ -XXX,XX +XXX,XX @@ static const struct hclge_link_mode_bmap hclge_kr_link_mode_bmap[9] = {
 	{HCLGE_SUPPORT_50G_R1_BIT, ETHTOOL_LINK_MODE_50000baseKR_Full_BIT},
 	{HCLGE_SUPPORT_100G_R4_BIT, ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT},
 	{HCLGE_SUPPORT_100G_R2_BIT, ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT},
-	{HCLGE_SUPPORT_200G_BIT, ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT},
+	{HCLGE_SUPPORT_200G_R4_EXT_BIT,
+	 ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT},
+	{HCLGE_SUPPORT_200G_R4_BIT, ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT},
 };
 
 static void hclge_convert_setting_sr(u16 speed_ability,
@@ -XXX,XX +XXX,XX @@ static void hclge_parse_link_mode(struct hclge_dev *hdev, u16 speed_ability)
 
 static u32 hclge_get_max_speed(u16 speed_ability)
 {
-	if (speed_ability & HCLGE_SUPPORT_200G_BIT)
+	if (speed_ability & HCLGE_SUPPORT_200G_BITS)
 		return HCLGE_MAC_SPEED_200G;
 
 	if (speed_ability & HCLGE_SUPPORT_100G_BITS)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
@@ -XXX,XX +XXX,XX @@ enum HLCGE_PORT_TYPE {
 #define HCLGE_SUPPORT_40G_BIT		BIT(5)
 #define HCLGE_SUPPORT_100M_BIT		BIT(6)
 #define HCLGE_SUPPORT_10M_BIT		BIT(7)
-#define HCLGE_SUPPORT_200G_BIT		BIT(8)
+#define HCLGE_SUPPORT_200G_R4_EXT_BIT	BIT(8)
 #define HCLGE_SUPPORT_50G_R1_BIT	BIT(9)
 #define HCLGE_SUPPORT_100G_R2_BIT	BIT(10)
+#define HCLGE_SUPPORT_200G_R4_BIT	BIT(11)
 
 #define HCLGE_SUPPORT_GE \
 	(HCLGE_SUPPORT_1G_BIT | HCLGE_SUPPORT_100M_BIT | HCLGE_SUPPORT_10M_BIT)
@@ -XXX,XX +XXX,XX @@ enum HLCGE_PORT_TYPE {
 	(HCLGE_SUPPORT_50G_R2_BIT | HCLGE_SUPPORT_50G_R1_BIT)
 #define HCLGE_SUPPORT_100G_BITS \
 	(HCLGE_SUPPORT_100G_R4_BIT | HCLGE_SUPPORT_100G_R2_BIT)
+#define HCLGE_SUPPORT_200G_BITS \
+	(HCLGE_SUPPORT_200G_R4_EXT_BIT | HCLGE_SUPPORT_200G_R4_BIT)
 
 enum HCLGE_DEV_STATE {
 	HCLGE_STATE_REINITING,
-- 
2.30.0

From: Hao Lan <lanhao@huawei.com>

When the hilink version is H60, the serdes serial loopback test is not
supported. This patch add hilink version detection. When the version
is H60, the serdes serial loopback test will be disable.

Signed-off-by: Hao Lan <lanhao@huawei.com>
Signed-off-by: Jijie Shao <shaojijie@huawei.com>
---
 drivers/net/ethernet/hisilicon/hns3/hnae3.h             | 1 +
 drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c      | 2 ++
 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h  | 3 ++-
 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 9 +++++++--
 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h | 6 ++++++
 5 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
@@ -XXX,XX +XXX,XX @@ struct hnae3_dev_specs {
 	u16 mc_mac_size;
 	u32 mac_stats_num;
 	u8 tnl_num;
+	u8 hilink_version;
 };
 
 struct hnae3_client_ops {
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -XXX,XX +XXX,XX @@ hns3_dbg_dev_specs(struct hnae3_handle *h, char *buf, int len, int *pos)
 	*pos += scnprintf(buf + *pos, len - *pos,
 			  "TX timeout threshold: %d seconds\n",
 			  dev->watchdog_timeo / HZ);
+	*pos += scnprintf(buf + *pos, len - *pos, "Hilink Version: %u\n",
+			  dev_specs->hilink_version);
 }
 
 static int hns3_dbg_dev_info(struct hnae3_handle *h, char *buf, int len)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -XXX,XX +XXX,XX @@ struct hclge_dev_specs_1_cmd {
 	__le16 mc_mac_size;
 	u8 rsv1[6];
 	u8 tnl_num;
-	u8 rsv2[5];
+	u8 hilink_version;
+	u8 rsv2[4];
 };
 
 /* mac speed type defined in firmware command */
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -XXX,XX +XXX,XX @@ static int hclge_get_sset_count(struct hnae3_handle *handle, int stringset)
 			handle->flags |= HNAE3_SUPPORT_APP_LOOPBACK;
 		}
 
-		count += 1;
-		handle->flags |= HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK;
+		if (hdev->ae_dev->dev_specs.hilink_version !=
+		    HCLGE_HILINK_H60) {
+			count += 1;
+			handle->flags |= HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK;
+		}
+
 		count += 1;
 		handle->flags |= HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK;
 		count += 1;
@@ -XXX,XX +XXX,XX @@ static void hclge_parse_dev_specs(struct hclge_dev *hdev,
 	ae_dev->dev_specs.umv_size = le16_to_cpu(req1->umv_size);
 	ae_dev->dev_specs.mc_mac_size = le16_to_cpu(req1->mc_mac_size);
 	ae_dev->dev_specs.tnl_num = req1->tnl_num;
+	ae_dev->dev_specs.hilink_version = req1->hilink_version;
 }
 
 static void hclge_check_dev_specs(struct hclge_dev *hdev)
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
@@ -XXX,XX +XXX,XX @@ enum HCLGE_MAC_DUPLEX {
 	HCLGE_MAC_FULL
 };
 
+/* hilink version */
+enum hclge_hilink_version {
+	HCLGE_HILINK_H32 = 0,
+	HCLGE_HILINK_H60 = 1,
+};
+
 #define QUERY_SFP_SPEED		0
 #define QUERY_ACTIVE_SPEED	1
 
-- 
2.30.0

From: Yonglong Liu <liuyonglong@huawei.com>

The HIP08 devices does not register the ptp devices, so the
hdev->ptp is NULL, but the hardware can receive 1588 messages,
and set the HNS3_RXD_TS_VLD_B bit, so, if match this case, the
access of hdev->ptp->flags will cause a kernel crash:

[ 5888.946472] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000018
[ 5888.946475] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000018
...
[ 5889.266118] pc : hclge_ptp_get_rx_hwts+0x40/0x170 [hclge]
[ 5889.272612] lr : hclge_ptp_get_rx_hwts+0x34/0x170 [hclge]
[ 5889.279101] sp : ffff800012c3bc50
[ 5889.283516] x29: ffff800012c3bc50 x28: ffff2040002be040
[ 5889.289927] x27: ffff800009116484 x26: 0000000080007500
[ 5889.296333] x25: 0000000000000000 x24: ffff204001c6f000
[ 5889.302738] x23: ffff204144f53c00 x22: 0000000000000000
[ 5889.309134] x21: 0000000000000000 x20: ffff204004220080
[ 5889.315520] x19: ffff204144f53c00 x18: 0000000000000000
[ 5889.321897] x17: 0000000000000000 x16: 0000000000000000
[ 5889.328263] x15: 0000004000140ec8 x14: 0000000000000000
[ 5889.334617] x13: 0000000000000000 x12: 00000000010011df
[ 5889.340965] x11: bbfeff4d22000000 x10: 0000000000000000
[ 5889.347303] x9 : ffff800009402124 x8 : 0200f78811dfbb4d
[ 5889.353637] x7 : 2200000000191b01 x6 : ffff208002a7d480
[ 5889.359959] x5 : 0000000000000000 x4 : 0000000000000000
[ 5889.366271] x3 : 0000000000000000 x2 : 0000000000000000
[ 5889.372567] x1 : 0000000000000000 x0 : ffff20400095c080
[ 5889.378857] Call trace:
[ 5889.382285] hclge_ptp_get_rx_hwts+0x40/0x170 [hclge]
[ 5889.388304] hns3_handle_bdinfo+0x324/0x410 [hns3]
[ 5889.394055] hns3_handle_rx_bd+0x60/0x150 [hns3]
[ 5889.399624] hns3_clean_rx_ring+0x84/0x170 [hns3]
[ 5889.405270] hns3_nic_common_poll+0xa8/0x220 [hns3]
[ 5889.411084] napi_poll+0xcc/0x264
[ 5889.415329] net_rx_action+0xd4/0x21c
[ 5889.419911] __do_softirq+0x130/0x358
[ 5889.424484] irq_exit+0x134/0x154
[ 5889.428700] __handle_domain_irq+0x88/0xf0
[ 5889.433684] gic_handle_irq+0x78/0x2c0
[ 5889.438319] el1_irq+0xb8/0x140
[ 5889.442354] arch_cpu_idle+0x18/0x40
[ 5889.446816] default_idle_call+0x5c/0x1c0
[ 5889.451714] cpuidle_idle_call+0x174/0x1b0
[ 5889.456692] do_idle+0xc8/0x160
[ 5889.460717] cpu_startup_entry+0x30/0xfc
[ 5889.465523] secondary_start_kernel+0x158/0x1ec
[ 5889.470936] Code: 97ffab78 f9411c14 91408294 f9457284 (f9400c80)
[ 5889.477950] SMP: stopping secondary CPUs
[ 5890.514626] SMP: failed to stop secondary CPUs 0-69,71-95
[ 5890.522951] Starting crashdump kernel...

Fixes: 0bf5eb788512 ("net: hns3: add support for PTP")
Signed-off-by: Yonglong Liu <liuyonglong@huawei.com>
Signed-off-by: Jijie Shao <shaojijie@huawei.com>
---
 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c
@@ -XXX,XX +XXX,XX @@ void hclge_ptp_get_rx_hwts(struct hnae3_handle *handle, struct sk_buff *skb,
 	u64 ns = nsec;
 	u32 sec_h;
 
-	if (!test_bit(HCLGE_PTP_FLAG_RX_EN, &hdev->ptp->flags))
+	if (!hdev->ptp || !test_bit(HCLGE_PTP_FLAG_RX_EN, &hdev->ptp->flags))
 		return;
 
 	/* Since the BD does not have enough space for the higher 16 bits of
-- 
2.30.0

When the tc is removed during reset, hns3 driver will return a errcode.
But kernel ignores this errcode, As a result,
the driver status is inconsistent with the kernel status.

This patch retains the deletion status when the deletion fails
and continues to delete after the reset to ensure that
the status of the driver is consistent with that of kernel.

Signed-off-by: Jijie Shao <shaojijie@huawei.com>
---
 drivers/net/ethernet/hisilicon/hns3/hnae3.h      |  1 +
 .../ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c   |  2 ++
 .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c  |  2 ++
 .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.c    | 16 ++++++++++++++++
 .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.h    |  1 +
 5 files changed, 22 insertions(+)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
@@ -XXX,XX +XXX,XX @@ struct hnae3_tc_info {
 	u8 max_tc; /* Total number of TCs */
 	u8 num_tc; /* Total number of enabled TCs */
 	bool mqprio_active;
+	bool mqprio_destroy;
 	bool dcb_ets_active;
 };
 
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c
@@ -XXX,XX +XXX,XX @@ static int hclge_setup_tc(struct hnae3_handle *h,
 		return ret;
 	}
 
+	kinfo->tc_info.mqprio_destroy = !tc;
+
 	ret = hclge_notify_down_uinit(hdev);
 	if (ret)
 		return ret;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -XXX,XX +XXX,XX @@ static int hclge_reset_ae_dev(struct hnae3_ae_dev *ae_dev)
 		return ret;
 	}
 
+	hclge_reset_tc_config(hdev);
+
 	ret = hclge_tm_init_hw(hdev, true);
 	if (ret) {
 		dev_err(&pdev->dev, "tm init hw fail, ret =%d\n", ret);
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
@@ -XXX,XX +XXX,XX @@ int hclge_tm_flush_cfg(struct hclge_dev *hdev, bool enable)
 
 	return ret;
 }
+
+void hclge_reset_tc_config(struct hclge_dev *hdev)
+{
+	struct hclge_vport *vport = &hdev->vport[0];
+	struct hnae3_knic_private_info *kinfo;
+
+	kinfo = &vport->nic.kinfo;
+
+	if (!kinfo->tc_info.mqprio_destroy)
+		return;
+
+	/* clear tc info, including mqprio_destroy and mqprio_active */
+	memset(&kinfo->tc_info, 0, sizeof(kinfo->tc_info));
+	hclge_tm_schd_info_update(hdev, 0);
+	hclge_comm_rss_indir_init_cfg(hdev->ae_dev, &hdev->rss_cfg);
+}
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
@@ -XXX,XX +XXX,XX @@ int hclge_tm_get_port_shaper(struct hclge_dev *hdev,
 int hclge_up_to_tc_map(struct hclge_dev *hdev);
 int hclge_dscp_to_tc_map(struct hclge_dev *hdev);
 int hclge_tm_flush_cfg(struct hclge_dev *hdev, bool enable);
+void hclge_reset_tc_config(struct hclge_dev *hdev);
 #endif
-- 
2.30.0

From: Peiyang Wang <wangpeiyang1@huawei.com>

The cmdq reset command times out when all VFs are enabled and the queue is
full. The hardware processing time exceeds the timeout set by the driver.
In order to avoid the above extreme situations, the driver extends the
reset timeout to 1 second.

Signed-off-by: Peiyang Wang <wangpeiyang1@huawei.com>
Signed-off-by: Jijie Shao <shaojijie@huawei.com>
---
 .../net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c    | 2 +-
 .../net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c
@@ -XXX,XX +XXX,XX @@ static int hclge_comm_cmd_csq_done(struct hclge_comm_hw *hw)
 static u32 hclge_get_cmdq_tx_timeout(u16 opcode, u32 tx_timeout)
 {
 	static const struct hclge_cmdq_tx_timeout_map cmdq_tx_timeout_map[] = {
-		{HCLGE_OPC_CFG_RST_TRIGGER, HCLGE_COMM_CMDQ_TX_TIMEOUT_500MS},
+		{HCLGE_OPC_CFG_RST_TRIGGER, HCLGE_COMM_CMDQ_CFG_RST_TIMEOUT},
 	};
 	u32 i;
 
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h
@@ -XXX,XX +XXX,XX @@
 #define HCLGE_COMM_NIC_CMQ_DESC_NUM_S		3
 #define HCLGE_COMM_NIC_CMQ_DESC_NUM		1024
 #define HCLGE_COMM_CMDQ_TX_TIMEOUT_DEFAULT	30000
-#define HCLGE_COMM_CMDQ_TX_TIMEOUT_500MS	500000
+#define HCLGE_COMM_CMDQ_CFG_RST_TIMEOUT		1000000
 
 enum hclge_opcode_type {
 	/* Generic commands */
-- 
2.30.0

From: Jie Wang <wangjie125@huawei.com>

Currently, the mac port is fixed to configured as full dplex mode in
hclge_mac_init() when driver initialization or reset restore. Users may
change the mode to half duplex with ethtool,  so it may cause the user
configuration dropped after reset.

To fix it, don't change the duplex mode when resetting.

Fixes: 2d03eacc0b7e ("net: hns3: Only update mac configuation when necessary")
Signed-off-by: Jie Wang <wangjie125@huawei.com>
Signed-off-by: Jijie Shao <shaojijie@huawei.com>
---
 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

From: Jian Shen <shenjian15@huawei.com>

Add checking for vf id of mailbox, in order to avoid array
out-of-bounds risk.

Signed-off-by: Jian Shen <shenjian15@huawei.com>
Signed-off-by: Jijie Shao <shaojijie@huawei.com>
---
 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
index XXXXXXX..XXXXXXX 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
@@ -XXX,XX +XXX,XX @@ void hclge_mbx_handler(struct hclge_dev *hdev)
 		req = (struct hclge_mbx_vf_to_pf_cmd *)desc->data;
 
 		flag = le16_to_cpu(crq->desc[crq->next_to_use].flag);
-		if (unlikely(!hnae3_get_bit(flag, HCLGE_CMDQ_RX_OUTVLD_B))) {
+		if (unlikely(!hnae3_get_bit(flag, HCLGE_CMDQ_RX_OUTVLD_B) ||
+			     req->mbx_src_vfid > hdev->num_req_vfs)) {
 			dev_warn(&hdev->pdev->dev,
-				 "dropped invalid mailbox message, code = %u\n",
-				 req->msg.code);
+				 "dropped invalid mailbox message, code = %u, vfid = %u\n",
+				 req->msg.code, req->mbx_src_vfid);
 
 			/* dropping/not processing this invalid message */
 			crq->desc[crq->next_to_use].flag = 0;
-- 
2.30.0