1 | There are some bugfix for the HNS3 ethernet driver | 1 | There are some bugfix for the HNS3 ethernet driver |
---|---|---|---|
2 | 2 | ||
3 | Hao Lan (1): | 3 | --- |
4 | net: hns3: fix spelling mistake "reg_um" -> "reg_num" | 4 | ChangeLog: |
5 | v1->v2: | ||
6 | add Fixes tag for bugfix patch suggested by Simon Horman | ||
7 | v1: https://lore.kernel.org/all/20230915095305.422328-1-shaojijie@huawei.com/ | ||
8 | --- | ||
9 | |||
10 | Jian Shen (1): | ||
11 | net: hns3: only enable unicast promisc when mac table full | ||
5 | 12 | ||
6 | Jian Shen (1): | 13 | Jie Wang (3): |
7 | net: hns3: store rx VLAN tag offload state for VF | 14 | net: hns3: add cmdq check for vf periodic service task |
15 | net: hns3: fix GRE checksum offload issue | ||
16 | net: hns3: add 5ms delay before clear firmware reset irq source | ||
8 | 17 | ||
9 | Yonglong Liu (1): | 18 | Jijie Shao (1): |
10 | net: hns3: fix a use of uninitialized variable problem | 19 | net: hns3: fix fail to delete tc flower rules during reset issue |
11 | 20 | ||
12 | .../hisilicon/hns3/hns3pf/hclge_main.c | 2 +- | 21 | drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 9 +++++++++ |
13 | .../hisilicon/hns3/hns3vf/hclgevf_main.c | 25 ++++++++++++----- | 22 | .../net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 13 ++++++++++++- |
14 | .../hisilicon/hns3/hns3vf/hclgevf_main.h | 3 ++- | 23 | .../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 3 ++- |
15 | .../hisilicon/hns3/hns3vf/hclgevf_regs.c | 27 ++++++++++--------- | 24 | 3 files changed, 23 insertions(+), 2 deletions(-) |
16 | 4 files changed, 36 insertions(+), 21 deletions(-) | ||
17 | 25 | ||
18 | -- | 26 | -- |
19 | 2.33.0 | 27 | 2.30.0 | diff view generated by jsdifflib |
1 | From: Jian Shen <shenjian15@huawei.com> | 1 | From: Jie Wang <wangjie125@huawei.com> |
---|---|---|---|
2 | 2 | ||
3 | The VF driver missed to store the rx VLAN tag strip state when | 3 | When the vf cmdq is disabled, there is no need to keep these task running. |
4 | user change the rx VLAN tag offload state. And it will default | 4 | So this patch skip these task when the cmdq is disabled. |
5 | to enable the rx vlan tag strip when re-init VF device after | ||
6 | reset. So if user disable rx VLAN tag offload, and trig reset, | ||
7 | then the HW will still strip the VLAN tag from packet nad fill | ||
8 | into RX BD, but the VF driver will ignore it for rx VLAN tag | ||
9 | offload disabled. It may cause the rx VLAN tag dropped. | ||
10 | 5 | ||
11 | Fixes: b2641e2ad456 ("net: hns3: Add support of hardware rx-vlan-offload to HNS3 VF driver") | 6 | Fixes: ff200099d271 ("net: hns3: remove unnecessary work in hclgevf_main") |
12 | Signed-off-by: Jian Shen <shenjian15@huawei.com> | 7 | Signed-off-by: Jie Wang <wangjie125@huawei.com> |
13 | Signed-off-by: Jijie Shao <shaojijie@huawei.com> | 8 | Signed-off-by: Jijie Shao <shaojijie@huawei.com> |
14 | --- | 9 | --- |
15 | .../hisilicon/hns3/hns3vf/hclgevf_main.c | 25 ++++++++++++++----- | 10 | drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 3 ++- |
16 | .../hisilicon/hns3/hns3vf/hclgevf_main.h | 3 ++- | 11 | 1 file changed, 2 insertions(+), 1 deletion(-) |
17 | 2 files changed, 21 insertions(+), 7 deletions(-) | ||
18 | 12 | ||
19 | diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 13 | diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c |
20 | index XXXXXXX..XXXXXXX 100644 | 14 | index XXXXXXX..XXXXXXX 100644 |
21 | --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 15 | --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c |
22 | +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 16 | +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c |
23 | @@ -XXX,XX +XXX,XX @@ static void hclgevf_sync_vlan_filter(struct hclgevf_dev *hdev) | 17 | @@ -XXX,XX +XXX,XX @@ static void hclgevf_periodic_service_task(struct hclgevf_dev *hdev) |
24 | rtnl_unlock(); | 18 | unsigned long delta = round_jiffies_relative(HZ); |
25 | } | 19 | struct hnae3_handle *handle = &hdev->nic; |
26 | 20 | ||
27 | -static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable) | 21 | - if (test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) |
28 | +static int hclgevf_en_hw_strip_rxvtag_cmd(struct hclgevf_dev *hdev, bool enable) | 22 | + if (test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state) || |
29 | { | 23 | + test_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state)) |
30 | - struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); | 24 | return; |
31 | struct hclge_vf_to_pf_msg send_msg; | 25 | |
32 | 26 | if (time_is_after_jiffies(hdev->last_serv_processed + HZ)) { | |
33 | hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN, | ||
34 | @@ -XXX,XX +XXX,XX @@ static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable) | ||
35 | return hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0); | ||
36 | } | ||
37 | |||
38 | +static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable) | ||
39 | +{ | ||
40 | + struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); | ||
41 | + int ret; | ||
42 | + | ||
43 | + ret = hclgevf_en_hw_strip_rxvtag_cmd(hdev, enable); | ||
44 | + if (ret) | ||
45 | + return ret; | ||
46 | + | ||
47 | + hdev->rxvtag_strip_en = enable; | ||
48 | + return 0; | ||
49 | +} | ||
50 | + | ||
51 | static int hclgevf_reset_tqp(struct hnae3_handle *handle) | ||
52 | { | ||
53 | #define HCLGEVF_RESET_ALL_QUEUE_DONE 1U | ||
54 | @@ -XXX,XX +XXX,XX @@ static int hclgevf_rss_init_hw(struct hclgevf_dev *hdev) | ||
55 | tc_valid, tc_size); | ||
56 | } | ||
57 | |||
58 | -static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev) | ||
59 | +static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev, | ||
60 | + bool rxvtag_strip_en) | ||
61 | { | ||
62 | struct hnae3_handle *nic = &hdev->nic; | ||
63 | int ret; | ||
64 | |||
65 | - ret = hclgevf_en_hw_strip_rxvtag(nic, true); | ||
66 | + ret = hclgevf_en_hw_strip_rxvtag(nic, rxvtag_strip_en); | ||
67 | if (ret) { | ||
68 | dev_err(&hdev->pdev->dev, | ||
69 | "failed to enable rx vlan offload, ret = %d\n", ret); | ||
70 | @@ -XXX,XX +XXX,XX @@ static int hclgevf_reset_hdev(struct hclgevf_dev *hdev) | ||
71 | if (ret) | ||
72 | return ret; | ||
73 | |||
74 | - ret = hclgevf_init_vlan_config(hdev); | ||
75 | + ret = hclgevf_init_vlan_config(hdev, hdev->rxvtag_strip_en); | ||
76 | if (ret) { | ||
77 | dev_err(&hdev->pdev->dev, | ||
78 | "failed(%d) to initialize VLAN config\n", ret); | ||
79 | @@ -XXX,XX +XXX,XX @@ static int hclgevf_init_hdev(struct hclgevf_dev *hdev) | ||
80 | goto err_config; | ||
81 | } | ||
82 | |||
83 | - ret = hclgevf_init_vlan_config(hdev); | ||
84 | + ret = hclgevf_init_vlan_config(hdev, true); | ||
85 | if (ret) { | ||
86 | dev_err(&hdev->pdev->dev, | ||
87 | "failed(%d) to initialize VLAN config\n", ret); | ||
88 | diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h | ||
89 | index XXXXXXX..XXXXXXX 100644 | ||
90 | --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h | ||
91 | +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h | ||
92 | @@ -XXX,XX +XXX,XX @@ struct hclgevf_dev { | ||
93 | u16 *vector_status; | ||
94 | int *vector_irq; | ||
95 | |||
96 | - bool gro_en; | ||
97 | + u32 gro_en :1; | ||
98 | + u32 rxvtag_strip_en :1; | ||
99 | |||
100 | unsigned long vlan_del_fail_bmap[BITS_TO_LONGS(VLAN_N_VID)]; | ||
101 | |||
102 | -- | 27 | -- |
103 | 2.33.0 | 28 | 2.30.0 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: Jie Wang <wangjie125@huawei.com> | ||
1 | 2 | ||
3 | The device_version V3 hardware can't offload the checksum for IP in GRE | ||
4 | packets, but can do it for NvGRE. So default to disable the checksum and | ||
5 | GSO offload for GRE, but keep the ability to enable it when only using | ||
6 | NvGRE. | ||
7 | |||
8 | Fixes: 76ad4f0ee747 ("net: hns3: Add support of HNS3 Ethernet Driver for hip08 SoC") | ||
9 | Signed-off-by: Jie Wang <wangjie125@huawei.com> | ||
10 | Signed-off-by: Jijie Shao <shaojijie@huawei.com> | ||
11 | --- | ||
12 | drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 9 +++++++++ | ||
13 | 1 file changed, 9 insertions(+) | ||
14 | |||
15 | diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | ||
16 | index XXXXXXX..XXXXXXX 100644 | ||
17 | --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | ||
18 | +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | ||
19 | @@ -XXX,XX +XXX,XX @@ static void hns3_set_default_feature(struct net_device *netdev) | ||
20 | NETIF_F_HW_TC); | ||
21 | |||
22 | netdev->hw_enc_features |= netdev->vlan_features | NETIF_F_TSO_MANGLEID; | ||
23 | + | ||
24 | + /* The device_version V3 hardware can't offload the checksum for IP in | ||
25 | + * GRE packets, but can do it for NvGRE. So default to disable the | ||
26 | + * checksum and GSO offload for GRE. | ||
27 | + */ | ||
28 | + if (ae_dev->dev_version > HNAE3_DEVICE_VERSION_V2) { | ||
29 | + netdev->features &= ~NETIF_F_GSO_GRE; | ||
30 | + netdev->features &= ~NETIF_F_GSO_GRE_CSUM; | ||
31 | + } | ||
32 | } | ||
33 | |||
34 | static int hns3_alloc_buffer(struct hns3_enet_ring *ring, | ||
35 | -- | ||
36 | 2.30.0 | diff view generated by jsdifflib |
1 | From: Yonglong Liu <liuyonglong@huawei.com> | 1 | From: Jian Shen <shenjian15@huawei.com> |
---|---|---|---|
2 | 2 | ||
3 | In hclge_add_fd_entry(), if the flow type is FLOW_EXT, and the data of | 3 | Currently, the driver will enable unicast promisc for the function |
4 | m_ext is all zero, then some members of the local variable "info" are | 4 | once configure mac address fail. It's unreasonable when the failure |
5 | not initialized. | 5 | is caused by using same mac address with other functions. So only |
6 | enable unicast promisc when mac table full. | ||
6 | 7 | ||
7 | Fixes: 67b0e1428e2f ("net: hns3: add support for user-def data of flow director") | 8 | Fixes: c631c696823c ("net: hns3: refactor the promisc mode setting") |
8 | Signed-off-by: Yonglong Liu <liuyonglong@huawei.com> | 9 | Signed-off-by: Jian Shen <shenjian15@huawei.com> |
9 | Signed-off-by: Jijie Shao <shaojijie@huawei.com> | 10 | Signed-off-by: Jijie Shao <shaojijie@huawei.com> |
10 | --- | 11 | --- |
11 | drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 2 +- | 12 | drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 2 +- |
12 | 1 file changed, 1 insertion(+), 1 deletion(-) | 13 | 1 file changed, 1 insertion(+), 1 deletion(-) |
13 | 14 | ||
14 | diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 15 | diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c |
15 | index XXXXXXX..XXXXXXX 100644 | 16 | index XXXXXXX..XXXXXXX 100644 |
16 | --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 17 | --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c |
17 | +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 18 | +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c |
18 | @@ -XXX,XX +XXX,XX @@ static int hclge_add_fd_entry(struct hnae3_handle *handle, | 19 | @@ -XXX,XX +XXX,XX @@ static void hclge_update_overflow_flags(struct hclge_vport *vport, |
19 | struct ethtool_rxnfc *cmd) | 20 | if (mac_type == HCLGE_MAC_ADDR_UC) { |
20 | { | 21 | if (is_all_added) |
21 | struct hclge_vport *vport = hclge_get_vport(handle); | 22 | vport->overflow_promisc_flags &= ~HNAE3_OVERFLOW_UPE; |
22 | + struct hclge_fd_user_def_info info = {0}; | 23 | - else |
23 | struct hclge_dev *hdev = vport->back; | 24 | + else if (hclge_is_umv_space_full(vport, true)) |
24 | - struct hclge_fd_user_def_info info; | 25 | vport->overflow_promisc_flags |= HNAE3_OVERFLOW_UPE; |
25 | u16 dst_vport_id = 0, q_index = 0; | 26 | } else { |
26 | struct ethtool_rx_flow_spec *fs; | 27 | if (is_all_added) |
27 | struct hclge_fd_rule *rule; | ||
28 | -- | 28 | -- |
29 | 2.33.0 | 29 | 2.30.0 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | Firmware does not respond driver commands during reset | ||
2 | Therefore, rule will fail to delete while the firmware is resetting | ||
1 | 3 | ||
4 | So, if failed to delete rule, set rule state to TO_DEL, | ||
5 | and the rule will be deleted when periodic task being scheduled. | ||
6 | |||
7 | Fixes: 0205ec041ec6 ("net: hns3: add support for hw tc offload of tc flower") | ||
8 | Signed-off-by: Jijie Shao <shaojijie@huawei.com> | ||
9 | --- | ||
10 | drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 6 ++++++ | ||
11 | 1 file changed, 6 insertions(+) | ||
12 | |||
13 | diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | ||
14 | index XXXXXXX..XXXXXXX 100644 | ||
15 | --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | ||
16 | +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | ||
17 | @@ -XXX,XX +XXX,XX @@ static int hclge_del_cls_flower(struct hnae3_handle *handle, | ||
18 | ret = hclge_fd_tcam_config(hdev, HCLGE_FD_STAGE_1, true, rule->location, | ||
19 | NULL, false); | ||
20 | if (ret) { | ||
21 | + /* if tcam config fail, set rule state to TO_DEL, | ||
22 | + * so the rule will be deleted when periodic | ||
23 | + * task being scheduled. | ||
24 | + */ | ||
25 | + hclge_update_fd_list(hdev, HCLGE_FD_TO_DEL, rule->location, NULL); | ||
26 | + set_bit(HCLGE_STATE_FD_TBL_CHANGED, &hdev->state); | ||
27 | spin_unlock_bh(&hdev->fd_rule_lock); | ||
28 | return ret; | ||
29 | } | ||
30 | -- | ||
31 | 2.30.0 | diff view generated by jsdifflib |
1 | From: Hao Lan <lanhao@huawei.com> | 1 | From: Jie Wang <wangjie125@huawei.com> |
---|---|---|---|
2 | 2 | ||
3 | There are spelling mistakes in hclgevf_get_regs. Fix them. | 3 | Currently the reset process in hns3 and firmware watchdog init process is |
4 | asynchronous. we think firmware watchdog initialization is completed | ||
5 | before hns3 clear the firmware interrupt source. However, firmware | ||
6 | initialization may not complete early. | ||
4 | 7 | ||
5 | Signed-off-by: Hao Lan <lanhao@huawei.com> | 8 | so we add delay before hns3 clear firmware interrupt source and 5 ms delay |
9 | is enough to avoid second firmware reset interrupt. | ||
10 | |||
11 | Fixes: c1a81619d73a ("net: hns3: Add mailbox interrupt handling to PF driver") | ||
12 | Signed-off-by: Jie Wang <wangjie125@huawei.com> | ||
6 | Signed-off-by: Jijie Shao <shaojijie@huawei.com> | 13 | Signed-off-by: Jijie Shao <shaojijie@huawei.com> |
7 | --- | 14 | --- |
8 | .../hisilicon/hns3/hns3vf/hclgevf_regs.c | 27 ++++++++++--------- | 15 | drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 5 +++++ |
9 | 1 file changed, 14 insertions(+), 13 deletions(-) | 16 | 1 file changed, 5 insertions(+) |
10 | 17 | ||
11 | diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c | 18 | diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c |
12 | index XXXXXXX..XXXXXXX 100644 | 19 | index XXXXXXX..XXXXXXX 100644 |
13 | --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c | 20 | --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c |
14 | +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c | 21 | +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c |
15 | @@ -XXX,XX +XXX,XX @@ void hclgevf_get_regs(struct hnae3_handle *handle, u32 *version, | 22 | @@ -XXX,XX +XXX,XX @@ static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval) |
16 | 23 | static void hclge_clear_event_cause(struct hclge_dev *hdev, u32 event_type, | |
17 | struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle); | 24 | u32 regclr) |
18 | struct hnae3_queue *tqp; | 25 | { |
19 | - int i, j, reg_um; | 26 | +#define HCLGE_IMP_RESET_DELAY 5 |
20 | + int i, j, reg_num; | 27 | + |
21 | u32 *reg = data; | 28 | switch (event_type) { |
22 | 29 | case HCLGE_VECTOR0_EVENT_PTP: | |
23 | *version = hdev->fw_version; | 30 | case HCLGE_VECTOR0_EVENT_RST: |
24 | reg += hclgevf_reg_get_header(reg); | 31 | + if (regclr == BIT(HCLGE_VECTOR0_IMPRESET_INT_B)) |
25 | 32 | + mdelay(HCLGE_IMP_RESET_DELAY); | |
26 | /* fetching per-VF registers values from VF PCIe register space */ | 33 | + |
27 | - reg_um = ARRAY_SIZE(cmdq_reg_addr_list); | 34 | hclge_write_dev(&hdev->hw, HCLGE_MISC_RESET_STS_REG, regclr); |
28 | - reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_CMDQ, reg_um, reg); | 35 | break; |
29 | - for (i = 0; i < reg_um; i++) | 36 | case HCLGE_VECTOR0_EVENT_MBX: |
30 | + reg_num = ARRAY_SIZE(cmdq_reg_addr_list); | ||
31 | + reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_CMDQ, reg_num, reg); | ||
32 | + for (i = 0; i < reg_num; i++) | ||
33 | *reg++ = hclgevf_read_dev(&hdev->hw, cmdq_reg_addr_list[i]); | ||
34 | |||
35 | - reg_um = ARRAY_SIZE(common_reg_addr_list); | ||
36 | - reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_COMMON, reg_um, reg); | ||
37 | - for (i = 0; i < reg_um; i++) | ||
38 | + reg_num = ARRAY_SIZE(common_reg_addr_list); | ||
39 | + reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_COMMON, reg_num, reg); | ||
40 | + for (i = 0; i < reg_num; i++) | ||
41 | *reg++ = hclgevf_read_dev(&hdev->hw, common_reg_addr_list[i]); | ||
42 | |||
43 | - reg_um = ARRAY_SIZE(ring_reg_addr_list); | ||
44 | + reg_num = ARRAY_SIZE(ring_reg_addr_list); | ||
45 | for (j = 0; j < hdev->num_tqps; j++) { | ||
46 | - reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_RING, reg_um, reg); | ||
47 | + reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_RING, reg_num, reg); | ||
48 | tqp = &hdev->htqp[j].q; | ||
49 | - for (i = 0; i < reg_um; i++) | ||
50 | + for (i = 0; i < reg_num; i++) | ||
51 | *reg++ = readl_relaxed(tqp->io_base - | ||
52 | HCLGEVF_TQP_REG_OFFSET + | ||
53 | ring_reg_addr_list[i]); | ||
54 | } | ||
55 | |||
56 | - reg_um = ARRAY_SIZE(tqp_intr_reg_addr_list); | ||
57 | + reg_num = ARRAY_SIZE(tqp_intr_reg_addr_list); | ||
58 | for (j = 0; j < hdev->num_msi_used - 1; j++) { | ||
59 | - reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_TQP_INTR, reg_um, reg); | ||
60 | - for (i = 0; i < reg_um; i++) | ||
61 | + reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_TQP_INTR, | ||
62 | + reg_num, reg); | ||
63 | + for (i = 0; i < reg_num; i++) | ||
64 | *reg++ = hclgevf_read_dev(&hdev->hw, | ||
65 | tqp_intr_reg_addr_list[i] + | ||
66 | HCLGEVF_RING_INT_REG_OFFSET * j); | ||
67 | -- | 37 | -- |
68 | 2.33.0 | 38 | 2.30.0 | diff view generated by jsdifflib |