| ... | ... | ||
|---|---|---|---|
| 3 | for spi and uart. And add DMA description for uart nodes. | 3 | for spi and uart. And add DMA description for uart nodes. |
| 4 | 4 | ||
| 5 | ~# dmesg | grep dma | 5 | ~# dmesg | grep dma |
| 6 | [ 0.103466] dma-pl330 ffd60000.dma-controller: Loaded driver for PL330 DMAC-241330 | 6 | [ 0.103466] dma-pl330 ffd60000.dma-controller: Loaded driver for PL330 DMAC-241330 |
| 7 | [ 0.104212] dma-pl330 ffd60000.dma-controller: DBUFF-128x8bytes Num_Chans-8 Num_Peri-32 Num_Events-16 | 7 | [ 0.104212] dma-pl330 ffd60000.dma-controller: DBUFF-128x8bytes Num_Chans-8 Num_Peri-32 Num_Events-16 |
| 8 | |||
| 9 | Changes in v2: | ||
| 10 | Adjust props order | ||
| 11 | Collect Reviewed-by | ||
| 8 | 12 | ||
| 9 | Chukun Pan (3): | 13 | Chukun Pan (3): |
| 10 | arm64: dts: rockchip: Add missing uart3 interrupt for RK3528 | 14 | arm64: dts: rockchip: Add missing uart3 interrupt for RK3528 |
| 11 | arm64: dts: rockchip: Add DMA controller for RK3528 | 15 | arm64: dts: rockchip: Add DMA controller for RK3528 |
| 12 | arm64: dts: rockchip: Add UART DMA support for RK3528 | 16 | arm64: dts: rockchip: Add UART DMA support for RK3528 |
| 13 | 17 | ||
| 14 | arch/arm64/boot/dts/rockchip/rk3528.dtsi | 29 +++++++++++++++++++++++- | 18 | arch/arm64/boot/dts/rockchip/rk3528.dtsi | 29 +++++++++++++++++++++++- |
| 15 | 1 file changed, 28 insertions(+), 1 deletion(-) | 19 | 1 file changed, 28 insertions(+), 1 deletion(-) |
| 16 | 20 | ||
| 17 | -- | 21 | -- |
| 18 | 2.25.1 | 22 | 2.25.1 | diff view generated by jsdifflib |
| 1 | The interrupt of uart3 node on rk3528 is missing, fix it. | 1 | The interrupt of uart3 node on rk3528 is missing, fix it. |
|---|---|---|---|
| 2 | 2 | ||
| 3 | Fixes: 7983e6c379a9 ("arm64: dts: rockchip: Add base DT for rk3528 SoC") | 3 | Fixes: 7983e6c379a9 ("arm64: dts: rockchip: Add base DT for rk3528 SoC") |
| 4 | Reviewed-by: Yao Zi <ziyao@disroot.org> | ||
| 4 | Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> | 5 | Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> |
| 5 | --- | 6 | --- |
| 6 | arch/arm64/boot/dts/rockchip/rk3528.dtsi | 3 ++- | 7 | arch/arm64/boot/dts/rockchip/rk3528.dtsi | 3 ++- |
| 7 | 1 file changed, 2 insertions(+), 1 deletion(-) | 8 | 1 file changed, 2 insertions(+), 1 deletion(-) |
| 8 | 9 | ||
| ... | ... | diff view generated by jsdifflib |
| ... | ... | ||
|---|---|---|---|
| 14 | }; | 14 | }; |
| 15 | 15 | ||
| 16 | + dmac: dma-controller@ffd60000 { | 16 | + dmac: dma-controller@ffd60000 { |
| 17 | + compatible = "arm,pl330", "arm,primecell"; | 17 | + compatible = "arm,pl330", "arm,primecell"; |
| 18 | + reg = <0x0 0xffd60000 0x0 0x4000>; | 18 | + reg = <0x0 0xffd60000 0x0 0x4000>; |
| 19 | + clocks = <&cru ACLK_DMAC>; | ||
| 20 | + clock-names = "apb_pclk"; | ||
| 19 | + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, | 21 | + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, |
| 20 | + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, | 22 | + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, |
| 21 | + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, | 23 | + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, |
| 22 | + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, | 24 | + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, |
| 23 | + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, | 25 | + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, |
| 24 | + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, | 26 | + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, |
| 25 | + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, | 27 | + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, |
| 26 | + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, | 28 | + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, |
| 27 | + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | 29 | + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; |
| 28 | + arm,pl330-periph-burst; | 30 | + arm,pl330-periph-burst; |
| 29 | + clocks = <&cru ACLK_DMAC>; | ||
| 30 | + clock-names = "apb_pclk"; | ||
| 31 | + #dma-cells = <1>; | 31 | + #dma-cells = <1>; |
| 32 | + }; | 32 | + }; |
| 33 | + | 33 | + |
| 34 | pinctrl: pinctrl { | 34 | pinctrl: pinctrl { |
| 35 | compatible = "rockchip,rk3528-pinctrl"; | 35 | compatible = "rockchip,rk3528-pinctrl"; |
| 36 | rockchip,grf = <&ioc_grf>; | 36 | rockchip,grf = <&ioc_grf>; |
| 37 | -- | 37 | -- |
| 38 | 2.25.1 | 38 | 2.25.1 | diff view generated by jsdifflib |
| 1 | The UART ports on RK3528 have DMA capability, describe it. | 1 | The UART ports on RK3528 have DMA capability, describe it. |
|---|---|---|---|
| 2 | Flow control is optional, so dma-names are not added. | 2 | Flow control is optional, so dma-names are not added. |
| 3 | 3 | ||
| 4 | Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> | 4 | Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> |
| 5 | --- | 5 | --- |
| 6 | arch/arm64/boot/dts/rockchip/rk3528.dtsi | 8 ++++++++ | 6 | arch/arm64/boot/dts/rockchip/rk3528.dtsi | 8 ++++++++ |
| 7 | 1 file changed, 8 insertions(+) | 7 | 1 file changed, 8 insertions(+) |
| 8 | 8 | ||
| 9 | diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi | 9 | diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi |
| 10 | index XXXXXXX..XXXXXXX 100644 | 10 | index XXXXXXX..XXXXXXX 100644 |
| 11 | --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi | 11 | --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi |
| 12 | +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi | 12 | +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi |
| 13 | @@ -XXX,XX +XXX,XX @@ uart0: serial@ff9f0000 { | 13 | @@ -XXX,XX +XXX,XX @@ uart0: serial@ff9f0000 { |
| 14 | clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; | 14 | clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; |
| 15 | clock-names = "baudclk", "apb_pclk"; | 15 | clock-names = "baudclk", "apb_pclk"; |
| 16 | interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; | 16 | interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; |
| 17 | + dmas = <&dmac 8>, <&dmac 9>; | 17 | + dmas = <&dmac 8>, <&dmac 9>; |
| 18 | reg-io-width = <4>; | 18 | reg-io-width = <4>; |
| 19 | reg-shift = <2>; | 19 | reg-shift = <2>; |
| 20 | status = "disabled"; | 20 | status = "disabled"; |
| 21 | @@ -XXX,XX +XXX,XX @@ uart1: serial@ff9f8000 { | 21 | @@ -XXX,XX +XXX,XX @@ uart1: serial@ff9f8000 { |
| 22 | clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; | 22 | clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; |
| 23 | clock-names = "baudclk", "apb_pclk"; | 23 | clock-names = "baudclk", "apb_pclk"; |
| 24 | interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; | 24 | interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; |
| 25 | + dmas = <&dmac 10>, <&dmac 11>; | 25 | + dmas = <&dmac 10>, <&dmac 11>; |
| 26 | reg-io-width = <4>; | 26 | reg-io-width = <4>; |
| 27 | reg-shift = <2>; | 27 | reg-shift = <2>; |
| 28 | status = "disabled"; | 28 | status = "disabled"; |
| 29 | @@ -XXX,XX +XXX,XX @@ uart2: serial@ffa00000 { | 29 | @@ -XXX,XX +XXX,XX @@ uart2: serial@ffa00000 { |
| 30 | clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; | 30 | clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; |
| 31 | clock-names = "baudclk", "apb_pclk"; | 31 | clock-names = "baudclk", "apb_pclk"; |
| 32 | interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; | 32 | interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; |
| 33 | + dmas = <&dmac 12>, <&dmac 13>; | 33 | + dmas = <&dmac 12>, <&dmac 13>; |
| 34 | reg-io-width = <4>; | 34 | reg-io-width = <4>; |
| 35 | reg-shift = <2>; | 35 | reg-shift = <2>; |
| 36 | status = "disabled"; | 36 | status = "disabled"; |
| 37 | @@ -XXX,XX +XXX,XX @@ uart3: serial@ffa08000 { | 37 | @@ -XXX,XX +XXX,XX @@ uart3: serial@ffa08000 { |
| 38 | clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; | 38 | clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; |
| 39 | clock-names = "baudclk", "apb_pclk"; | 39 | clock-names = "baudclk", "apb_pclk"; |
| 40 | interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; | 40 | interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; |
| 41 | + dmas = <&dmac 14>, <&dmac 15>; | 41 | + dmas = <&dmac 14>, <&dmac 15>; |
| 42 | reg-io-width = <4>; | 42 | reg-io-width = <4>; |
| 43 | reg-shift = <2>; | 43 | reg-shift = <2>; |
| 44 | status = "disabled"; | 44 | status = "disabled"; |
| 45 | @@ -XXX,XX +XXX,XX @@ uart4: serial@ffa10000 { | 45 | @@ -XXX,XX +XXX,XX @@ uart4: serial@ffa10000 { |
| 46 | clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; | 46 | clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; |
| 47 | clock-names = "baudclk", "apb_pclk"; | 47 | clock-names = "baudclk", "apb_pclk"; |
| 48 | interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; | 48 | interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; |
| 49 | + dmas = <&dmac 16>, <&dmac 17>; | 49 | + dmas = <&dmac 16>, <&dmac 17>; |
| 50 | reg-io-width = <4>; | 50 | reg-io-width = <4>; |
| 51 | reg-shift = <2>; | 51 | reg-shift = <2>; |
| 52 | status = "disabled"; | 52 | status = "disabled"; |
| 53 | @@ -XXX,XX +XXX,XX @@ uart5: serial@ffa18000 { | 53 | @@ -XXX,XX +XXX,XX @@ uart5: serial@ffa18000 { |
| 54 | clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>; | 54 | clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>; |
| 55 | clock-names = "baudclk", "apb_pclk"; | 55 | clock-names = "baudclk", "apb_pclk"; |
| 56 | interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; | 56 | interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; |
| 57 | + dmas = <&dmac 18>, <&dmac 19>; | 57 | + dmas = <&dmac 18>, <&dmac 19>; |
| 58 | reg-io-width = <4>; | 58 | reg-io-width = <4>; |
| 59 | reg-shift = <2>; | 59 | reg-shift = <2>; |
| 60 | status = "disabled"; | 60 | status = "disabled"; |
| 61 | @@ -XXX,XX +XXX,XX @@ uart6: serial@ffa20000 { | 61 | @@ -XXX,XX +XXX,XX @@ uart6: serial@ffa20000 { |
| 62 | clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>; | 62 | clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>; |
| 63 | clock-names = "baudclk", "apb_pclk"; | 63 | clock-names = "baudclk", "apb_pclk"; |
| 64 | interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; | 64 | interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; |
| 65 | + dmas = <&dmac 20>, <&dmac 21>; | 65 | + dmas = <&dmac 20>, <&dmac 21>; |
| 66 | reg-io-width = <4>; | 66 | reg-io-width = <4>; |
| 67 | reg-shift = <2>; | 67 | reg-shift = <2>; |
| 68 | status = "disabled"; | 68 | status = "disabled"; |
| 69 | @@ -XXX,XX +XXX,XX @@ uart7: serial@ffa28000 { | 69 | @@ -XXX,XX +XXX,XX @@ uart7: serial@ffa28000 { |
| 70 | clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>; | 70 | clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>; |
| 71 | clock-names = "baudclk", "apb_pclk"; | 71 | clock-names = "baudclk", "apb_pclk"; |
| 72 | interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; | 72 | interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; |
| 73 | + dmas = <&dmac 22>, <&dmac 23>; | 73 | + dmas = <&dmac 22>, <&dmac 23>; |
| 74 | reg-io-width = <4>; | 74 | reg-io-width = <4>; |
| 75 | reg-shift = <2>; | 75 | reg-shift = <2>; |
| 76 | status = "disabled"; | 76 | status = "disabled"; |
| 77 | -- | 77 | -- |
| 78 | 2.25.1 | 78 | 2.25.1 | diff view generated by jsdifflib |