| 1 | Add pwm nodes for RK3528. Most rk3528 boards use pwm-regulator to | 1 | Add pwm nodes for RK3528. Most rk3528 boards use pwm-regulator to |
|---|---|---|---|
| 2 | supply to CPU, add node to enable them. The PWM core on RK3528 is | 2 | supply to CPU, add node to enable them. The PWM core on RK3528 is |
| 3 | the same as RK3328, but the driver doesn't support interrupts yet. | 3 | the same as RK3328, but the driver doesn't support interrupts yet. |
| 4 | 4 | ||
| 5 | Unlike other SoCs, pinctrl-names need to be in "active" state, | 5 | Note that pwm regulator needs to be initialized in U-Boot: |
| 6 | I'm not sure about this, but otherwise the pwm-regulator will | 6 | ``` |
| 7 | not work properly. | 7 | &vdd_arm { |
| 8 | 8 | regulator-init-microvolt = <953000>; | |
| 9 | --- | ||
| 10 | vdd_arm: regulator-vdd-arm { | ||
| 11 | compatible = "pwm-regulator"; | ||
| 12 | pwms = <&pwm1 0 5000 1>; | ||
| 13 | pwm-supply = <&vcc5v0_sys>; | ||
| 14 | regulator-name = "vdd_arm"; | ||
| 15 | regulator-min-microvolt = <746000>; | ||
| 16 | regulator-max-microvolt = <1201000>; | ||
| 17 | regulator-always-on; | ||
| 18 | regulator-boot-on; | ||
| 19 | regulator-settling-time-up-us = <250>; | ||
| 20 | }; | 9 | }; |
| 21 | 10 | ||
| 22 | &cpu0 { | 11 | &vdd_logic { |
| 23 | cpu-supply = <&vdd_arm>; | 12 | regulator-init-microvolt = <900000>; |
| 24 | }; | 13 | }; |
| 14 | ``` | ||
| 25 | 15 | ||
| 26 | &pwm1 { | 16 | Changes in v3: |
| 27 | status = "okay"; | 17 | Adjust regulators order of E20C dts nodes |
| 28 | }; | 18 | Use PWM_POLARITY_INVERTED in pwm-regulator |
| 29 | --- | 19 | |
| 20 | Changes in v2: | ||
| 21 | Remove merged bindings patch | ||
| 22 | Remove pwm pinctrl in rk3528.dtsi | ||
| 23 | Enable pwm regulator for Radxa E20C | ||
| 30 | 24 | ||
| 31 | Chukun Pan (2): | 25 | Chukun Pan (2): |
| 32 | dt-bindings: pwm: rockchip: Add rockchip,rk3528-pwm | ||
| 33 | arm64: dts: rockchip: Add pwm nodes for RK3528 | 26 | arm64: dts: rockchip: Add pwm nodes for RK3528 |
| 27 | arm64: dts: rockchip: Enable regulators for Radxa E20C | ||
| 34 | 28 | ||
| 35 | .../devicetree/bindings/pwm/pwm-rockchip.yaml | 1 + | 29 | .../boot/dts/rockchip/rk3528-radxa-e20c.dts | 73 +++++++++++++++++ |
| 36 | arch/arm64/boot/dts/rockchip/rk3528.dtsi | 88 +++++++++++++++++++ | 30 | arch/arm64/boot/dts/rockchip/rk3528.dtsi | 80 +++++++++++++++++++ |
| 37 | 2 files changed, 89 insertions(+) | 31 | 2 files changed, 153 insertions(+) |
| 38 | 32 | ||
| 39 | -- | 33 | -- |
| 40 | 2.25.1 | 34 | 2.25.1 | diff view generated by jsdifflib |
| 1 | Add pwm nodes for RK3528. The PWM core on RK3528 is the same as | 1 | Add pwm nodes for RK3528. The PWM core on RK3528 is the same as |
|---|---|---|---|
| 2 | RK3328, but the driver does not support interrupts yet. | 2 | RK3328, but the driver does not support interrupts yet. |
| 3 | 3 | ||
| 4 | Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> | 4 | Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> |
| 5 | --- | 5 | --- |
| 6 | arch/arm64/boot/dts/rockchip/rk3528.dtsi | 88 ++++++++++++++++++++++++ | 6 | arch/arm64/boot/dts/rockchip/rk3528.dtsi | 80 ++++++++++++++++++++++++ |
| 7 | 1 file changed, 88 insertions(+) | 7 | 1 file changed, 80 insertions(+) |
| 8 | 8 | ||
| 9 | diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi | 9 | diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi |
| 10 | index XXXXXXX..XXXXXXX 100644 | 10 | index XXXXXXX..XXXXXXX 100644 |
| 11 | --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi | 11 | --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi |
| 12 | +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi | 12 | +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi |
| 13 | @@ -XXX,XX +XXX,XX @@ uart7: serial@ffa28000 { | 13 | @@ -XXX,XX +XXX,XX @@ uart7: serial@ffa28000 { |
| 14 | status = "disabled"; | 14 | status = "disabled"; |
| 15 | }; | 15 | }; |
| 16 | 16 | ||
| 17 | + pwm0: pwm@ffa90000 { | 17 | + pwm0: pwm@ffa90000 { |
| 18 | + compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm"; | 18 | + compatible = "rockchip,rk3528-pwm", |
| 19 | + "rockchip,rk3328-pwm"; | ||
| 19 | + reg = <0x0 0xffa90000 0x0 0x10>; | 20 | + reg = <0x0 0xffa90000 0x0 0x10>; |
| 20 | + clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>; | 21 | + clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>; |
| 21 | + clock-names = "pwm", "pclk"; | 22 | + clock-names = "pwm", "pclk"; |
| 22 | + pinctrl-0 = <&pwm0m0_pins>; | ||
| 23 | + pinctrl-names = "active"; | ||
| 24 | + #pwm-cells = <3>; | 23 | + #pwm-cells = <3>; |
| 25 | + status = "disabled"; | 24 | + status = "disabled"; |
| 26 | + }; | 25 | + }; |
| 27 | + | 26 | + |
| 28 | + pwm1: pwm@ffa90010 { | 27 | + pwm1: pwm@ffa90010 { |
| 29 | + compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm"; | 28 | + compatible = "rockchip,rk3528-pwm", |
| 29 | + "rockchip,rk3328-pwm"; | ||
| 30 | + reg = <0x0 0xffa90010 0x0 0x10>; | 30 | + reg = <0x0 0xffa90010 0x0 0x10>; |
| 31 | + clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>; | 31 | + clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>; |
| 32 | + clock-names = "pwm", "pclk"; | 32 | + clock-names = "pwm", "pclk"; |
| 33 | + pinctrl-0 = <&pwm1m0_pins>; | ||
| 34 | + pinctrl-names = "active"; | ||
| 35 | + #pwm-cells = <3>; | 33 | + #pwm-cells = <3>; |
| 36 | + status = "disabled"; | 34 | + status = "disabled"; |
| 37 | + }; | 35 | + }; |
| 38 | + | 36 | + |
| 39 | + pwm2: pwm@ffa90020 { | 37 | + pwm2: pwm@ffa90020 { |
| 40 | + compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm"; | 38 | + compatible = "rockchip,rk3528-pwm", |
| 39 | + "rockchip,rk3328-pwm"; | ||
| 41 | + reg = <0x0 0xffa90020 0x0 0x10>; | 40 | + reg = <0x0 0xffa90020 0x0 0x10>; |
| 42 | + clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>; | 41 | + clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>; |
| 43 | + clock-names = "pwm", "pclk"; | 42 | + clock-names = "pwm", "pclk"; |
| 44 | + pinctrl-0 = <&pwm2m0_pins>; | ||
| 45 | + pinctrl-names = "active"; | ||
| 46 | + #pwm-cells = <3>; | 43 | + #pwm-cells = <3>; |
| 47 | + status = "disabled"; | 44 | + status = "disabled"; |
| 48 | + }; | 45 | + }; |
| 49 | + | 46 | + |
| 50 | + pwm3: pwm@ffa90030 { | 47 | + pwm3: pwm@ffa90030 { |
| 51 | + compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm"; | 48 | + compatible = "rockchip,rk3528-pwm", |
| 49 | + "rockchip,rk3328-pwm"; | ||
| 52 | + reg = <0x0 0xffa90030 0x0 0x10>; | 50 | + reg = <0x0 0xffa90030 0x0 0x10>; |
| 53 | + clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>; | 51 | + clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>; |
| 54 | + clock-names = "pwm", "pclk"; | 52 | + clock-names = "pwm", "pclk"; |
| 55 | + pinctrl-0 = <&pwm3m0_pins>; | ||
| 56 | + pinctrl-names = "active"; | ||
| 57 | + #pwm-cells = <3>; | 53 | + #pwm-cells = <3>; |
| 58 | + status = "disabled"; | 54 | + status = "disabled"; |
| 59 | + }; | 55 | + }; |
| 60 | + | 56 | + |
| 61 | + pwm4: pwm@ffa98000 { | 57 | + pwm4: pwm@ffa98000 { |
| 62 | + compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm"; | 58 | + compatible = "rockchip,rk3528-pwm", |
| 59 | + "rockchip,rk3328-pwm"; | ||
| 63 | + reg = <0x0 0xffa98000 0x0 0x10>; | 60 | + reg = <0x0 0xffa98000 0x0 0x10>; |
| 64 | + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; | 61 | + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; |
| 65 | + clock-names = "pwm", "pclk"; | 62 | + clock-names = "pwm", "pclk"; |
| 66 | + pinctrl-0 = <&pwm4m0_pins>; | ||
| 67 | + pinctrl-names = "active"; | ||
| 68 | + #pwm-cells = <3>; | 63 | + #pwm-cells = <3>; |
| 69 | + status = "disabled"; | 64 | + status = "disabled"; |
| 70 | + }; | 65 | + }; |
| 71 | + | 66 | + |
| 72 | + pwm5: pwm@ffa98010 { | 67 | + pwm5: pwm@ffa98010 { |
| 73 | + compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm"; | 68 | + compatible = "rockchip,rk3528-pwm", |
| 69 | + "rockchip,rk3328-pwm"; | ||
| 74 | + reg = <0x0 0xffa98010 0x0 0x10>; | 70 | + reg = <0x0 0xffa98010 0x0 0x10>; |
| 75 | + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; | 71 | + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; |
| 76 | + clock-names = "pwm", "pclk"; | 72 | + clock-names = "pwm", "pclk"; |
| 77 | + pinctrl-0 = <&pwm5m0_pins>; | ||
| 78 | + pinctrl-names = "active"; | ||
| 79 | + #pwm-cells = <3>; | 73 | + #pwm-cells = <3>; |
| 80 | + status = "disabled"; | 74 | + status = "disabled"; |
| 81 | + }; | 75 | + }; |
| 82 | + | 76 | + |
| 83 | + pwm6: pwm@ffa98020 { | 77 | + pwm6: pwm@ffa98020 { |
| 84 | + compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm"; | 78 | + compatible = "rockchip,rk3528-pwm", |
| 79 | + "rockchip,rk3328-pwm"; | ||
| 85 | + reg = <0x0 0xffa98020 0x0 0x10>; | 80 | + reg = <0x0 0xffa98020 0x0 0x10>; |
| 86 | + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; | 81 | + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; |
| 87 | + clock-names = "pwm", "pclk"; | 82 | + clock-names = "pwm", "pclk"; |
| 88 | + pinctrl-0 = <&pwm6m0_pins>; | ||
| 89 | + pinctrl-names = "active"; | ||
| 90 | + #pwm-cells = <3>; | 83 | + #pwm-cells = <3>; |
| 91 | + status = "disabled"; | 84 | + status = "disabled"; |
| 92 | + }; | 85 | + }; |
| 93 | + | 86 | + |
| 94 | + pwm7: pwm@ffa98030 { | 87 | + pwm7: pwm@ffa98030 { |
| 95 | + compatible = "rockchip,rk3528-pwm", "rockchip,rk3328-pwm"; | 88 | + compatible = "rockchip,rk3528-pwm", |
| 89 | + "rockchip,rk3328-pwm"; | ||
| 96 | + reg = <0x0 0xffa98030 0x0 0x10>; | 90 | + reg = <0x0 0xffa98030 0x0 0x10>; |
| 97 | + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; | 91 | + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; |
| 98 | + clock-names = "pwm", "pclk"; | 92 | + clock-names = "pwm", "pclk"; |
| 99 | + pinctrl-0 = <&pwm7m0_pins>; | ||
| 100 | + pinctrl-names = "active"; | ||
| 101 | + #pwm-cells = <3>; | 93 | + #pwm-cells = <3>; |
| 102 | + status = "disabled"; | 94 | + status = "disabled"; |
| 103 | + }; | 95 | + }; |
| 104 | + | 96 | + |
| 105 | pinctrl: pinctrl { | 97 | saradc: adc@ffae0000 { |
| 106 | compatible = "rockchip,rk3528-pinctrl"; | 98 | compatible = "rockchip,rk3528-saradc"; |
| 107 | rockchip,grf = <&ioc_grf>; | 99 | reg = <0x0 0xffae0000 0x0 0x10000>; |
| 108 | -- | 100 | -- |
| 109 | 2.25.1 | 101 | 2.25.1 | diff view generated by jsdifflib |
| 1 | Document pwm compatible for rk3528 which is fallback compatible | 1 | Enable pwm and fixed regulators for Radxa E20C. The pwm regulator is |
|---|---|---|---|
| 2 | of rk3328-pwm group. | 2 | used to power the CPU and GPU. Note that the LPDDR4 voltage is 1.1V. |
| 3 | 3 | ||
| 4 | Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> | 4 | Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> |
| 5 | --- | 5 | --- |
| 6 | Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml | 1 + | 6 | .../boot/dts/rockchip/rk3528-radxa-e20c.dts | 73 +++++++++++++++++++ |
| 7 | 1 file changed, 1 insertion(+) | 7 | 1 file changed, 73 insertions(+) |
| 8 | 8 | ||
| 9 | diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml | 9 | diff --git a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts |
| 10 | index XXXXXXX..XXXXXXX 100644 | 10 | index XXXXXXX..XXXXXXX 100644 |
| 11 | --- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml | 11 | --- a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts |
| 12 | +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml | 12 | +++ b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts |
| 13 | @@ -XXX,XX +XXX,XX @@ properties: | 13 | @@ -XXX,XX +XXX,XX @@ |
| 14 | - enum: | 14 | |
| 15 | - rockchip,px30-pwm | 15 | #include <dt-bindings/input/input.h> |
| 16 | - rockchip,rk3308-pwm | 16 | #include <dt-bindings/leds/common.h> |
| 17 | + - rockchip,rk3528-pwm | 17 | +#include <dt-bindings/pwm/pwm.h> |
| 18 | - rockchip,rk3562-pwm | 18 | #include "rk3528.dtsi" |
| 19 | - rockchip,rk3568-pwm | 19 | |
| 20 | - rockchip,rk3588-pwm | 20 | / { |
| 21 | @@ -XXX,XX +XXX,XX @@ led-wan { | ||
| 22 | }; | ||
| 23 | }; | ||
| 24 | |||
| 25 | + vdd_0v9: regulator-0v9-vdd { | ||
| 26 | + compatible = "regulator-fixed"; | ||
| 27 | + regulator-name = "vdd_0v9"; | ||
| 28 | + regulator-always-on; | ||
| 29 | + regulator-boot-on; | ||
| 30 | + regulator-min-microvolt = <900000>; | ||
| 31 | + regulator-max-microvolt = <900000>; | ||
| 32 | + vin-supply = <&vcc5v0_sys>; | ||
| 33 | + }; | ||
| 34 | + | ||
| 35 | + vcc_ddr: regulator-1v1-vcc-ddr { | ||
| 36 | + compatible = "regulator-fixed"; | ||
| 37 | + regulator-name = "vcc_ddr"; | ||
| 38 | + regulator-always-on; | ||
| 39 | + regulator-boot-on; | ||
| 40 | + regulator-min-microvolt = <1100000>; | ||
| 41 | + regulator-max-microvolt = <1100000>; | ||
| 42 | + vin-supply = <&vcc5v0_sys>; | ||
| 43 | + }; | ||
| 44 | + | ||
| 45 | vcc_1v8: regulator-1v8-vcc { | ||
| 46 | compatible = "regulator-fixed"; | ||
| 47 | regulator-name = "vcc_1v8"; | ||
| 48 | @@ -XXX,XX +XXX,XX @@ vcc5v0_sys: regulator-5v0-vcc-sys { | ||
| 49 | regulator-min-microvolt = <5000000>; | ||
| 50 | regulator-max-microvolt = <5000000>; | ||
| 51 | }; | ||
| 52 | + | ||
| 53 | + vdd_arm: regulator-vdd-arm { | ||
| 54 | + compatible = "pwm-regulator"; | ||
| 55 | + pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>; | ||
| 56 | + pwm-supply = <&vcc5v0_sys>; | ||
| 57 | + regulator-name = "vdd_arm"; | ||
| 58 | + regulator-always-on; | ||
| 59 | + regulator-boot-on; | ||
| 60 | + regulator-min-microvolt = <746000>; | ||
| 61 | + regulator-max-microvolt = <1201000>; | ||
| 62 | + regulator-settling-time-up-us = <250>; | ||
| 63 | + }; | ||
| 64 | + | ||
| 65 | + vdd_logic: regulator-vdd-logic { | ||
| 66 | + compatible = "pwm-regulator"; | ||
| 67 | + pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>; | ||
| 68 | + pwm-supply = <&vcc5v0_sys>; | ||
| 69 | + regulator-name = "vdd_logic"; | ||
| 70 | + regulator-always-on; | ||
| 71 | + regulator-boot-on; | ||
| 72 | + regulator-min-microvolt = <705000>; | ||
| 73 | + regulator-max-microvolt = <1006000>; | ||
| 74 | + regulator-settling-time-up-us = <250>; | ||
| 75 | + }; | ||
| 76 | +}; | ||
| 77 | + | ||
| 78 | +&cpu0 { | ||
| 79 | + cpu-supply = <&vdd_arm>; | ||
| 80 | +}; | ||
| 81 | + | ||
| 82 | +&cpu1 { | ||
| 83 | + cpu-supply = <&vdd_arm>; | ||
| 84 | +}; | ||
| 85 | + | ||
| 86 | +&cpu2 { | ||
| 87 | + cpu-supply = <&vdd_arm>; | ||
| 88 | +}; | ||
| 89 | + | ||
| 90 | +&cpu3 { | ||
| 91 | + cpu-supply = <&vdd_arm>; | ||
| 92 | }; | ||
| 93 | |||
| 94 | &pinctrl { | ||
| 95 | @@ -XXX,XX +XXX,XX @@ wan_led_g: wan-led-g { | ||
| 96 | }; | ||
| 97 | }; | ||
| 98 | |||
| 99 | +&pwm1 { | ||
| 100 | + pinctrl-names = "default"; | ||
| 101 | + pinctrl-0 = <&pwm1m0_pins>; | ||
| 102 | + status = "okay"; | ||
| 103 | +}; | ||
| 104 | + | ||
| 105 | +&pwm2 { | ||
| 106 | + pinctrl-names = "default"; | ||
| 107 | + pinctrl-0 = <&pwm2m0_pins>; | ||
| 108 | + status = "okay"; | ||
| 109 | +}; | ||
| 110 | + | ||
| 111 | &saradc { | ||
| 112 | vref-supply = <&vcc_1v8>; | ||
| 113 | status = "okay"; | ||
| 21 | -- | 114 | -- |
| 22 | 2.25.1 | 115 | 2.25.1 | diff view generated by jsdifflib |