| 1 | This is a first draft of drm_panic support for i915. | 1 | This is a draft of drm_panic support for i915. |
|---|---|---|---|
| 2 | 2 | ||
| 3 | I've tested it on the 3 intel laptops I have at my disposal. | 3 | I've tested it on the 4 intel laptops I have at my disposal. |
| 4 | one Haswell with 128MB of eDRAM, one Cometlake and one Alderlake. | 4 | * Haswell with 128MB of eDRAM. |
| 5 | * Comet Lake i7-10850H | ||
| 6 | * Raptor Lake i7-1370P (with DPT, and Y-tiling). | ||
| 7 | * Lunar Lake Ultra 5 228V (with DPT, and 4-tiling, and using the Xe driver. | ||
| 5 | 8 | ||
| 6 | I tested panic in both fbdev console and gnome desktop. | 9 | I tested panic in both fbdev console and gnome desktop. |
| 7 | |||
| 8 | I still have an issue with Alderlake, and it doesn't work when in gnome desktop. | ||
| 9 | If I disable tiling on a framebuffer using DPT, then it displays some other memory location. | ||
| 10 | As DPT is enabled only for tiled framebuffer, there might be some hardware limitations? | ||
| 11 | I think it can be worked around by drawing the image tiled, (like what I've done on nouveau https://patchwork.freedesktop.org/series/133963/), but maybe there is another way? | ||
| 12 | 10 | ||
| 13 | Best regards, | 11 | Best regards, |
| 14 | 12 | ||
| 15 | v2: | 13 | v2: |
| 16 | * Add the proper abstractions to build also for Xe. | 14 | * Add the proper abstractions to build also for Xe. |
| 17 | * Fix dim checkpatch issues. | 15 | * Fix dim checkpatch issues. |
| 18 | 16 | ||
| 19 | Jocelyn Falempe (5): | 17 | v3: |
| 20 | drm/i915/fbdev: Add intel_fbdev_get_vaddr() | 18 | * Add support for Y-tiled framebuffer when DPT is enabled. |
| 19 | |||
| 20 | v4: | ||
| 21 | * Add support for Xe driver, which shares most of the code. | ||
| 22 | * Add support for 4-tiled framebuffer found in newest GPU. | ||
| 23 | |||
| 24 | v5: | ||
| 25 | * Rebase on top of git@gitlab.freedesktop.org:drm/i915/kernel.git drm-intel-next | ||
| 26 | * Use struct intel_display instead of drm_i915_private. | ||
| 27 | * Use iosys_map for intel_bo_panic_map(). | ||
| 28 | |||
| 29 | v6: | ||
| 30 | * Rebase on top of git@gitlab.freedesktop.org:drm/i915/kernel.git drm-intel-next | ||
| 31 | * Use struct intel_display instead of drm_i915_private for intel_atomic_plane.c | ||
| 32 | |||
| 33 | Jocelyn Falempe (8): | ||
| 34 | drm/i915/fbdev: Add intel_fbdev_get_map() | ||
| 21 | drm/i915/display/i9xx: Add a disable_tiling() for i9xx planes | 35 | drm/i915/display/i9xx: Add a disable_tiling() for i9xx planes |
| 22 | drm/i915/display: Add a disable_tiling() for skl planes | 36 | drm/i915/display: Add a disable_tiling() for skl planes |
| 23 | drm/i915/gem: Add i915_gem_object_panic_map() | 37 | drm/i915/gem: Add i915_gem_object_panic_map() |
| 24 | drm/i915: Add drm_panic support | 38 | drm/i915/display: Add drm_panic support |
| 39 | drm/i915/display: Flush the front buffer in panic handler | ||
| 40 | drm/i915/display: Add drm_panic support for Y-tiling with DPT | ||
| 41 | drm/i915/display: Add drm_panic support for 4-tiling with DPT | ||
| 25 | 42 | ||
| 26 | drivers/gpu/drm/i915/display/i9xx_plane.c | 23 +++++ | 43 | drivers/gpu/drm/i915/display/i9xx_plane.c | 23 +++ |
| 27 | .../gpu/drm/i915/display/intel_atomic_plane.c | 85 ++++++++++++++++++- | 44 | .../gpu/drm/i915/display/intel_atomic_plane.c | 169 +++++++++++++++++- |
| 28 | drivers/gpu/drm/i915/display/intel_bo.c | 10 +++ | 45 | drivers/gpu/drm/i915/display/intel_bo.c | 5 + |
| 29 | drivers/gpu/drm/i915/display/intel_bo.h | 2 + | 46 | drivers/gpu/drm/i915/display/intel_bo.h | 1 + |
| 30 | .../drm/i915/display/intel_display_types.h | 2 + | 47 | .../drm/i915/display/intel_display_types.h | 2 + |
| 31 | drivers/gpu/drm/i915/display/intel_fb_pin.c | 5 ++ | 48 | drivers/gpu/drm/i915/display/intel_fb_pin.c | 5 + |
| 32 | drivers/gpu/drm/i915/display/intel_fb_pin.h | 1 + | 49 | drivers/gpu/drm/i915/display/intel_fb_pin.h | 2 + |
| 33 | drivers/gpu/drm/i915/display/intel_fbdev.c | 5 ++ | 50 | drivers/gpu/drm/i915/display/intel_fbdev.c | 5 + |
| 34 | drivers/gpu/drm/i915/display/intel_fbdev.h | 6 ++ | 51 | drivers/gpu/drm/i915/display/intel_fbdev.h | 6 +- |
| 35 | .../drm/i915/display/skl_universal_plane.c | 20 +++++ | 52 | .../drm/i915/display/skl_universal_plane.c | 27 +++ |
| 36 | drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 + | 53 | drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 + |
| 37 | drivers/gpu/drm/i915/gem/i915_gem_pages.c | 25 ++++++ | 54 | drivers/gpu/drm/i915/gem/i915_gem_pages.c | 29 +++ |
| 38 | drivers/gpu/drm/i915/i915_vma.h | 5 ++ | 55 | drivers/gpu/drm/i915/i915_vma.h | 5 + |
| 39 | drivers/gpu/drm/xe/display/intel_bo.c | 11 +++ | 56 | drivers/gpu/drm/xe/display/intel_bo.c | 10 ++ |
| 40 | drivers/gpu/drm/xe/display/xe_fb_pin.c | 5 ++ | 57 | drivers/gpu/drm/xe/display/xe_fb_pin.c | 5 + |
| 41 | 15 files changed, 206 insertions(+), 1 deletion(-) | 58 | 15 files changed, 294 insertions(+), 2 deletions(-) |
| 42 | 59 | ||
| 43 | 60 | ||
| 44 | base-commit: 44cff6c5b0b17a78bc0b30372bcd816cf6dd282a | 61 | base-commit: 010363c4618920838ca8777fdabd46871d289bf9 |
| 45 | -- | 62 | -- |
| 46 | 2.47.1 | 63 | 2.49.0 | diff view generated by jsdifflib |
| ... | ... | ||
|---|---|---|---|
| 6 | Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> | 6 | Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> |
| 7 | --- | 7 | --- |
| 8 | 8 | ||
| 9 | v2: | 9 | v2: |
| 10 | * Add intel_fb_get_vaddr() and i915_vma_get_iomap() to build with Xe driver. | 10 | * Add intel_fb_get_vaddr() and i915_vma_get_iomap() to build with Xe driver. |
| 11 | |||
| 12 | v4: | ||
| 13 | * rename to get_map(), and return the struct iosys_map mapping. | ||
| 14 | * implement the Xe variant. | ||
| 11 | 15 | ||
| 12 | drivers/gpu/drm/i915/display/intel_fb_pin.c | 5 +++++ | 16 | drivers/gpu/drm/i915/display/intel_fb_pin.c | 5 +++++ |
| 13 | drivers/gpu/drm/i915/display/intel_fb_pin.h | 1 + | 17 | drivers/gpu/drm/i915/display/intel_fb_pin.h | 2 ++ |
| 14 | drivers/gpu/drm/i915/display/intel_fbdev.c | 5 +++++ | 18 | drivers/gpu/drm/i915/display/intel_fbdev.c | 5 +++++ |
| 15 | drivers/gpu/drm/i915/display/intel_fbdev.h | 6 ++++++ | 19 | drivers/gpu/drm/i915/display/intel_fbdev.h | 6 +++++- |
| 16 | drivers/gpu/drm/i915/i915_vma.h | 5 +++++ | 20 | drivers/gpu/drm/i915/i915_vma.h | 5 +++++ |
| 17 | drivers/gpu/drm/xe/display/xe_fb_pin.c | 5 +++++ | 21 | drivers/gpu/drm/xe/display/xe_fb_pin.c | 5 +++++ |
| 18 | 6 files changed, 27 insertions(+) | 22 | 6 files changed, 27 insertions(+), 1 deletion(-) |
| 19 | 23 | ||
| 20 | diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c | 24 | diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c |
| 21 | index XXXXXXX..XXXXXXX 100644 | 25 | index XXXXXXX..XXXXXXX 100644 |
| 22 | --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c | 26 | --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c |
| 23 | +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c | 27 | +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c |
| 24 | @@ -XXX,XX +XXX,XX @@ void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state) | 28 | @@ -XXX,XX +XXX,XX @@ void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state) |
| 25 | intel_dpt_unpin_from_ggtt(fb->dpt_vm); | 29 | intel_dpt_unpin_from_ggtt(fb->dpt_vm); |
| 26 | } | 30 | } |
| 27 | } | 31 | } |
| 28 | + | 32 | + |
| 29 | +void *intel_fb_get_vaddr(struct i915_vma *vma) | 33 | +void intel_fb_get_map(struct i915_vma *vma, struct iosys_map *map) |
| 30 | +{ | 34 | +{ |
| 31 | + return i915_vma_get_iomap(vma); | 35 | + iosys_map_set_vaddr_iomem(map, i915_vma_get_iomap(vma)); |
| 32 | +} | 36 | +} |
| 33 | diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h | 37 | diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h |
| 34 | index XXXXXXX..XXXXXXX 100644 | 38 | index XXXXXXX..XXXXXXX 100644 |
| 35 | --- a/drivers/gpu/drm/i915/display/intel_fb_pin.h | 39 | --- a/drivers/gpu/drm/i915/display/intel_fb_pin.h |
| 36 | +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h | 40 | +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h |
| 41 | @@ -XXX,XX +XXX,XX @@ struct drm_framebuffer; | ||
| 42 | struct i915_vma; | ||
| 43 | struct intel_plane_state; | ||
| 44 | struct i915_gtt_view; | ||
| 45 | +struct iosys_map; | ||
| 46 | |||
| 47 | struct i915_vma * | ||
| 48 | intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb, | ||
| 37 | @@ -XXX,XX +XXX,XX @@ void intel_fb_unpin_vma(struct i915_vma *vma, unsigned long flags); | 49 | @@ -XXX,XX +XXX,XX @@ void intel_fb_unpin_vma(struct i915_vma *vma, unsigned long flags); |
| 38 | 50 | int intel_plane_pin_fb(struct intel_plane_state *new_plane_state, | |
| 39 | int intel_plane_pin_fb(struct intel_plane_state *plane_state); | 51 | const struct intel_plane_state *old_plane_state); |
| 40 | void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state); | 52 | void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state); |
| 41 | +void *intel_fb_get_vaddr(struct i915_vma *vma); | 53 | +void intel_fb_get_map(struct i915_vma *vma, struct iosys_map *map); |
| 42 | 54 | ||
| 43 | #endif | 55 | #endif |
| 44 | diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c | 56 | diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c |
| 45 | index XXXXXXX..XXXXXXX 100644 | 57 | index XXXXXXX..XXXXXXX 100644 |
| 46 | --- a/drivers/gpu/drm/i915/display/intel_fbdev.c | 58 | --- a/drivers/gpu/drm/i915/display/intel_fbdev.c |
| 47 | +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c | 59 | +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c |
| 48 | @@ -XXX,XX +XXX,XX @@ struct intel_framebuffer *intel_fbdev_framebuffer(struct intel_fbdev *fbdev) | 60 | @@ -XXX,XX +XXX,XX @@ struct i915_vma *intel_fbdev_vma_pointer(struct intel_fbdev *fbdev) |
| 49 | 61 | { | |
| 50 | return to_intel_framebuffer(fbdev->helper.fb); | 62 | return fbdev ? fbdev->vma : NULL; |
| 51 | } | 63 | } |
| 52 | + | 64 | + |
| 53 | +void *intel_fbdev_get_vaddr(struct intel_fbdev *fbdev) | 65 | +void intel_fbdev_get_map(struct intel_fbdev *fbdev, struct iosys_map *map) |
| 54 | +{ | 66 | +{ |
| 55 | + return intel_fb_get_vaddr(fbdev->vma); | 67 | + intel_fb_get_map(fbdev->vma, map); |
| 56 | +} | 68 | +} |
| 57 | diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.h b/drivers/gpu/drm/i915/display/intel_fbdev.h | 69 | diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.h b/drivers/gpu/drm/i915/display/intel_fbdev.h |
| 58 | index XXXXXXX..XXXXXXX 100644 | 70 | index XXXXXXX..XXXXXXX 100644 |
| 59 | --- a/drivers/gpu/drm/i915/display/intel_fbdev.h | 71 | --- a/drivers/gpu/drm/i915/display/intel_fbdev.h |
| 60 | +++ b/drivers/gpu/drm/i915/display/intel_fbdev.h | 72 | +++ b/drivers/gpu/drm/i915/display/intel_fbdev.h |
| 61 | @@ -XXX,XX +XXX,XX @@ struct intel_framebuffer; | 73 | @@ -XXX,XX +XXX,XX @@ struct drm_fb_helper_surface_size; |
| 74 | struct drm_i915_private; | ||
| 75 | struct intel_fbdev; | ||
| 76 | struct intel_framebuffer; | ||
| 77 | +struct iosys_map; | ||
| 78 | |||
| 79 | #ifdef CONFIG_DRM_FBDEV_EMULATION | ||
| 80 | int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper, | ||
| 81 | @@ -XXX,XX +XXX,XX @@ int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper, | ||
| 62 | void intel_fbdev_setup(struct drm_i915_private *dev_priv); | 82 | void intel_fbdev_setup(struct drm_i915_private *dev_priv); |
| 63 | void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous); | ||
| 64 | struct intel_framebuffer *intel_fbdev_framebuffer(struct intel_fbdev *fbdev); | 83 | struct intel_framebuffer *intel_fbdev_framebuffer(struct intel_fbdev *fbdev); |
| 65 | +void *intel_fbdev_get_vaddr(struct intel_fbdev *fbdev); | 84 | struct i915_vma *intel_fbdev_vma_pointer(struct intel_fbdev *fbdev); |
| 85 | - | ||
| 86 | +void intel_fbdev_get_map(struct intel_fbdev *fbdev, struct iosys_map *map); | ||
| 66 | #else | 87 | #else |
| 67 | static inline void intel_fbdev_setup(struct drm_i915_private *dev_priv) | 88 | #define INTEL_FBDEV_DRIVER_OPS \ |
| 68 | { | 89 | .fbdev_probe = NULL |
| 69 | @@ -XXX,XX +XXX,XX @@ static inline struct intel_framebuffer *intel_fbdev_framebuffer(struct intel_fbd | 90 | @@ -XXX,XX +XXX,XX @@ static inline struct i915_vma *intel_fbdev_vma_pointer(struct intel_fbdev *fbdev |
| 70 | { | ||
| 71 | return NULL; | 91 | return NULL; |
| 72 | } | 92 | } |
| 73 | + | 93 | |
| 74 | +static inline void *intel_fbdev_get_vaddr(struct intel_fbdev *fbdev) | 94 | +static inline void intel_fbdev_get_map(struct intel_fbdev *fbdev, struct iosys_map *map) |
| 75 | +{ | 95 | +{ |
| 76 | + return NULL; | ||
| 77 | +} | 96 | +} |
| 78 | #endif | 97 | #endif |
| 79 | 98 | ||
| 80 | #endif /* __INTEL_FBDEV_H__ */ | 99 | #endif /* __INTEL_FBDEV_H__ */ |
| 81 | diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h | 100 | diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h |
| ... | ... | ||
| 101 | @@ -XXX,XX +XXX,XX @@ u64 intel_dpt_offset(struct i915_vma *dpt_vma) | 120 | @@ -XXX,XX +XXX,XX @@ u64 intel_dpt_offset(struct i915_vma *dpt_vma) |
| 102 | { | 121 | { |
| 103 | return 0; | 122 | return 0; |
| 104 | } | 123 | } |
| 105 | + | 124 | + |
| 106 | +void *intel_fb_get_vaddr(struct i915_vma *vma) | 125 | +void intel_fb_get_map(struct i915_vma *vma, struct iosys_map *map) |
| 107 | +{ | 126 | +{ |
| 108 | + return NULL; | 127 | + *map = vma->bo->vmap; |
| 109 | +} | 128 | +} |
| 110 | -- | 129 | -- |
| 111 | 2.47.1 | 130 | 2.49.0 | diff view generated by jsdifflib |
| ... | ... | ||
|---|---|---|---|
| 16 | .format_mod_supported = i8xx_plane_format_mod_supported, | 16 | .format_mod_supported = i8xx_plane_format_mod_supported, |
| 17 | }; | 17 | }; |
| 18 | 18 | ||
| 19 | +static void i9xx_disable_tiling(struct intel_plane *plane) | 19 | +static void i9xx_disable_tiling(struct intel_plane *plane) |
| 20 | +{ | 20 | +{ |
| 21 | + struct drm_i915_private *dev_priv = to_i915(plane->base.dev); | 21 | + struct intel_display *display = to_intel_display(plane); |
| 22 | + enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; | 22 | + enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; |
| 23 | + u32 dspcntr; | 23 | + u32 dspcntr; |
| 24 | + u32 reg; | 24 | + u32 reg; |
| 25 | + | 25 | + |
| 26 | + dspcntr = intel_de_read_fw(dev_priv, DSPCNTR(dev_priv, i9xx_plane)); | 26 | + dspcntr = intel_de_read_fw(display, DSPCNTR(display, i9xx_plane)); |
| 27 | + dspcntr &= ~DISP_TILED; | 27 | + dspcntr &= ~DISP_TILED; |
| 28 | + intel_de_write_fw(dev_priv, DSPCNTR(dev_priv, i9xx_plane), dspcntr); | 28 | + intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr); |
| 29 | + | 29 | + |
| 30 | + if (DISPLAY_VER(dev_priv) >= 4) { | 30 | + if (DISPLAY_VER(display) >= 4) { |
| 31 | + reg = intel_de_read_fw(dev_priv, DSPSURF(dev_priv, i9xx_plane)); | 31 | + reg = intel_de_read_fw(display, DSPSURF(display, i9xx_plane)); |
| 32 | + intel_de_write_fw(dev_priv, DSPSURF(dev_priv, i9xx_plane), reg); | 32 | + intel_de_write_fw(display, DSPSURF(display, i9xx_plane), reg); |
| 33 | + | 33 | + |
| 34 | + } else { | 34 | + } else { |
| 35 | + reg = intel_de_read_fw(dev_priv, DSPADDR(dev_priv, i9xx_plane)); | 35 | + reg = intel_de_read_fw(display, DSPADDR(display, i9xx_plane)); |
| 36 | + intel_de_write_fw(dev_priv, DSPADDR(dev_priv, i9xx_plane), reg); | 36 | + intel_de_write_fw(display, DSPADDR(display, i9xx_plane), reg); |
| 37 | + } | 37 | + } |
| 38 | +} | 38 | +} |
| 39 | + | 39 | + |
| 40 | struct intel_plane * | 40 | struct intel_plane * |
| 41 | intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) | 41 | intel_primary_plane_create(struct intel_display *display, enum pipe pipe) |
| 42 | { | 42 | { |
| 43 | @@ -XXX,XX +XXX,XX @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) | 43 | @@ -XXX,XX +XXX,XX @@ intel_primary_plane_create(struct intel_display *display, enum pipe pipe) |
| 44 | plane->disable_flip_done = ilk_primary_disable_flip_done; | 44 | } |
| 45 | } | 45 | } |
| 46 | 46 | ||
| 47 | + plane->disable_tiling = i9xx_disable_tiling; | 47 | + plane->disable_tiling = i9xx_disable_tiling; |
| 48 | + | 48 | + |
| 49 | modifiers = intel_fb_plane_get_modifiers(dev_priv, INTEL_PLANE_CAP_TILING_X); | 49 | modifiers = intel_fb_plane_get_modifiers(display, INTEL_PLANE_CAP_TILING_X); |
| 50 | 50 | ||
| 51 | if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) | 51 | if (DISPLAY_VER(display) >= 5 || display->platform.g4x) |
| 52 | diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h | 52 | diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h |
| 53 | index XXXXXXX..XXXXXXX 100644 | 53 | index XXXXXXX..XXXXXXX 100644 |
| 54 | --- a/drivers/gpu/drm/i915/display/intel_display_types.h | 54 | --- a/drivers/gpu/drm/i915/display/intel_display_types.h |
| 55 | +++ b/drivers/gpu/drm/i915/display/intel_display_types.h | 55 | +++ b/drivers/gpu/drm/i915/display/intel_display_types.h |
| 56 | @@ -XXX,XX +XXX,XX @@ struct intel_plane { | 56 | @@ -XXX,XX +XXX,XX @@ struct intel_plane { |
| ... | ... | ||
| 61 | + void (*disable_tiling)(struct intel_plane *plane); | 61 | + void (*disable_tiling)(struct intel_plane *plane); |
| 62 | }; | 62 | }; |
| 63 | 63 | ||
| 64 | #define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state, base) | 64 | #define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state, base) |
| 65 | -- | 65 | -- |
| 66 | 2.47.1 | 66 | 2.49.0 | diff view generated by jsdifflib |
| ... | ... | ||
|---|---|---|---|
| 9 | 9 | ||
| 10 | diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c | 10 | diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c |
| 11 | index XXXXXXX..XXXXXXX 100644 | 11 | index XXXXXXX..XXXXXXX 100644 |
| 12 | --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c | 12 | --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c |
| 13 | +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c | 13 | +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c |
| 14 | @@ -XXX,XX +XXX,XX @@ static u8 skl_get_plane_caps(struct drm_i915_private *i915, | 14 | @@ -XXX,XX +XXX,XX @@ static u8 tgl_plane_caps(struct intel_display *display, |
| 15 | return caps; | 15 | return caps; |
| 16 | } | 16 | } |
| 17 | 17 | ||
| 18 | +static void skl_disable_tiling(struct intel_plane *plane) | 18 | +static void skl_disable_tiling(struct intel_plane *plane) |
| 19 | +{ | 19 | +{ |
| 20 | + struct intel_plane_state *state = to_intel_plane_state(plane->base.state); | ||
| 21 | + struct intel_display *display = to_intel_display(plane); | ||
| 22 | + u32 stride = state->view.color_plane[0].scanout_stride / 64; | ||
| 20 | + u32 plane_ctl; | 23 | + u32 plane_ctl; |
| 21 | + struct intel_plane_state *state = to_intel_plane_state(plane->base.state); | ||
| 22 | + struct drm_i915_private *dev_priv = to_i915(plane->base.dev); | ||
| 23 | + u32 stride = state->view.color_plane[0].scanout_stride / 64; | ||
| 24 | + | 24 | + |
| 25 | + plane_ctl = intel_de_read(dev_priv, PLANE_CTL(plane->pipe, plane->id)); | 25 | + plane_ctl = intel_de_read(display, PLANE_CTL(plane->pipe, plane->id)); |
| 26 | + plane_ctl &= ~PLANE_CTL_TILED_MASK; | 26 | + plane_ctl &= ~PLANE_CTL_TILED_MASK; |
| 27 | + | 27 | + |
| 28 | + intel_de_write_fw(dev_priv, PLANE_STRIDE(plane->pipe, plane->id), | 28 | + intel_de_write_fw(display, PLANE_STRIDE(plane->pipe, plane->id), |
| 29 | + PLANE_STRIDE_(stride)); | 29 | + PLANE_STRIDE_(stride)); |
| 30 | + | 30 | + |
| 31 | + intel_de_write_fw(dev_priv, PLANE_CTL(plane->pipe, plane->id), plane_ctl); | 31 | + intel_de_write_fw(display, PLANE_CTL(plane->pipe, plane->id), plane_ctl); |
| 32 | + | 32 | + |
| 33 | + intel_de_write_fw(dev_priv, PLANE_SURF(plane->pipe, plane->id), | 33 | + intel_de_write_fw(display, PLANE_SURF(plane->pipe, plane->id), |
| 34 | + skl_plane_surf(state, 0)); | 34 | + skl_plane_surf(state, 0)); |
| 35 | +} | 35 | +} |
| 36 | + | 36 | + |
| 37 | struct intel_plane * | 37 | struct intel_plane * |
| 38 | skl_universal_plane_create(struct drm_i915_private *dev_priv, | 38 | skl_universal_plane_create(struct intel_display *display, |
| 39 | enum pipe pipe, enum plane_id plane_id) | 39 | enum pipe pipe, enum plane_id plane_id) |
| 40 | @@ -XXX,XX +XXX,XX @@ skl_universal_plane_create(struct drm_i915_private *dev_priv, | 40 | @@ -XXX,XX +XXX,XX @@ skl_universal_plane_create(struct intel_display *display, |
| 41 | plane->max_height = skl_plane_max_height; | 41 | plane->max_height = skl_plane_max_height; |
| 42 | plane->min_cdclk = skl_plane_min_cdclk; | 42 | plane->min_cdclk = skl_plane_min_cdclk; |
| 43 | } | 43 | } |
| 44 | + plane->disable_tiling = skl_disable_tiling; | 44 | + plane->disable_tiling = skl_disable_tiling; |
| 45 | 45 | ||
| 46 | if (DISPLAY_VER(dev_priv) >= 13) | 46 | if (DISPLAY_VER(display) >= 13) |
| 47 | plane->max_stride = adl_plane_max_stride; | 47 | plane->max_stride = adl_plane_max_stride; |
| 48 | -- | 48 | -- |
| 49 | 2.47.1 | 49 | 2.49.0 | diff view generated by jsdifflib |
| 1 | Prepare the work for drm_panic support. This is used to map the | 1 | Prepare the work for drm_panic support. This is used to map the |
|---|---|---|---|
| 2 | current framebuffer, so the CPU can overwrite it with the panic | 2 | current framebuffer, so the CPU can overwrite it with the panic |
| 3 | message. | 3 | message. |
| 4 | 4 | ||
| 5 | Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> | 5 | Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> |
| 6 | --- | 6 | --- |
| 7 | drivers/gpu/drm/i915/display/intel_bo.c | 10 +++++++++ | 7 | |
| 8 | drivers/gpu/drm/i915/display/intel_bo.h | 2 ++ | 8 | v5: |
| 9 | * Use iosys_map for intel_bo_panic_map(). | ||
| 10 | |||
| 11 | drivers/gpu/drm/i915/display/intel_bo.c | 5 ++++ | ||
| 12 | drivers/gpu/drm/i915/display/intel_bo.h | 1 + | ||
| 9 | drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 ++ | 13 | drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 ++ |
| 10 | drivers/gpu/drm/i915/gem/i915_gem_pages.c | 25 ++++++++++++++++++++++ | 14 | drivers/gpu/drm/i915/gem/i915_gem_pages.c | 29 ++++++++++++++++++++++ |
| 11 | drivers/gpu/drm/xe/display/intel_bo.c | 11 ++++++++++ | 15 | drivers/gpu/drm/xe/display/intel_bo.c | 10 ++++++++ |
| 12 | 5 files changed, 50 insertions(+) | 16 | 5 files changed, 47 insertions(+) |
| 13 | 17 | ||
| 14 | diff --git a/drivers/gpu/drm/i915/display/intel_bo.c b/drivers/gpu/drm/i915/display/intel_bo.c | 18 | diff --git a/drivers/gpu/drm/i915/display/intel_bo.c b/drivers/gpu/drm/i915/display/intel_bo.c |
| 15 | index XXXXXXX..XXXXXXX 100644 | 19 | index XXXXXXX..XXXXXXX 100644 |
| 16 | --- a/drivers/gpu/drm/i915/display/intel_bo.c | 20 | --- a/drivers/gpu/drm/i915/display/intel_bo.c |
| 17 | +++ b/drivers/gpu/drm/i915/display/intel_bo.c | 21 | +++ b/drivers/gpu/drm/i915/display/intel_bo.c |
| 18 | @@ -XXX,XX +XXX,XX @@ bool intel_bo_is_shmem(struct drm_gem_object *obj) | ||
| 19 | return i915_gem_object_is_shmem(to_intel_bo(obj)); | ||
| 20 | } | ||
| 21 | |||
| 22 | +bool intel_bo_has_iomem(struct drm_gem_object *obj) | ||
| 23 | +{ | ||
| 24 | + return i915_gem_object_has_iomem(to_intel_bo(obj)); | ||
| 25 | +} | ||
| 26 | + | ||
| 27 | bool intel_bo_is_protected(struct drm_gem_object *obj) | ||
| 28 | { | ||
| 29 | return i915_gem_object_is_protected(to_intel_bo(obj)); | ||
| 30 | @@ -XXX,XX +XXX,XX @@ void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj) | 22 | @@ -XXX,XX +XXX,XX @@ void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj) |
| 31 | { | 23 | { |
| 32 | i915_debugfs_describe_obj(m, to_intel_bo(obj)); | 24 | i915_debugfs_describe_obj(m, to_intel_bo(obj)); |
| 33 | } | 25 | } |
| 34 | + | 26 | + |
| 35 | +void *intel_bo_panic_map(struct drm_gem_object *obj) | 27 | +void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map) |
| 36 | +{ | 28 | +{ |
| 37 | + return i915_gem_object_panic_map(to_intel_bo(obj)); | 29 | + i915_gem_object_panic_map(to_intel_bo(obj), map); |
| 38 | +} | 30 | +} |
| 39 | diff --git a/drivers/gpu/drm/i915/display/intel_bo.h b/drivers/gpu/drm/i915/display/intel_bo.h | 31 | diff --git a/drivers/gpu/drm/i915/display/intel_bo.h b/drivers/gpu/drm/i915/display/intel_bo.h |
| 40 | index XXXXXXX..XXXXXXX 100644 | 32 | index XXXXXXX..XXXXXXX 100644 |
| 41 | --- a/drivers/gpu/drm/i915/display/intel_bo.h | 33 | --- a/drivers/gpu/drm/i915/display/intel_bo.h |
| 42 | +++ b/drivers/gpu/drm/i915/display/intel_bo.h | 34 | +++ b/drivers/gpu/drm/i915/display/intel_bo.h |
| 43 | @@ -XXX,XX +XXX,XX @@ struct vm_area_struct; | ||
| 44 | bool intel_bo_is_tiled(struct drm_gem_object *obj); | ||
| 45 | bool intel_bo_is_userptr(struct drm_gem_object *obj); | ||
| 46 | bool intel_bo_is_shmem(struct drm_gem_object *obj); | ||
| 47 | +bool intel_bo_has_iomem(struct drm_gem_object *obj); | ||
| 48 | bool intel_bo_is_protected(struct drm_gem_object *obj); | ||
| 49 | void intel_bo_flush_if_display(struct drm_gem_object *obj); | ||
| 50 | int intel_bo_fb_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma); | ||
| 51 | @@ -XXX,XX +XXX,XX @@ struct intel_frontbuffer *intel_bo_set_frontbuffer(struct drm_gem_object *obj, | 35 | @@ -XXX,XX +XXX,XX @@ struct intel_frontbuffer *intel_bo_set_frontbuffer(struct drm_gem_object *obj, |
| 52 | struct intel_frontbuffer *front); | 36 | struct intel_frontbuffer *front); |
| 53 | 37 | ||
| 54 | void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj); | 38 | void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj); |
| 55 | +void *intel_bo_panic_map(struct drm_gem_object *obj); | 39 | +void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map); |
| 56 | 40 | ||
| 57 | #endif /* __INTEL_BO__ */ | 41 | #endif /* __INTEL_BO__ */ |
| 58 | diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h | 42 | diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h |
| 59 | index XXXXXXX..XXXXXXX 100644 | 43 | index XXXXXXX..XXXXXXX 100644 |
| 60 | --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h | 44 | --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h |
| 61 | +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h | 45 | +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h |
| 62 | @@ -XXX,XX +XXX,XX @@ i915_gem_object_unpin_pages(struct drm_i915_gem_object *obj) | 46 | @@ -XXX,XX +XXX,XX @@ i915_gem_object_unpin_pages(struct drm_i915_gem_object *obj) |
| 63 | int __i915_gem_object_put_pages(struct drm_i915_gem_object *obj); | 47 | int __i915_gem_object_put_pages(struct drm_i915_gem_object *obj); |
| 64 | int i915_gem_object_truncate(struct drm_i915_gem_object *obj); | 48 | int i915_gem_object_truncate(struct drm_i915_gem_object *obj); |
| 65 | 49 | ||
| 66 | +void *i915_gem_object_panic_map(struct drm_i915_gem_object *obj); | 50 | +void i915_gem_object_panic_map(struct drm_i915_gem_object *obj, struct iosys_map *map); |
| 67 | + | 51 | + |
| 68 | /** | 52 | /** |
| 69 | * i915_gem_object_pin_map - return a contiguous mapping of the entire object | 53 | * i915_gem_object_pin_map - return a contiguous mapping of the entire object |
| 70 | * @obj: the object to map into kernel address space | 54 | * @obj: the object to map into kernel address space |
| 71 | diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c | 55 | diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c |
| ... | ... | ||
| 77 | } | 61 | } |
| 78 | 62 | ||
| 79 | +/* Map the current framebuffer for CPU access. Called from panic handler, so no | 63 | +/* Map the current framebuffer for CPU access. Called from panic handler, so no |
| 80 | + * need to pin or cleanup. | 64 | + * need to pin or cleanup. |
| 81 | + */ | 65 | + */ |
| 82 | +void *i915_gem_object_panic_map(struct drm_i915_gem_object *obj) | 66 | +void i915_gem_object_panic_map(struct drm_i915_gem_object *obj, struct iosys_map *map) |
| 83 | +{ | 67 | +{ |
| 84 | + enum i915_map_type has_type; | 68 | + enum i915_map_type has_type; |
| 85 | + void *ptr; | 69 | + void *ptr; |
| 86 | + | 70 | + |
| 87 | + ptr = page_unpack_bits(obj->mm.mapping, &has_type); | 71 | + ptr = page_unpack_bits(obj->mm.mapping, &has_type); |
| 88 | + | 72 | + |
| 89 | + if (ptr) | ||
| 90 | + return ptr; | ||
| 91 | + | 73 | + |
| 92 | + if (i915_gem_object_has_struct_page(obj)) | 74 | + if (!ptr) { |
| 93 | + ptr = i915_gem_object_map_page(obj, I915_MAP_WB); | 75 | + if (i915_gem_object_has_struct_page(obj)) |
| 76 | + ptr = i915_gem_object_map_page(obj, I915_MAP_WB); | ||
| 77 | + else | ||
| 78 | + ptr = i915_gem_object_map_pfn(obj, I915_MAP_WB); | ||
| 79 | + | ||
| 80 | + if (IS_ERR(ptr)) | ||
| 81 | + return; | ||
| 82 | + | ||
| 83 | + obj->mm.mapping = page_pack_bits(ptr, I915_MAP_WB); | ||
| 84 | + } | ||
| 85 | + | ||
| 86 | + if (i915_gem_object_has_iomem(obj)) | ||
| 87 | + iosys_map_set_vaddr_iomem(map, (void __iomem *) ptr); | ||
| 94 | + else | 88 | + else |
| 95 | + ptr = i915_gem_object_map_pfn(obj, I915_MAP_WB); | 89 | + iosys_map_set_vaddr(map, ptr); |
| 96 | + | ||
| 97 | + if (IS_ERR(ptr)) | ||
| 98 | + return NULL; | ||
| 99 | + | ||
| 100 | + obj->mm.mapping = page_pack_bits(ptr, I915_MAP_WB); | ||
| 101 | + return ptr; | ||
| 102 | +} | 90 | +} |
| 103 | + | 91 | + |
| 104 | /* get, pin, and map the pages of the object into kernel space */ | 92 | /* get, pin, and map the pages of the object into kernel space */ |
| 105 | void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj, | 93 | void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj, |
| 106 | enum i915_map_type type) | 94 | enum i915_map_type type) |
| 107 | diff --git a/drivers/gpu/drm/xe/display/intel_bo.c b/drivers/gpu/drm/xe/display/intel_bo.c | 95 | diff --git a/drivers/gpu/drm/xe/display/intel_bo.c b/drivers/gpu/drm/xe/display/intel_bo.c |
| 108 | index XXXXXXX..XXXXXXX 100644 | 96 | index XXXXXXX..XXXXXXX 100644 |
| 109 | --- a/drivers/gpu/drm/xe/display/intel_bo.c | 97 | --- a/drivers/gpu/drm/xe/display/intel_bo.c |
| 110 | +++ b/drivers/gpu/drm/xe/display/intel_bo.c | 98 | +++ b/drivers/gpu/drm/xe/display/intel_bo.c |
| 111 | @@ -XXX,XX +XXX,XX @@ bool intel_bo_is_shmem(struct drm_gem_object *obj) | ||
| 112 | return false; | ||
| 113 | } | ||
| 114 | |||
| 115 | +bool intel_bo_has_iomem(struct drm_gem_object *obj) | ||
| 116 | +{ | ||
| 117 | + return false; | ||
| 118 | +} | ||
| 119 | + | ||
| 120 | bool intel_bo_is_protected(struct drm_gem_object *obj) | ||
| 121 | { | ||
| 122 | return false; | ||
| 123 | @@ -XXX,XX +XXX,XX @@ void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj) | 99 | @@ -XXX,XX +XXX,XX @@ void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj) |
| 124 | { | 100 | { |
| 125 | /* FIXME */ | 101 | /* FIXME */ |
| 126 | } | 102 | } |
| 127 | + | 103 | + |
| 128 | +void *intel_bo_panic_map(struct drm_gem_object *obj) | 104 | +void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map) |
| 129 | +{ | 105 | +{ |
| 130 | + /* TODO: map the object so CPU can write the panic screen to it */ | 106 | + struct xe_bo *bo = gem_to_xe_bo(obj); |
| 131 | + return NULL; | 107 | + int ret; |
| 108 | + | ||
| 109 | + ret = ttm_bo_vmap(&bo->ttm, map); | ||
| 110 | + if (ret) | ||
| 111 | + iosys_map_clear(map); | ||
| 132 | +} | 112 | +} |
| 133 | -- | 113 | -- |
| 134 | 2.47.1 | 114 | 2.49.0 | diff view generated by jsdifflib |
| 1 | This adds drm_panic support for a wide range of Intel GPU. I've | 1 | This adds drm_panic support for a wide range of Intel GPU. I've |
|---|---|---|---|
| 2 | tested it only on 3 laptops, haswell (with 128MB of eDRAM), | 2 | tested it only on 4 laptops, Haswell (with 128MB of eDRAM), |
| 3 | cometlake and alderlake. | 3 | Comet Lake, Raptor Lake, and Lunar Lake. |
| 4 | 4 | For hardware using DPT, it's not possible to disable tiling, as you | |
| 5 | * DPT: if I disable tiling on a framebuffer using DPT, then it | 5 | will need to reconfigure the way the GPU is accessing the |
| 6 | displays some other memory location. As DPT is enabled only for | 6 | framebuffer. |
| 7 | tiled framebuffer, there might be some hardware limitations. | ||
| 8 | * fbdev: On my haswell laptop, the fbdev framebuffer is configured | ||
| 9 | with tiling enabled, but really it's linear, because fbcon don't | ||
| 10 | know about tiling, and the panic screen is perfect when it's drawn | ||
| 11 | as linear. | ||
| 12 | 7 | ||
| 13 | Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> | 8 | Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> |
| 14 | --- | 9 | --- |
| 15 | .../gpu/drm/i915/display/intel_atomic_plane.c | 85 ++++++++++++++++++- | 10 | |
| 16 | 1 file changed, 84 insertions(+), 1 deletion(-) | 11 | v4: |
| 12 | * Add support for Xe driver. | ||
| 13 | |||
| 14 | v6: | ||
| 15 | * Use struct intel_display instead of drm_i915_private for intel_atomic_plane.c | ||
| 16 | |||
| 17 | .../gpu/drm/i915/display/intel_atomic_plane.c | 79 ++++++++++++++++++- | ||
| 18 | 1 file changed, 78 insertions(+), 1 deletion(-) | ||
| 17 | 19 | ||
| 18 | diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c | 20 | diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c |
| 19 | index XXXXXXX..XXXXXXX 100644 | 21 | index XXXXXXX..XXXXXXX 100644 |
| 20 | --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c | 22 | --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c |
| 21 | +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c | 23 | +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c |
| ... | ... | ||
| 25 | #include <linux/dma-resv.h> | 27 | #include <linux/dma-resv.h> |
| 26 | +#include <linux/iosys-map.h> | 28 | +#include <linux/iosys-map.h> |
| 27 | 29 | ||
| 28 | #include <drm/drm_atomic_helper.h> | 30 | #include <drm/drm_atomic_helper.h> |
| 29 | #include <drm/drm_blend.h> | 31 | #include <drm/drm_blend.h> |
| 32 | #include <drm/drm_damage_helper.h> | ||
| 30 | +#include <drm/drm_cache.h> | 33 | +#include <drm/drm_cache.h> |
| 31 | #include <drm/drm_fourcc.h> | 34 | #include <drm/drm_fourcc.h> |
| 32 | #include <drm/drm_gem.h> | 35 | #include <drm/drm_gem.h> |
| 33 | #include <drm/drm_gem_atomic_helper.h> | 36 | #include <drm/drm_gem_atomic_helper.h> |
| 34 | +#include <drm/drm_panic.h> | 37 | +#include <drm/drm_panic.h> |
| 35 | 38 | ||
| 39 | #include "gem/i915_gem_object.h" | ||
| 36 | #include "i915_config.h" | 40 | #include "i915_config.h" |
| 41 | @@ -XXX,XX +XXX,XX @@ | ||
| 42 | #include "i915_vma.h" | ||
| 37 | #include "i9xx_plane_regs.h" | 43 | #include "i9xx_plane_regs.h" |
| 38 | #include "intel_atomic_plane.h" | 44 | #include "intel_atomic_plane.h" |
| 39 | +#include "intel_bo.h" | 45 | +#include "intel_bo.h" |
| 40 | #include "intel_cdclk.h" | 46 | #include "intel_cdclk.h" |
| 41 | #include "intel_cursor.h" | 47 | #include "intel_cursor.h" |
| ... | ... | ||
| 44 | #include "intel_display_types.h" | 50 | #include "intel_display_types.h" |
| 45 | #include "intel_fb.h" | 51 | #include "intel_fb.h" |
| 46 | #include "intel_fb_pin.h" | 52 | #include "intel_fb_pin.h" |
| 47 | +#include "intel_fbdev.h" | 53 | +#include "intel_fbdev.h" |
| 48 | #include "skl_scaler.h" | 54 | #include "skl_scaler.h" |
| 55 | #include "skl_universal_plane.h" | ||
| 49 | #include "skl_watermark.h" | 56 | #include "skl_watermark.h" |
| 50 | |||
| 51 | @@ -XXX,XX +XXX,XX @@ intel_cleanup_plane_fb(struct drm_plane *plane, | 57 | @@ -XXX,XX +XXX,XX @@ intel_cleanup_plane_fb(struct drm_plane *plane, |
| 52 | intel_plane_unpin_fb(old_plane_state); | 58 | intel_plane_unpin_fb(old_plane_state); |
| 53 | } | 59 | } |
| 54 | 60 | ||
| 55 | +/* Only used by drm_panic get_scanout_buffer() and panic_flush(), so it is | 61 | +/* Only used by drm_panic get_scanout_buffer() and panic_flush(), so it is |
| ... | ... | ||
| 58 | +static struct iosys_map panic_map; | 64 | +static struct iosys_map panic_map; |
| 59 | + | 65 | + |
| 60 | +static void intel_panic_flush(struct drm_plane *plane) | 66 | +static void intel_panic_flush(struct drm_plane *plane) |
| 61 | +{ | 67 | +{ |
| 62 | + struct intel_plane_state *plane_state = to_intel_plane_state(plane->state); | 68 | + struct intel_plane_state *plane_state = to_intel_plane_state(plane->state); |
| 63 | + struct drm_i915_private *dev_priv = to_i915(plane->dev); | 69 | + struct intel_plane *iplane = to_intel_plane(plane); |
| 70 | + struct intel_display *display = to_intel_display(iplane); | ||
| 64 | + struct drm_framebuffer *fb = plane_state->hw.fb; | 71 | + struct drm_framebuffer *fb = plane_state->hw.fb; |
| 65 | + struct intel_plane *iplane = to_intel_plane(plane); | ||
| 66 | + | 72 | + |
| 67 | + /* Force a cache flush, otherwise the new pixels won't show up */ | 73 | + /* Force a cache flush, otherwise the new pixels won't show up */ |
| 68 | + drm_clflush_virt_range(panic_map.vaddr, fb->height * fb->pitches[0]); | 74 | + drm_clflush_virt_range(panic_map.vaddr, fb->height * fb->pitches[0]); |
| 69 | + | 75 | + |
| 70 | + /* Don't disable tiling if it's the fbdev framebuffer.*/ | 76 | + /* Don't disable tiling if it's the fbdev framebuffer.*/ |
| 71 | + if (to_intel_framebuffer(fb) == intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev)) | 77 | + if (to_intel_framebuffer(fb) == intel_fbdev_framebuffer(display->fbdev.fbdev)) { |
| 72 | + return; | 78 | + return; |
| 73 | + | 79 | + |
| 74 | + if (fb->modifier && iplane->disable_tiling) | 80 | + if (fb->modifier && iplane->disable_tiling) |
| 75 | + iplane->disable_tiling(iplane); | 81 | + iplane->disable_tiling(iplane); |
| 76 | +} | 82 | +} |
| ... | ... | ||
| 79 | + struct drm_scanout_buffer *sb) | 85 | + struct drm_scanout_buffer *sb) |
| 80 | +{ | 86 | +{ |
| 81 | + struct intel_plane_state *plane_state; | 87 | + struct intel_plane_state *plane_state; |
| 82 | + struct drm_gem_object *obj; | 88 | + struct drm_gem_object *obj; |
| 83 | + struct drm_framebuffer *fb; | 89 | + struct drm_framebuffer *fb; |
| 84 | + struct drm_i915_private *dev_priv = to_i915(plane->dev); | 90 | + struct intel_display *display = to_intel_display(plane->dev); |
| 85 | + void *ptr; | ||
| 86 | + | 91 | + |
| 87 | + if (!plane->state || !plane->state->fb || !plane->state->visible) | 92 | + if (!plane->state || !plane->state->fb || !plane->state->visible) |
| 88 | + return -ENODEV; | 93 | + return -ENODEV; |
| 89 | + | 94 | + |
| 90 | + plane_state = to_intel_plane_state(plane->state); | 95 | + plane_state = to_intel_plane_state(plane->state); |
| 91 | + fb = plane_state->hw.fb; | 96 | + fb = plane_state->hw.fb; |
| 92 | + obj = intel_fb_bo(fb); | 97 | + obj = intel_fb_bo(fb); |
| 93 | + if (!obj) | 98 | + if (!obj) |
| 94 | + return -ENODEV; | 99 | + return -ENODEV; |
| 95 | + | 100 | + |
| 96 | + if (to_intel_framebuffer(fb) == intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev)) { | 101 | + iosys_map_clear(&panic_map); |
| 97 | + ptr = intel_fbdev_get_vaddr(dev_priv->display.fbdev.fbdev); | 102 | + if (to_intel_framebuffer(fb) == intel_fbdev_framebuffer(display->fbdev.fbdev)) { |
| 103 | + intel_fbdev_get_map(display->fbdev.fbdev, &panic_map); | ||
| 98 | + } else { | 104 | + } else { |
| 99 | + /* can't disable tiling if DPT is in use */ | 105 | + /* Can't disable tiling if DPT is in use */ |
| 100 | + if (intel_bo_is_tiled(obj) && HAS_DPT(dev_priv)) | 106 | + if (intel_fb_uses_dpt(fb)) |
| 101 | + return -EOPNOTSUPP; | 107 | + return -EOPNOTSUPP; |
| 102 | + | 108 | + |
| 103 | + ptr = intel_bo_panic_map(obj); | 109 | + intel_bo_panic_map(obj, &panic_map); |
| 104 | + } | 110 | + } |
| 105 | + | 111 | + if (iosys_map_is_null(&panic_map)) |
| 106 | + if (!ptr) | ||
| 107 | + return -ENOMEM; | 112 | + return -ENOMEM; |
| 108 | + | ||
| 109 | + if (intel_bo_has_iomem(obj)) | ||
| 110 | + iosys_map_set_vaddr_iomem(&panic_map, ptr); | ||
| 111 | + else | ||
| 112 | + iosys_map_set_vaddr(&panic_map, ptr); | ||
| 113 | + | 113 | + |
| 114 | + sb->map[0] = panic_map; | 114 | + sb->map[0] = panic_map; |
| 115 | + sb->width = fb->width; | 115 | + sb->width = fb->width; |
| 116 | + sb->height = fb->height; | 116 | + sb->height = fb->height; |
| 117 | + sb->format = fb->format; | 117 | + sb->format = fb->format; |
| ... | ... | ||
| 141 | + drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs); | 141 | + drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs); |
| 142 | } | 142 | } |
| 143 | 143 | ||
| 144 | void intel_plane_init_cursor_vblank_work(struct intel_plane_state *old_plane_state, | 144 | void intel_plane_init_cursor_vblank_work(struct intel_plane_state *old_plane_state, |
| 145 | -- | 145 | -- |
| 146 | 2.47.1 | 146 | 2.49.0 | diff view generated by jsdifflib |
New patch | |||
|---|---|---|---|
| 1 | On Lunar Lake, if the panic occurs when fbcon is active, the panic | ||
| 2 | screen is only partially visible on the screen. Adding this | ||
| 3 | intel_frontbuffer_flush() call solves the issue. | ||
| 4 | It's probably not safe to do that in the panic handler, but that's | ||
| 5 | still better than nothing. | ||
| 1 | 6 | ||
| 7 | Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> | ||
| 8 | --- | ||
| 9 | drivers/gpu/drm/i915/display/intel_atomic_plane.c | 7 +++++++ | ||
| 10 | 1 file changed, 7 insertions(+) | ||
| 11 | |||
| 12 | diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c | ||
| 13 | index XXXXXXX..XXXXXXX 100644 | ||
| 14 | --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c | ||
| 15 | +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c | ||
| 16 | @@ -XXX,XX +XXX,XX @@ | ||
| 17 | #include "intel_fb.h" | ||
| 18 | #include "intel_fb_pin.h" | ||
| 19 | #include "intel_fbdev.h" | ||
| 20 | +#include "intel_frontbuffer.h" | ||
| 21 | #include "skl_scaler.h" | ||
| 22 | #include "skl_universal_plane.h" | ||
| 23 | #include "skl_watermark.h" | ||
| 24 | @@ -XXX,XX +XXX,XX @@ static void intel_panic_flush(struct drm_plane *plane) | ||
| 25 | |||
| 26 | /* Don't disable tiling if it's the fbdev framebuffer.*/ | ||
| 27 | if (to_intel_framebuffer(fb) == intel_fbdev_framebuffer(display->fbdev.fbdev)) { | ||
| 28 | + struct intel_frontbuffer *front = to_intel_frontbuffer(fb); | ||
| 29 | + struct drm_gem_object *obj = intel_fb_bo(fb); | ||
| 30 | + | ||
| 31 | + intel_bo_flush_if_display(obj); | ||
| 32 | + intel_frontbuffer_flush(front, ORIGIN_DIRTYFB); | ||
| 33 | return; | ||
| 34 | + } | ||
| 35 | |||
| 36 | if (fb->modifier && iplane->disable_tiling) | ||
| 37 | iplane->disable_tiling(iplane); | ||
| 38 | -- | ||
| 39 | 2.49.0 | diff view generated by jsdifflib |
New patch | |||
|---|---|---|---|
| 1 | On Alder Lake and later, it's not possible to disable tiling when DPT | ||
| 2 | is enabled. | ||
| 3 | So this commit implements Y-Tiling support, to still be able to draw | ||
| 4 | the panic screen. | ||
| 1 | 5 | ||
| 6 | Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> | ||
| 7 | --- | ||
| 8 | .../gpu/drm/i915/display/intel_atomic_plane.c | 69 ++++++++++++++++++- | ||
| 9 | .../drm/i915/display/skl_universal_plane.c | 15 ++-- | ||
| 10 | 2 files changed, 77 insertions(+), 7 deletions(-) | ||
| 11 | |||
| 12 | diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c | ||
| 13 | index XXXXXXX..XXXXXXX 100644 | ||
| 14 | --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c | ||
| 15 | +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c | ||
| 16 | @@ -XXX,XX +XXX,XX @@ intel_cleanup_plane_fb(struct drm_plane *plane, | ||
| 17 | */ | ||
| 18 | static struct iosys_map panic_map; | ||
| 19 | |||
| 20 | +/* Handle Y-tiling, only if DPT is enabled (otherwise disabling tiling is easier) | ||
| 21 | + * All DPT hardware have 128-bytes width tiling, so Y-tile dimension is 32x32 | ||
| 22 | + * pixels for 32bits pixels. | ||
| 23 | + */ | ||
| 24 | +#define YTILE_WIDTH 32 | ||
| 25 | +#define YTILE_HEIGHT 32 | ||
| 26 | +#define YTILE_SIZE (YTILE_WIDTH * YTILE_HEIGHT * 4) | ||
| 27 | + | ||
| 28 | +static void intel_ytile_set_pixel(struct drm_scanout_buffer *sb, unsigned int x, unsigned int y, | ||
| 29 | + u32 color) | ||
| 30 | +{ | ||
| 31 | + u32 offset; | ||
| 32 | + unsigned int swizzle; | ||
| 33 | + unsigned int width_in_blocks = DIV_ROUND_UP(sb->width, 32); | ||
| 34 | + | ||
| 35 | + /* Block offset */ | ||
| 36 | + offset = ((y / YTILE_HEIGHT) * width_in_blocks + (x / YTILE_WIDTH)) * YTILE_SIZE; | ||
| 37 | + | ||
| 38 | + x = x % YTILE_WIDTH; | ||
| 39 | + y = y % YTILE_HEIGHT; | ||
| 40 | + | ||
| 41 | + /* bit order inside a block is x4 x3 x2 y4 y3 y2 y1 y0 x1 x0 */ | ||
| 42 | + swizzle = (x & 3) | ((y & 0x1f) << 2) | ((x & 0x1c) << 5); | ||
| 43 | + offset += swizzle * 4; | ||
| 44 | + iosys_map_wr(&sb->map[0], offset, u32, color); | ||
| 45 | +} | ||
| 46 | + | ||
| 47 | static void intel_panic_flush(struct drm_plane *plane) | ||
| 48 | { | ||
| 49 | struct intel_plane_state *plane_state = to_intel_plane_state(plane->state); | ||
| 50 | @@ -XXX,XX +XXX,XX @@ static void intel_panic_flush(struct drm_plane *plane) | ||
| 51 | iplane->disable_tiling(iplane); | ||
| 52 | } | ||
| 53 | |||
| 54 | +static void (*intel_get_tiling_func(u64 fb_modifier))(struct drm_scanout_buffer *sb, unsigned int x, | ||
| 55 | + unsigned int y, u32 color) | ||
| 56 | +{ | ||
| 57 | + switch (fb_modifier) { | ||
| 58 | + case I915_FORMAT_MOD_Y_TILED: | ||
| 59 | + case I915_FORMAT_MOD_Y_TILED_CCS: | ||
| 60 | + case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC: | ||
| 61 | + case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: | ||
| 62 | + case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS: | ||
| 63 | + return intel_ytile_set_pixel; | ||
| 64 | + case I915_FORMAT_MOD_X_TILED: | ||
| 65 | + case I915_FORMAT_MOD_4_TILED: | ||
| 66 | + case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS: | ||
| 67 | + case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS: | ||
| 68 | + case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC: | ||
| 69 | + case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS: | ||
| 70 | + case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC: | ||
| 71 | + case I915_FORMAT_MOD_4_TILED_MTL_MC_CCS: | ||
| 72 | + case I915_FORMAT_MOD_4_TILED_BMG_CCS: | ||
| 73 | + case I915_FORMAT_MOD_4_TILED_LNL_CCS: | ||
| 74 | + case I915_FORMAT_MOD_Yf_TILED: | ||
| 75 | + case I915_FORMAT_MOD_Yf_TILED_CCS: | ||
| 76 | + default: | ||
| 77 | + /* Not supported yet */ | ||
| 78 | + return NULL; | ||
| 79 | + } | ||
| 80 | +} | ||
| 81 | + | ||
| 82 | static int intel_get_scanout_buffer(struct drm_plane *plane, | ||
| 83 | struct drm_scanout_buffer *sb) | ||
| 84 | { | ||
| 85 | @@ -XXX,XX +XXX,XX @@ static int intel_get_scanout_buffer(struct drm_plane *plane, | ||
| 86 | intel_fbdev_get_map(display->fbdev.fbdev, &panic_map); | ||
| 87 | } else { | ||
| 88 | /* Can't disable tiling if DPT is in use */ | ||
| 89 | - if (intel_fb_uses_dpt(fb)) | ||
| 90 | - return -EOPNOTSUPP; | ||
| 91 | + if (intel_fb_uses_dpt(fb)) { | ||
| 92 | + if (fb->format->cpp[0] != 4) | ||
| 93 | + return -EOPNOTSUPP; | ||
| 94 | + sb->set_pixel = intel_get_tiling_func(fb->modifier); | ||
| 95 | + if (!sb->set_pixel) | ||
| 96 | + return -EOPNOTSUPP; | ||
| 97 | + } | ||
| 98 | |||
| 99 | intel_bo_panic_map(obj, &panic_map); | ||
| 100 | } | ||
| 101 | @@ -XXX,XX +XXX,XX @@ static int intel_get_scanout_buffer(struct drm_plane *plane, | ||
| 102 | sb->map[0] = panic_map; | ||
| 103 | sb->width = fb->width; | ||
| 104 | sb->height = fb->height; | ||
| 105 | - sb->format = fb->format; | ||
| 106 | + /* Use the generic linear format, because tiling, RC, CCS, CC | ||
| 107 | + * will be disabled in disable_tiling() | ||
| 108 | + */ | ||
| 109 | + sb->format = drm_format_info(fb->format->format); | ||
| 110 | sb->pitch[0] = fb->pitches[0]; | ||
| 111 | |||
| 112 | return 0; | ||
| 113 | diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c | ||
| 114 | index XXXXXXX..XXXXXXX 100644 | ||
| 115 | --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c | ||
| 116 | +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c | ||
| 117 | @@ -XXX,XX +XXX,XX @@ static void skl_disable_tiling(struct intel_plane *plane) | ||
| 118 | { | ||
| 119 | struct intel_plane_state *state = to_intel_plane_state(plane->base.state); | ||
| 120 | struct intel_display *display = to_intel_display(plane); | ||
| 121 | - u32 stride = state->view.color_plane[0].scanout_stride / 64; | ||
| 122 | + const struct drm_framebuffer *fb = state->hw.fb; | ||
| 123 | u32 plane_ctl; | ||
| 124 | |||
| 125 | plane_ctl = intel_de_read(display, PLANE_CTL(plane->pipe, plane->id)); | ||
| 126 | - plane_ctl &= ~PLANE_CTL_TILED_MASK; | ||
| 127 | |||
| 128 | - intel_de_write_fw(display, PLANE_STRIDE(plane->pipe, plane->id), | ||
| 129 | - PLANE_STRIDE_(stride)); | ||
| 130 | + if (intel_fb_uses_dpt(fb)) { | ||
| 131 | + /* if DPT is enabled, keep tiling, but disable compression */ | ||
| 132 | + plane_ctl &= ~PLANE_CTL_RENDER_DECOMPRESSION_ENABLE; | ||
| 133 | + } else { | ||
| 134 | + /* if DPT is not supported, disable tiling, and update stride */ | ||
| 135 | + u32 stride = state->view.color_plane[0].scanout_stride / 64; | ||
| 136 | |||
| 137 | + plane_ctl &= ~PLANE_CTL_TILED_MASK; | ||
| 138 | + intel_de_write_fw(display, PLANE_STRIDE(plane->pipe, plane->id), | ||
| 139 | + PLANE_STRIDE_(stride)); | ||
| 140 | + } | ||
| 141 | intel_de_write_fw(display, PLANE_CTL(plane->pipe, plane->id), plane_ctl); | ||
| 142 | |||
| 143 | intel_de_write_fw(display, PLANE_SURF(plane->pipe, plane->id), | ||
| 144 | -- | ||
| 145 | 2.49.0 | diff view generated by jsdifflib |
New patch | |||
|---|---|---|---|
| 1 | On Alder Lake and later, it's not possible to disable tiling when DPT | ||
| 2 | is enabled. | ||
| 3 | So this commit implements 4-Tiling support, to still be able to draw | ||
| 4 | the panic screen. | ||
| 1 | 5 | ||
| 6 | Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> | ||
| 7 | --- | ||
| 8 | .../gpu/drm/i915/display/intel_atomic_plane.c | 22 ++++++++++++++++++- | ||
| 9 | 1 file changed, 21 insertions(+), 1 deletion(-) | ||
| 10 | |||
| 11 | diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c | ||
| 12 | index XXXXXXX..XXXXXXX 100644 | ||
| 13 | --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c | ||
| 14 | +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c | ||
| 15 | @@ -XXX,XX +XXX,XX @@ static void intel_ytile_set_pixel(struct drm_scanout_buffer *sb, unsigned int x, | ||
| 16 | iosys_map_wr(&sb->map[0], offset, u32, color); | ||
| 17 | } | ||
| 18 | |||
| 19 | +static void intel_4tile_set_pixel(struct drm_scanout_buffer *sb, unsigned int x, unsigned int y, | ||
| 20 | + u32 color) | ||
| 21 | +{ | ||
| 22 | + u32 offset; | ||
| 23 | + unsigned int swizzle; | ||
| 24 | + unsigned int width_in_blocks = DIV_ROUND_UP(sb->width, 32); | ||
| 25 | + | ||
| 26 | + /* Block offset */ | ||
| 27 | + offset = ((y / YTILE_HEIGHT) * width_in_blocks + (x / YTILE_WIDTH)) * YTILE_SIZE; | ||
| 28 | + | ||
| 29 | + x = x % YTILE_WIDTH; | ||
| 30 | + y = y % YTILE_HEIGHT; | ||
| 31 | + | ||
| 32 | + /* bit order inside a block is y4 y3 x4 y2 x3 x2 y1 y0 x1 x0 */ | ||
| 33 | + swizzle = (x & 3) | ((y & 3) << 2) | ((x & 0xc) << 2) | (y & 4) << 4 | ((x & 0x10) << 3) | ((y & 0x18) << 5); | ||
| 34 | + offset += swizzle * 4; | ||
| 35 | + iosys_map_wr(&sb->map[0], offset, u32, color); | ||
| 36 | +} | ||
| 37 | + | ||
| 38 | static void intel_panic_flush(struct drm_plane *plane) | ||
| 39 | { | ||
| 40 | struct intel_plane_state *plane_state = to_intel_plane_state(plane->state); | ||
| 41 | @@ -XXX,XX +XXX,XX @@ static void (*intel_get_tiling_func(u64 fb_modifier))(struct drm_scanout_buffer | ||
| 42 | case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: | ||
| 43 | case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS: | ||
| 44 | return intel_ytile_set_pixel; | ||
| 45 | - case I915_FORMAT_MOD_X_TILED: | ||
| 46 | case I915_FORMAT_MOD_4_TILED: | ||
| 47 | case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS: | ||
| 48 | case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS: | ||
| 49 | @@ -XXX,XX +XXX,XX @@ static void (*intel_get_tiling_func(u64 fb_modifier))(struct drm_scanout_buffer | ||
| 50 | case I915_FORMAT_MOD_4_TILED_MTL_MC_CCS: | ||
| 51 | case I915_FORMAT_MOD_4_TILED_BMG_CCS: | ||
| 52 | case I915_FORMAT_MOD_4_TILED_LNL_CCS: | ||
| 53 | + return intel_4tile_set_pixel; | ||
| 54 | + case I915_FORMAT_MOD_X_TILED: | ||
| 55 | case I915_FORMAT_MOD_Yf_TILED: | ||
| 56 | case I915_FORMAT_MOD_Yf_TILED_CCS: | ||
| 57 | default: | ||
| 58 | -- | ||
| 59 | 2.49.0 | diff view generated by jsdifflib |