[PATCH v4] docs/misra: document the expected sizes of integer types

Stefano Stabellini posted 1 patch 7 months, 3 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://gitlab.com/xen-project/patchew/xen tags/patchew/alpine.DEB.2.22.394.2404051144020.2245130@ubuntu-linux-20-04-desktop
docs/misra/C-language-toolchain.rst | 73 +++++++++++++++++++++++++++++
1 file changed, 73 insertions(+)
[PATCH v4] docs/misra: document the expected sizes of integer types
Posted by Stefano Stabellini 7 months, 3 weeks ago
Xen makes assumptions about the size of integer types on the various
architectures. Document these assumptions.

Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>
---
Changes in v4:
- list the architectures explicitly
- add ARMv7-A
---
 docs/misra/C-language-toolchain.rst | 73 +++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)

diff --git a/docs/misra/C-language-toolchain.rst b/docs/misra/C-language-toolchain.rst
index b7c2000992..5ddfe7bdbe 100644
--- a/docs/misra/C-language-toolchain.rst
+++ b/docs/misra/C-language-toolchain.rst
@@ -480,4 +480,77 @@ The table columns are as follows:
      - See Section "4.13 Preprocessing Directives" of GCC_MANUAL and Section "11.1 Implementation-defined behavior" of CPP_MANUAL.
 
 
+Sizes of Integer types
+______________________
+
+Xen expects System V ABI on x86_64:
+  https://gitlab.com/x86-psABIs/x86-64-ABI
+
+Xen expects AAPCS32 on ARMv8-A AArch32 and ARMv7-A:
+  https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst
+
+Xen expects AAPCS64 LP64 on ARMv8-A AArch64:
+  https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst
+
+A summary table of data types, sizes and alignment is below:
+
+.. list-table::
+   :widths: 10 10 10 45
+   :header-rows: 1
+
+   * - Type
+     - Size
+     - Alignment
+     - Architectures
+
+   * - char 
+     - 8 bits
+     - 8 bits
+     - x86_32, ARMv8-A AArch32, ARMv8-R AArch32, ARMv7-A, x86_64,
+       ARMv8-A AArch64, RV64, PPC64
+
+   * - short
+     - 16 bits
+     - 16 bits
+     - x86_32, ARMv8-A AArch32, ARMv8-R AArch32, ARMv7-A, x86_64,
+       ARMv8-A AArch64, RV64, PPC64
+
+   * - int
+     - 32 bits
+     - 32 bits
+     - x86_32, ARMv8-A AArch32, ARMv8-R AArch32, ARMv7-A, x86_64,
+       ARMv8-A AArch64, RV64, PPC64
+
+   * - long
+     - 32 bits
+     - 32 bits 
+     - x86_32, ARMv8-A AArch32, ARMv8-R AArch32, ARMv7-A
+
+   * - long
+     - 64 bits
+     - 64 bits 
+     - x86_64, ARMv8-A AArch64, RV64, PPC64
+
+   * - long long
+     - 64-bit
+     - 32-bit
+     - x86_32
+
+   * - long long
+     - 64-bit
+     - 64-bit
+     - x86_64, ARMv8-A AArch64, RV64, PPC64, ARMv8-A AArch32, ARMv8-R
+       AArch32, ARMv7-A
+
+   * - pointer
+     - 32-bit
+     - 32-bit
+     - x86_32, ARMv8-A AArch32, ARMv8-R AArch32, ARMv7-A
+
+   * - pointer
+     - 64-bit
+     - 64-bit
+     - x86_64, ARMv8-A AArch64, RV64, PPC64
+
+
 END OF DOCUMENT.
-- 
2.25.1
Re: [PATCH v4] docs/misra: document the expected sizes of integer types
Posted by Bertrand Marquis 7 months, 2 weeks ago
Hi Stefano,

> On 5 Apr 2024, at 20:44, Stefano Stabellini <sstabellini@kernel.org> wrote:
> 
> Xen makes assumptions about the size of integer types on the various
> architectures. Document these assumptions.
> 
> Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>

I think it is a good start and definitely better than having nothing documented so:

Acked-by: Bertrand Marquis <bertrand.marquis@arm.com>

Cheers
Bertrand

> ---
> Changes in v4:
> - list the architectures explicitly
> - add ARMv7-A
> ---
> docs/misra/C-language-toolchain.rst | 73 +++++++++++++++++++++++++++++
> 1 file changed, 73 insertions(+)
> 
> diff --git a/docs/misra/C-language-toolchain.rst b/docs/misra/C-language-toolchain.rst
> index b7c2000992..5ddfe7bdbe 100644
> --- a/docs/misra/C-language-toolchain.rst
> +++ b/docs/misra/C-language-toolchain.rst
> @@ -480,4 +480,77 @@ The table columns are as follows:
>      - See Section "4.13 Preprocessing Directives" of GCC_MANUAL and Section "11.1 Implementation-defined behavior" of CPP_MANUAL.
> 
> 
> +Sizes of Integer types
> +______________________
> +
> +Xen expects System V ABI on x86_64:
> +  https://gitlab.com/x86-psABIs/x86-64-ABI
> +
> +Xen expects AAPCS32 on ARMv8-A AArch32 and ARMv7-A:
> +  https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst
> +
> +Xen expects AAPCS64 LP64 on ARMv8-A AArch64:
> +  https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst
> +
> +A summary table of data types, sizes and alignment is below:
> +
> +.. list-table::
> +   :widths: 10 10 10 45
> +   :header-rows: 1
> +
> +   * - Type
> +     - Size
> +     - Alignment
> +     - Architectures
> +
> +   * - char 
> +     - 8 bits
> +     - 8 bits
> +     - x86_32, ARMv8-A AArch32, ARMv8-R AArch32, ARMv7-A, x86_64,
> +       ARMv8-A AArch64, RV64, PPC64
> +
> +   * - short
> +     - 16 bits
> +     - 16 bits
> +     - x86_32, ARMv8-A AArch32, ARMv8-R AArch32, ARMv7-A, x86_64,
> +       ARMv8-A AArch64, RV64, PPC64
> +
> +   * - int
> +     - 32 bits
> +     - 32 bits
> +     - x86_32, ARMv8-A AArch32, ARMv8-R AArch32, ARMv7-A, x86_64,
> +       ARMv8-A AArch64, RV64, PPC64
> +
> +   * - long
> +     - 32 bits
> +     - 32 bits 
> +     - x86_32, ARMv8-A AArch32, ARMv8-R AArch32, ARMv7-A
> +
> +   * - long
> +     - 64 bits
> +     - 64 bits 
> +     - x86_64, ARMv8-A AArch64, RV64, PPC64
> +
> +   * - long long
> +     - 64-bit
> +     - 32-bit
> +     - x86_32
> +
> +   * - long long
> +     - 64-bit
> +     - 64-bit
> +     - x86_64, ARMv8-A AArch64, RV64, PPC64, ARMv8-A AArch32, ARMv8-R
> +       AArch32, ARMv7-A
> +
> +   * - pointer
> +     - 32-bit
> +     - 32-bit
> +     - x86_32, ARMv8-A AArch32, ARMv8-R AArch32, ARMv7-A
> +
> +   * - pointer
> +     - 64-bit
> +     - 64-bit
> +     - x86_64, ARMv8-A AArch64, RV64, PPC64
> +
> +
> END OF DOCUMENT.
> -- 
> 2.25.1
> 
Re: [PATCH v4] docs/misra: document the expected sizes of integer types
Posted by Jan Beulich 7 months, 2 weeks ago
On 05.04.2024 20:44, Stefano Stabellini wrote:
> Xen makes assumptions about the size of integer types on the various
> architectures. Document these assumptions.
> 
> Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>

Thanks, I can live with this form. Yet I'm afraid I'm not happy enough
with it to offer an ack. I'm sure someone else will.

Jan