Change parameter name from 'ptr' to 'v' in the function definition thus
addressing violations of MISRA C:2012 Rule 8.3: "All declarations of an
object or function shall use the same names and type qualifiers".

No functional changes.

Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
---
Changes in v2:
  - added arm tag;
  - propagated change to arm32.
---
 xen/arch/arm/include/asm/arm32/atomic.h | 8 ++++----
 xen/arch/arm/include/asm/arm64/atomic.h | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/include/asm/arm32/atomic.h b/xen/arch/arm/include/asm/arm32/atomic.h
index 2832a72792..33f9e73b19 100644
--- a/xen/arch/arm/include/asm/arm32/atomic.h
+++ b/xen/arch/arm/include/asm/arm32/atomic.h
@@ -113,13 +113,13 @@ static inline void atomic_and(int m, atomic_t *v)
 	: "cc");
 }
 
-static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
+static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
 {
 	int oldval;
 	unsigned long res;
 
 	smp_mb();
-	prefetchw(&ptr->counter);
+	prefetchw(&v->counter);
 
 	do {
 		__asm__ __volatile__("@ atomic_cmpxchg\n"
@@ -127,8 +127,8 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
 		"mov	%0, #0\n"
 		"teq	%1, %4\n"
 		"strexeq %0, %5, [%3]\n"
-		    : "=&r" (res), "=&r" (oldval), "+Qo" (ptr->counter)
-		    : "r" (&ptr->counter), "Ir" (old), "r" (new)
+		    : "=&r" (res), "=&r" (oldval), "+Qo" (v->counter)
+		    : "r" (&v->counter), "Ir" (old), "r" (new)
 		    : "cc");
 	} while (res);
 
diff --git a/xen/arch/arm/include/asm/arm64/atomic.h b/xen/arch/arm/include/asm/arm64/atomic.h
index 2d42567866..4460165295 100644
--- a/xen/arch/arm/include/asm/arm64/atomic.h
+++ b/xen/arch/arm/include/asm/arm64/atomic.h
@@ -105,7 +105,7 @@ static inline void atomic_and(int m, atomic_t *v)
 	: "Ir" (m));
 }
 
-static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
+static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
 {
 	unsigned long tmp;
 	int oldval;
@@ -119,7 +119,7 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
 "	stxr	%w0, %w4, %2\n"
 "	cbnz	%w0, 1b\n"
 "2:"
-	: "=&r" (tmp), "=&r" (oldval), "+Q" (ptr->counter)
+	: "=&r" (tmp), "=&r" (oldval), "+Q" (v->counter)
 	: "Ir" (old), "r" (new)
 	: "cc");
 
-- 
2.34.1

On Mon, 24 Jul 2023, Federico Serafini wrote:
> Change parameter name from 'ptr' to 'v' in the function definition thus
> addressing violations of MISRA C:2012 Rule 8.3: "All declarations of an
> object or function shall use the same names and type qualifiers".
> 
> No functional changes.
> 
> Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>

Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>


> ---
> Changes in v2:
>   - added arm tag;
>   - propagated change to arm32.
> ---
>  xen/arch/arm/include/asm/arm32/atomic.h | 8 ++++----
>  xen/arch/arm/include/asm/arm64/atomic.h | 4 ++--
>  2 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/xen/arch/arm/include/asm/arm32/atomic.h b/xen/arch/arm/include/asm/arm32/atomic.h
> index 2832a72792..33f9e73b19 100644
> --- a/xen/arch/arm/include/asm/arm32/atomic.h
> +++ b/xen/arch/arm/include/asm/arm32/atomic.h
> @@ -113,13 +113,13 @@ static inline void atomic_and(int m, atomic_t *v)
>  	: "cc");
>  }
>  
> -static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
> +static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
>  {
>  	int oldval;
>  	unsigned long res;
>  
>  	smp_mb();
> -	prefetchw(&ptr->counter);
> +	prefetchw(&v->counter);
>  
>  	do {
>  		__asm__ __volatile__("@ atomic_cmpxchg\n"
> @@ -127,8 +127,8 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
>  		"mov	%0, #0\n"
>  		"teq	%1, %4\n"
>  		"strexeq %0, %5, [%3]\n"
> -		    : "=&r" (res), "=&r" (oldval), "+Qo" (ptr->counter)
> -		    : "r" (&ptr->counter), "Ir" (old), "r" (new)
> +		    : "=&r" (res), "=&r" (oldval), "+Qo" (v->counter)
> +		    : "r" (&v->counter), "Ir" (old), "r" (new)
>  		    : "cc");
>  	} while (res);
>  
> diff --git a/xen/arch/arm/include/asm/arm64/atomic.h b/xen/arch/arm/include/asm/arm64/atomic.h
> index 2d42567866..4460165295 100644
> --- a/xen/arch/arm/include/asm/arm64/atomic.h
> +++ b/xen/arch/arm/include/asm/arm64/atomic.h
> @@ -105,7 +105,7 @@ static inline void atomic_and(int m, atomic_t *v)
>  	: "Ir" (m));
>  }
>  
> -static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
> +static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
>  {
>  	unsigned long tmp;
>  	int oldval;
> @@ -119,7 +119,7 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
>  "	stxr	%w0, %w4, %2\n"
>  "	cbnz	%w0, 1b\n"
>  "2:"
> -	: "=&r" (tmp), "=&r" (oldval), "+Q" (ptr->counter)
> +	: "=&r" (tmp), "=&r" (oldval), "+Q" (v->counter)
>  	: "Ir" (old), "r" (new)
>  	: "cc");
>  
> -- 
> 2.34.1
>