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[PATCH v2] drm/xe: Limit sg segment size to PAGE_SIZE on Xen PV

Szymon Acedański posted 1 patch 1 week, 1 day ago 
drivers/gpu/drm/xe/xe_bo.h | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
[PATCH v2] drm/xe: Limit sg segment size to PAGE_SIZE on Xen PV
Posted by Szymon Acedański 1 week, 1 day ago 
Fix display corruption on Xen PV dom0, where DMA buffers are not
guaranteed machine-contiguous, in which case bounce buffering kicks
in, breaking xe's memory coherency assumptions.

Apply the same workaround i915 carries in i915_sg_segment_size() since
commit 78a07fe777c4 ("drm/i915: stop abusing swiotlb_max_segment").

Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Reported-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8382
Link: https://lore.kernel.org/xen-devel/aYtznP_tT6xNPwf-@mail-itl/
Link: https://lore.kernel.org/all/20221020110308.1582518-1-hch@lst.de/ # i915 counterpart
Cc: Christoph Hellwig <hch@lst.de>
Cc: Robert Beckett <bob.beckett@collabora.com>
Cc: stable@vger.kernel.org # v6.8+
Signed-off-by: Szymon Acedański <accek@invisiblethingslab.com>
---
v2:
 - Imperative language in the commit message (Thomas Hellström)
 - CC the authors of the original i915 workaround (Thomas Hellström)

 drivers/gpu/drm/xe/xe_bo.h | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
index 290ca62..341fa93 100644
--- a/drivers/gpu/drm/xe/xe_bo.h
+++ b/drivers/gpu/drm/xe/xe_bo.h
@@ -9,6 +9,8 @@
 #include <drm/drm_prime.h>
 #include <drm/ttm/ttm_tt.h>
 
+#include <xen/xen.h>
+
 #include "xe_bo_types.h"
 #include "xe_ggtt.h"
 #include "xe_macros.h"
@@ -574,6 +576,23 @@ static inline unsigned int xe_sg_segment_size(struct device *dev)
 	struct scatterlist __maybe_unused sg;
 	size_t max = BIT_ULL(sizeof(sg.length) * 8) - 1;
 
+	/*
+	 * For Xen PV guests pages aren't contiguous in DMA (machine) address
+	 * space.  The DMA API takes care of that both in dma_alloc_* (by
+	 * calling into the hypervisor to make the pages contiguous) and in
+	 * dma_map_* (by bounce buffering).  But xe (like i915, see commit
+	 * 78a07fe777c4) ignores the coherency aspects of the DMA API and thus
+	 * can't cope with bounce buffering actually happening, so add a hack
+	 * here to force small allocations and mappings when running in PV
+	 * mode on Xen.
+	 *
+	 * Note this will still break if bounce buffering is required for other
+	 * reasons, like confidential computing hypervisors or PCIe root ports
+	 * with addressing limitations.
+	 */
+	if (xen_pv_domain())
+		return PAGE_SIZE;
+
 	max = min_t(size_t, max, dma_max_mapping_size(dev));
 
 	/*

base-commit: baafc300cd079a5210c1e70e5ea3d93518e40b38
-- 
2.53.0
Re: [PATCH v2] drm/xe: Limit sg segment size to PAGE_SIZE on Xen PV
Posted by Thomas Hellström 3 days, 4 hours ago 
On Wed, 2026-09-16 at 19:30 +0200, Szymon Acedański wrote:
> Fix display corruption on Xen PV dom0, where DMA buffers are not
> guaranteed machine-contiguous, in which case bounce buffering kicks
> in, breaking xe's memory coherency assumptions.
> 
> Apply the same workaround i915 carries in i915_sg_segment_size()
> since
> commit 78a07fe777c4 ("drm/i915: stop abusing swiotlb_max_segment").
> 
> Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel
> GPUs")
> Reported-by: Marek Marczykowski-Górecki
> <marmarek@invisiblethingslab.com>
> Closes:
> https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8382
> Link: https://lore.kernel.org/xen-devel/aYtznP_tT6xNPwf-@mail-itl/
> Link:
> https://lore.kernel.org/all/20221020110308.1582518-1-hch@lst.de/ #
> i915 counterpart
> Cc: Christoph Hellwig <hch@lst.de>
> Cc: Robert Beckett <bob.beckett@collabora.com>
> Cc: stable@vger.kernel.org # v6.8+
> Signed-off-by: Szymon Acedański <accek@invisiblethingslab.com>
> ---
> v2:
>  - Imperative language in the commit message (Thomas Hellström)
>  - CC the authors of the original i915 workaround (Thomas Hellström)

Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>


> 
>  drivers/gpu/drm/xe/xe_bo.h | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
> index 290ca62..341fa93 100644
> --- a/drivers/gpu/drm/xe/xe_bo.h
> +++ b/drivers/gpu/drm/xe/xe_bo.h
> @@ -9,6 +9,8 @@
>  #include <drm/drm_prime.h>
>  #include <drm/ttm/ttm_tt.h>
>  
> +#include <xen/xen.h>
> +
>  #include "xe_bo_types.h"
>  #include "xe_ggtt.h"
>  #include "xe_macros.h"
> @@ -574,6 +576,23 @@ static inline unsigned int
> xe_sg_segment_size(struct device *dev)
>  	struct scatterlist __maybe_unused sg;
>  	size_t max = BIT_ULL(sizeof(sg.length) * 8) - 1;
>  
> +	/*
> +	 * For Xen PV guests pages aren't contiguous in DMA
> (machine) address
> +	 * space.  The DMA API takes care of that both in
> dma_alloc_* (by
> +	 * calling into the hypervisor to make the pages contiguous)
> and in
> +	 * dma_map_* (by bounce buffering).  But xe (like i915, see
> commit
> +	 * 78a07fe777c4) ignores the coherency aspects of the DMA
> API and thus
> +	 * can't cope with bounce buffering actually happening, so
> add a hack
> +	 * here to force small allocations and mappings when running
> in PV
> +	 * mode on Xen.
> +	 *
> +	 * Note this will still break if bounce buffering is
> required for other
> +	 * reasons, like confidential computing hypervisors or PCIe
> root ports
> +	 * with addressing limitations.
> +	 */
> +	if (xen_pv_domain())
> +		return PAGE_SIZE;
> +
>  	max = min_t(size_t, max, dma_max_mapping_size(dev));
>  
>  	/*
> 
> base-commit: baafc300cd079a5210c1e70e5ea3d93518e40b38
Re: [PATCH v2] drm/xe: Limit sg segment size to PAGE_SIZE on Xen PV
Posted by Thomas Hellström 3 days, 3 hours ago 
On Mon, 2026-09-21 at 15:57 +0200, Thomas Hellström wrote:
> On Wed, 2026-09-16 at 19:30 +0200, Szymon Acedański wrote:
> > Fix display corruption on Xen PV dom0, where DMA buffers are not
> > guaranteed machine-contiguous, in which case bounce buffering kicks
> > in, breaking xe's memory coherency assumptions.
> > 
> > Apply the same workaround i915 carries in i915_sg_segment_size()
> > since
> > commit 78a07fe777c4 ("drm/i915: stop abusing swiotlb_max_segment").
> > 
> > Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel
> > GPUs")
> > Reported-by: Marek Marczykowski-Górecki
> > <marmarek@invisiblethingslab.com>
> > Closes:
> > https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8382
> > Link: https://lore.kernel.org/xen-devel/aYtznP_tT6xNPwf-@mail-itl/
> > Link:
> > https://lore.kernel.org/all/20221020110308.1582518-1-hch@lst.de/ #
> > i915 counterpart
> > Cc: Christoph Hellwig <hch@lst.de>
> > Cc: Robert Beckett <bob.beckett@collabora.com>
> > Cc: stable@vger.kernel.org # v6.8+
> > Signed-off-by: Szymon Acedański <accek@invisiblethingslab.com>
> > ---
> > v2:
> >  - Imperative language in the commit message (Thomas Hellström)
> >  - CC the authors of the original i915 workaround (Thomas
> > Hellström)
> 
> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>

Pushed to drm-xe-next. Thanks.

/Thomas


> 
> 
> > 
> >  drivers/gpu/drm/xe/xe_bo.h | 19 +++++++++++++++++++
> >  1 file changed, 19 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_bo.h
> > b/drivers/gpu/drm/xe/xe_bo.h
> > index 290ca62..341fa93 100644
> > --- a/drivers/gpu/drm/xe/xe_bo.h
> > +++ b/drivers/gpu/drm/xe/xe_bo.h
> > @@ -9,6 +9,8 @@
> >  #include <drm/drm_prime.h>
> >  #include <drm/ttm/ttm_tt.h>
> >  
> > +#include <xen/xen.h>
> > +
> >  #include "xe_bo_types.h"
> >  #include "xe_ggtt.h"
> >  #include "xe_macros.h"
> > @@ -574,6 +576,23 @@ static inline unsigned int
> > xe_sg_segment_size(struct device *dev)
> >  	struct scatterlist __maybe_unused sg;
> >  	size_t max = BIT_ULL(sizeof(sg.length) * 8) - 1;
> >  
> > +	/*
> > +	 * For Xen PV guests pages aren't contiguous in DMA
> > (machine) address
> > +	 * space.  The DMA API takes care of that both in
> > dma_alloc_* (by
> > +	 * calling into the hypervisor to make the pages
> > contiguous)
> > and in
> > +	 * dma_map_* (by bounce buffering).  But xe (like i915,
> > see
> > commit
> > +	 * 78a07fe777c4) ignores the coherency aspects of the DMA
> > API and thus
> > +	 * can't cope with bounce buffering actually happening, so
> > add a hack
> > +	 * here to force small allocations and mappings when
> > running
> > in PV
> > +	 * mode on Xen.
> > +	 *
> > +	 * Note this will still break if bounce buffering is
> > required for other
> > +	 * reasons, like confidential computing hypervisors or
> > PCIe
> > root ports
> > +	 * with addressing limitations.
> > +	 */
> > +	if (xen_pv_domain())
> > +		return PAGE_SIZE;
> > +
> >  	max = min_t(size_t, max, dma_max_mapping_size(dev));
> >  
> >  	/*
> > 
> > base-commit: baafc300cd079a5210c1e70e5ea3d93518e40b38

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