xen/drivers/char/ns16550.c | 23 +++++++++++++++++++++++ xen/include/xen/pci_ids.h | 2 ++ 2 files changed, 25 insertions(+)
Add support for the WCH (Nanjing Qinheng Microelectronics Co., Ltd.)
CH382 PCIe dual port serial adapter. The CH382 is available in two
variants:
- CH382 2S [1c00:3253]: 2 serial ports
- CH382 2S1P [1c00:3250]: 2 serial ports + 1 parallel port
This chip uses IO BAR0, base baud rate 115200, ports starting at offset
0xc0 and spaced 8 bytes apart, and a 256-byte FIFO. [1]
[1] https://www.wch-ic.com/downloads/CH382DS1_PDF.html
Signed-off-by: Jiaqing Zhao <Zhao.Jiaqing@amd.com>
---
xen/drivers/char/ns16550.c | 23 +++++++++++++++++++++++
xen/include/xen/pci_ids.h | 2 ++
2 files changed, 25 insertions(+)
diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c
index 878da27f2e..106ef56316 100644
--- a/xen/drivers/char/ns16550.c
+++ b/xen/drivers/char/ns16550.c
@@ -95,6 +95,7 @@ struct ns16550_config {
param_exar_xr17v354,
param_exar_xr17v358,
param_intel_lpss,
+ param_wch_ch382,
} param;
};
@@ -861,6 +862,16 @@ static const struct ns16550_config_param __initconst uart_param[] = {
.mmio = 1,
.max_ports = 1,
},
+ [param_wch_ch382] = {
+ .base_baud = 115200,
+ .first_offset = 0xc0,
+ .uart_offset = 8,
+ .reg_width = 1,
+ .fifo_size = 256,
+ .lsr_mask = UART_LSR_THRE,
+ .bar0 = 1,
+ .max_ports = 2,
+ },
};
static const struct ns16550_config __initconst uart_config[] =
@@ -1189,6 +1200,18 @@ static const struct ns16550_config __initconst uart_config[] =
.dev_id = 0x7adc,
.param = param_intel_lpss
},
+ /* WCH CH382 2S */
+ {
+ .vendor_id = PCI_VENDOR_ID_WCH,
+ .dev_id = 0x3253,
+ .param = param_wch_ch382
+ },
+ /* WCH CH382 2S1P */
+ {
+ .vendor_id = PCI_VENDOR_ID_WCH,
+ .dev_id = 0x3250,
+ .param = param_wch_ch382
+ },
};
static int __init
diff --git a/xen/include/xen/pci_ids.h b/xen/include/xen/pci_ids.h
index 5884a20b8f..b8316d464c 100644
--- a/xen/include/xen/pci_ids.h
+++ b/xen/include/xen/pci_ids.h
@@ -13,6 +13,8 @@
#define PCI_VENDOR_ID_BROADCOM 0x14e4
+#define PCI_VENDOR_ID_WCH 0x1c00
+
#define PCI_VENDOR_ID_INTEL 0x8086
#endif /* XEN_PCI_IDS_H */
--
2.53.0
On Fri, 8 May 2026, Jiaqing Zhao wrote:
> Add support for the WCH (Nanjing Qinheng Microelectronics Co., Ltd.)
> CH382 PCIe dual port serial adapter. The CH382 is available in two
> variants:
> - CH382 2S [1c00:3253]: 2 serial ports
> - CH382 2S1P [1c00:3250]: 2 serial ports + 1 parallel port
>
> This chip uses IO BAR0, base baud rate 115200, ports starting at offset
> 0xc0 and spaced 8 bytes apart, and a 256-byte FIFO. [1]
>
> [1] https://www.wch-ic.com/downloads/CH382DS1_PDF.html
>
> Signed-off-by: Jiaqing Zhao <Zhao.Jiaqing@amd.com>
WCH has a few PCI vendor IDs, including 0x1c00 and also 0x4348. Linux
distinguishes them as PCI_VENDOR_ID_WCHIC = 0x1c00 and
PCI_VENDOR_ID_WCHCN = 0x4348. It would probably be better to rename
PCI_VENDOR_ID_WCH to PCI_VENDOR_ID_WCHIC in this patch.
Everything else looks good.
> ---
> xen/drivers/char/ns16550.c | 23 +++++++++++++++++++++++
> xen/include/xen/pci_ids.h | 2 ++
> 2 files changed, 25 insertions(+)
>
> diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c
> index 878da27f2e..106ef56316 100644
> --- a/xen/drivers/char/ns16550.c
> +++ b/xen/drivers/char/ns16550.c
> @@ -95,6 +95,7 @@ struct ns16550_config {
> param_exar_xr17v354,
> param_exar_xr17v358,
> param_intel_lpss,
> + param_wch_ch382,
> } param;
> };
> @@ -862,6 +862,16 @@ static const struct ns16550_config_param __initconst uart_param[] = {
> .mmio = 1,
> .max_ports = 1,
> },
> + [param_wch_ch382] = {
> + .base_baud = 115200,
> + .first_offset = 0xc0,
> + .uart_offset = 8,
> + .reg_width = 1,
> + .fifo_size = 256,
> + .lsr_mask = UART_LSR_THRE,
> + .bar0 = 1,
> + .max_ports = 2,
> + },
> };
>
> static const struct ns16550_config __initconst uart_config[] =
> @@ -1189,6 +1200,18 @@ static const struct ns16550_config __initconst uart_config[] =
> .dev_id = 0x7adc,
> .param = param_intel_lpss
> },
> + /* WCH CH382 2S */
> + {
> + .vendor_id = PCI_VENDOR_ID_WCH,
> + .dev_id = 0x3253,
> + .param = param_wch_ch382
> + },
> + /* WCH CH382 2S1P */
> + {
> + .vendor_id = PCI_VENDOR_ID_WCH,
> + .dev_id = 0x3250,
> + .param = param_wch_ch382
> + },
> };
>
> static int __init
> diff --git a/xen/include/xen/pci_ids.h b/xen/include/xen/pci_ids.h
> index 5884a20b8f..b8316d464c 100644
> --- a/xen/include/xen/pci_ids.h
> +++ b/xen/include/xen/pci_ids.h
> @@ -13,6 +13,8 @@
>
> #define PCI_VENDOR_ID_BROADCOM 0x14e4
>
> +#define PCI_VENDOR_ID_WCH 0x1c00
> +
> #define PCI_VENDOR_ID_INTEL 0x8086
>
> #endif /* XEN_PCI_IDS_H */
> --
> 2.53.0
>
On Fri, May 08, 2026 at 05:28:13PM +0800, Jiaqing Zhao wrote:
> Add support for the WCH (Nanjing Qinheng Microelectronics Co., Ltd.)
> CH382 PCIe dual port serial adapter. The CH382 is available in two
> variants:
> - CH382 2S [1c00:3253]: 2 serial ports
> - CH382 2S1P [1c00:3250]: 2 serial ports + 1 parallel port
>
> This chip uses IO BAR0, base baud rate 115200, ports starting at offset
> 0xc0 and spaced 8 bytes apart, and a 256-byte FIFO. [1]
>
> [1] https://www.wch-ic.com/downloads/CH382DS1_PDF.html
>
> Signed-off-by: Jiaqing Zhao <Zhao.Jiaqing@amd.com>
> ---
> xen/drivers/char/ns16550.c | 23 +++++++++++++++++++++++
> xen/include/xen/pci_ids.h | 2 ++
> 2 files changed, 25 insertions(+)
>
> diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c
> index 878da27f2e..106ef56316 100644
> --- a/xen/drivers/char/ns16550.c
> +++ b/xen/drivers/char/ns16550.c
> @@ -95,6 +95,7 @@ struct ns16550_config {
> param_exar_xr17v354,
> param_exar_xr17v358,
> param_intel_lpss,
> + param_wch_ch382,
> } param;
> };
>
> @@ -861,6 +862,16 @@ static const struct ns16550_config_param __initconst uart_param[] = {
> .mmio = 1,
> .max_ports = 1,
> },
> + [param_wch_ch382] = {
> + .base_baud = 115200,
> + .first_offset = 0xc0,
> + .uart_offset = 8,
> + .reg_width = 1,
> + .fifo_size = 256,
> + .lsr_mask = UART_LSR_THRE,
> + .bar0 = 1,
> + .max_ports = 2,
> + },
> };
>
> static const struct ns16550_config __initconst uart_config[] =
> @@ -1189,6 +1200,18 @@ static const struct ns16550_config __initconst uart_config[] =
> .dev_id = 0x7adc,
> .param = param_intel_lpss
> },
> + /* WCH CH382 2S */
> + {
> + .vendor_id = PCI_VENDOR_ID_WCH,
> + .dev_id = 0x3253,
> + .param = param_wch_ch382
> + },
> + /* WCH CH382 2S1P */
> + {
> + .vendor_id = PCI_VENDOR_ID_WCH,
> + .dev_id = 0x3250,
> + .param = param_wch_ch382
> + },
Suggest to keep the records sorted by .dev_id field.
With that:
Reviewed-by: Denis Mukhin <dmukhin@ford.com>
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