[PATCH v v3 1/7] x86: relax some CPU checks for non-64 bit CPUs

Kevin Lampis posted 7 patches 1 week, 3 days ago
[PATCH v v3 1/7] x86: relax some CPU checks for non-64 bit CPUs
Posted by Kevin Lampis 1 week, 3 days ago
These checks were guarding against non-64 bit CPU models but they are
not supported by Xen anymore so the checks are no longer needed.

The switch statement was removed from mcheck_init()
to support Intel family 18/19.

Signed-off-by: Kevin Lampis <kevin.lampis@citrix.com>
---
Changes in v2:
- New patch based on review comments

Changes in v3:
- Moved patch to front of the series
---
 xen/arch/x86/acpi/cpu_idle.c    | 5 ++---
 xen/arch/x86/cpu/mcheck/mce.c   | 8 +-------
 xen/arch/x86/cpu/mtrr/generic.c | 3 +--
 3 files changed, 4 insertions(+), 12 deletions(-)

diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c
index 0b3d0631dd..46749ca337 100644
--- a/xen/arch/x86/acpi/cpu_idle.c
+++ b/xen/arch/x86/acpi/cpu_idle.c
@@ -1059,9 +1059,8 @@ static void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flag
      * is not required while entering C3 type state on
      * P4, Core and beyond CPUs
      */
-    if ( c->x86_vendor == X86_VENDOR_INTEL &&
-        (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 14)) )
-            flags->bm_control = 0;
+    if ( c->x86_vendor == X86_VENDOR_INTEL )
+        flags->bm_control = 0;
 }
 
 #define VENDOR_INTEL                   (1)
diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c
index 9a91807cfb..c4b3b687a2 100644
--- a/xen/arch/x86/cpu/mcheck/mce.c
+++ b/xen/arch/x86/cpu/mcheck/mce.c
@@ -777,13 +777,7 @@ void mcheck_init(struct cpuinfo_x86 *c, bool bsp)
 
 #ifdef CONFIG_INTEL
     case X86_VENDOR_INTEL:
-        switch ( c->x86 )
-        {
-        case 6:
-        case 15:
-            inited = intel_mcheck_init(c, bsp);
-            break;
-        }
+        inited = intel_mcheck_init(c, bsp);
         break;
 #endif
 
diff --git a/xen/arch/x86/cpu/mtrr/generic.c b/xen/arch/x86/cpu/mtrr/generic.c
index c587e9140e..0ca6a2083f 100644
--- a/xen/arch/x86/cpu/mtrr/generic.c
+++ b/xen/arch/x86/cpu/mtrr/generic.c
@@ -218,8 +218,7 @@ static void __init print_mtrr_state(const char *level)
 			printk("%s  %u disabled\n", level, i);
 	}
 
-	if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
-	     boot_cpu_data.x86 >= 0xf) ||
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
 	     boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
 		uint64_t syscfg, tom2;
 
-- 
2.51.1
Re: [PATCH v v3 1/7] x86: relax some CPU checks for non-64 bit CPUs
Posted by Jan Beulich 10 hours ago
On 13.03.2026 17:36, Kevin Lampis wrote:
> These checks were guarding against non-64 bit CPU models but they are
> not supported by Xen anymore so the checks are no longer needed.
> 
> The switch statement was removed from mcheck_init()
> to support Intel family 18/19.
> 
> Signed-off-by: Kevin Lampis <kevin.lampis@citrix.com>

Reviewed-by: Jan Beulich <jbeulich@suse.com>