GCC 5.1 is the minimum supported toolchain version now. Drop the workaround
for the PIC hard register in earlier versions.
No functional change.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Nicola Vetrini <nicola.vetrini@gmail.com>
Noticed when reviewing the other GCC cleanup.
---
xen/include/xen/lib/x86/cpu-policy.h | 35 ++++------------------------
1 file changed, 4 insertions(+), 31 deletions(-)
diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86/cpu-policy.h
index dd204a825b07..f94f23e159d2 100644
--- a/xen/include/xen/lib/x86/cpu-policy.h
+++ b/xen/include/xen/lib/x86/cpu-policy.h
@@ -29,45 +29,18 @@ struct cpuid_leaf
uint32_t a, b, c, d;
};
-/*
- * Versions of GCC before 5 unconditionally reserve %rBX as the PIC hard
- * register, and are unable to cope with spilling it. This results in a
- * rather cryptic error:
- * error: inconsistent operand constraints in an ‘asm’
- *
- * In affected situations, work around the issue by using a separate register
- * to hold the the %rBX output, and xchg twice to leave %rBX preserved around
- * the asm() statement.
- */
-#if defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && defined(__i386__)
-# define XCHG_BX "xchg %%ebx, %[bx];"
-# define BX_CON [bx] "=&r"
-#elif defined(__PIC__) && __GNUC__ < 5 && !defined(__clang__) && \
- defined(__x86_64__) && (defined(__code_model_medium__) || \
- defined(__code_model_large__))
-# define XCHG_BX "xchg %%rbx, %q[bx];"
-# define BX_CON [bx] "=&r"
-#else
-# define XCHG_BX ""
-# define BX_CON "=&b"
-#endif
-
static inline void cpuid_leaf(uint32_t leaf, struct cpuid_leaf *l)
{
- asm ( XCHG_BX
- "cpuid;"
- XCHG_BX
- : "=a" (l->a), BX_CON (l->b), "=&c" (l->c), "=&d" (l->d)
+ asm ( "cpuid"
+ : "=a" (l->a), "=b" (l->b), "=c" (l->c), "=d" (l->d)
: "a" (leaf) );
}
static inline void cpuid_count_leaf(
uint32_t leaf, uint32_t subleaf, struct cpuid_leaf *l)
{
- asm ( XCHG_BX
- "cpuid;"
- XCHG_BX
- : "=a" (l->a), BX_CON (l->b), "=c" (l->c), "=&d" (l->d)
+ asm ( "cpuid"
+ : "=a" (l->a), "=b" (l->b), "=c" (l->c), "=d" (l->d)
: "a" (leaf), "c" (subleaf) );
}
--
2.39.5