[v2] x86/vlapic: Fixes to APIC_ESR handling

[PATCH v2 0/2] x86/vlapic: Fixes to APIC_ESR handling

Andrew Cooper posted 2 patches 5 days, 20 hours ago

Diff against v1
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Patches applied successfully (tree, apply log)
git fetch https://gitlab.com/xen-project/patchew/xen tags/patchew/20250303185352.86499-1-andrew.cooper3@citrix.com

xen/arch/x86/hvm/vlapic.c              | 34 ++++++++++++++------------
xen/arch/x86/include/asm/hvm/vlapic.h  |  1 -
xen/include/public/arch-x86/hvm/save.h |  1 +
3 files changed, 19 insertions(+), 17 deletions(-)

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[PATCH v2 0/2] x86/vlapic: Fixes to APIC_ESR handling

Posted by Andrew Cooper 5 days, 20 hours ago

Found because of yesterday's Pentium errata fun, and trying to
complete/publish the XSA-462 PoC.

v2 has involved substantial CPU archeology, but has confirmed that the
LVTERR delivery behaviour is implementation specific, and therefore
Xen is fine to stay with it's current behaviour.

Andrew Cooper (2):
  x86/vlapic: Fix handling of writes to APIC_ESR
  x86/vlapic: Drop vlapic->esr_lock

 xen/arch/x86/hvm/vlapic.c              | 34 ++++++++++++++------------
 xen/arch/x86/include/asm/hvm/vlapic.h  |  1 -
 xen/include/public/arch-x86/hvm/save.h |  1 +
 3 files changed, 19 insertions(+), 17 deletions(-)

-- 
2.34.1