Shared caches in multi-core CPU architectures represent a problem for
predictability of memory access latency. This jeopardizes applicability
of many Arm platform in real-time critical and mixed-criticality
scenarios. We introduce support for cache partitioning with page
coloring, a transparent software technique that enables isolation
between domains and Xen, and thus avoids cache interference.

When creating a domain, a simple syntax (e.g. `0-3` or `4-11`) allows
the user to define assignments of cache partitions ids, called colors,
where assigning different colors guarantees no mutual eviction on cache
will ever happen. This instructs the Xen memory allocator to provide
the i-th color assignee only with pages that maps to color i, i.e. that
are indexed in the i-th cache partition.

The proposed implementation supports the dom0less feature.
The proposed implementation doesn't support the static-mem feature.
The solution has been tested in several scenarios, including Xilinx Zynq
MPSoCs.

Carlo Nonato (11):
  xen/common: add cache coloring common code
  xen/arm: add initial support for LLC coloring on arm64
  xen/arm: permit non direct-mapped Dom0 construction
  xen/arm: add Dom0 cache coloring support
  xen: extend domctl interface for cache coloring
  tools: add support for cache coloring configuration
  xen/arm: add support for cache coloring configuration via device-tree
  xen/page_alloc: introduce preserved page flags macro
  xen: add cache coloring allocator for domains
  xen/arm: make consider_modules() available for xen relocation
  xen/arm: add cache coloring support for Xen image

Luca Miccio (1):
  xen/arm: add Xen cache colors command line parameter

 SUPPORT.md                              |   7 +
 docs/index.rst                          |   1 +
 docs/man/xl.cfg.5.pod.in                |   6 +
 docs/misc/arm/device-tree/booting.txt   |   5 +
 docs/misc/cache-coloring.rst            | 248 +++++++++++++++
 docs/misc/xen-command-line.pandoc       |  72 +++++
 tools/golang/xenlight/helpers.gen.go    |  16 +
 tools/golang/xenlight/types.gen.go      |   1 +
 tools/include/libxl.h                   |   5 +
 tools/include/xenctrl.h                 |   9 +
 tools/libs/ctrl/xc_domain.c             |  34 ++
 tools/libs/light/libxl_create.c         |  18 ++
 tools/libs/light/libxl_types.idl        |   1 +
 tools/xl/xl_parse.c                     |  38 ++-
 xen/arch/arm/Kconfig                    |   1 +
 xen/arch/arm/Makefile                   |   1 +
 xen/arch/arm/alternative.c              |  26 +-
 xen/arch/arm/arm32/mmu/mm.c             |  95 +-----
 xen/arch/arm/arm64/mmu/head.S           |  58 +++-
 xen/arch/arm/arm64/mmu/mm.c             |  34 ++
 xen/arch/arm/dom0less-build.c           |  60 +---
 xen/arch/arm/domain_build.c             | 165 +++++++++-
 xen/arch/arm/include/asm/domain_build.h |   1 +
 xen/arch/arm/include/asm/mm.h           |   5 +
 xen/arch/arm/include/asm/mmu/layout.h   |   3 +
 xen/arch/arm/include/asm/mmu/mm.h       |   1 +
 xen/arch/arm/include/asm/processor.h    |  15 +
 xen/arch/arm/include/asm/setup.h        |   3 +
 xen/arch/arm/llc-coloring.c             | 142 +++++++++
 xen/arch/arm/mmu/setup.c                | 201 +++++++++++-
 xen/arch/arm/setup.c                    |  13 +-
 xen/common/Kconfig                      |  29 ++
 xen/common/Makefile                     |   1 +
 xen/common/domain.c                     |   3 +
 xen/common/domctl.c                     |  10 +
 xen/common/keyhandler.c                 |   3 +
 xen/common/llc-coloring.c               | 393 ++++++++++++++++++++++++
 xen/common/page_alloc.c                 | 200 +++++++++++-
 xen/include/public/domctl.h             |   9 +
 xen/include/xen/llc-coloring.h          |  65 ++++
 xen/include/xen/sched.h                 |   5 +
 xen/include/xen/xmalloc.h               |  12 +
 42 files changed, 1846 insertions(+), 169 deletions(-)
 create mode 100644 docs/misc/cache-coloring.rst
 create mode 100644 xen/arch/arm/llc-coloring.c
 create mode 100644 xen/common/llc-coloring.c
 create mode 100644 xen/include/xen/llc-coloring.h

-- 
2.43.0

On 17/12/2024 18:06, Carlo Nonato wrote:
> 
> 
> Shared caches in multi-core CPU architectures represent a problem for
> predictability of memory access latency. This jeopardizes applicability
> of many Arm platform in real-time critical and mixed-criticality
> scenarios. We introduce support for cache partitioning with page
> coloring, a transparent software technique that enables isolation
> between domains and Xen, and thus avoids cache interference.
> 
> When creating a domain, a simple syntax (e.g. `0-3` or `4-11`) allows
> the user to define assignments of cache partitions ids, called colors,
> where assigning different colors guarantees no mutual eviction on cache
> will ever happen. This instructs the Xen memory allocator to provide
> the i-th color assignee only with pages that maps to color i, i.e. that
> are indexed in the i-th cache partition.
> 
> The proposed implementation supports the dom0less feature.
> The proposed implementation doesn't support the static-mem feature.
> The solution has been tested in several scenarios, including Xilinx Zynq
> MPSoCs.
> 
> Carlo Nonato (11):
>   xen/common: add cache coloring common code
>   xen/arm: add initial support for LLC coloring on arm64
>   xen/arm: permit non direct-mapped Dom0 construction
>   xen/arm: add Dom0 cache coloring support
>   xen: extend domctl interface for cache coloring
>   tools: add support for cache coloring configuration
>   xen/arm: add support for cache coloring configuration via device-tree
>   xen/page_alloc: introduce preserved page flags macro
>   xen: add cache coloring allocator for domains
>   xen/arm: make consider_modules() available for xen relocation
>   xen/arm: add cache coloring support for Xen image
> 
> Luca Miccio (1):
>   xen/arm: add Xen cache colors command line parameter
The series is now committed. Thanks.

It's definitely a change that wants mentioning in CHANGELOG. I'll send a patch
to add a note shortly.

~Michal

On Fri, Dec 20, 2024 at 8:34 AM Michal Orzel <michal.orzel@amd.com> wrote:
>
> On 17/12/2024 18:06, Carlo Nonato wrote:
> >
> > Shared caches in multi-core CPU architectures represent a problem for
> > predictability of memory access latency. This jeopardizes applicability
> > of many Arm platform in real-time critical and mixed-criticality
> > scenarios. We introduce support for cache partitioning with page
> > coloring, a transparent software technique that enables isolation
> > between domains and Xen, and thus avoids cache interference.
> >
> > When creating a domain, a simple syntax (e.g. `0-3` or `4-11`) allows
> > the user to define assignments of cache partitions ids, called colors,
> > where assigning different colors guarantees no mutual eviction on cache
> > will ever happen. This instructs the Xen memory allocator to provide
> > the i-th color assignee only with pages that maps to color i, i.e. that
> > are indexed in the i-th cache partition.
> >
> > The proposed implementation supports the dom0less feature.
> > The proposed implementation doesn't support the static-mem feature.
> > The solution has been tested in several scenarios, including Xilinx Zynq
> > MPSoCs.
> >
> > Carlo Nonato (11):
> >   xen/common: add cache coloring common code
> >   xen/arm: add initial support for LLC coloring on arm64
> >   xen/arm: permit non direct-mapped Dom0 construction
> >   xen/arm: add Dom0 cache coloring support
> >   xen: extend domctl interface for cache coloring
> >   tools: add support for cache coloring configuration
> >   xen/arm: add support for cache coloring configuration via device-tree
> >   xen/page_alloc: introduce preserved page flags macro
> >   xen: add cache coloring allocator for domains
> >   xen/arm: make consider_modules() available for xen relocation
> >   xen/arm: add cache coloring support for Xen image
> >
> > Luca Miccio (1):
> >   xen/arm: add Xen cache colors command line parameter
> The series is now committed. Thanks.
>
> It's definitely a change that wants mentioning in CHANGELOG. I'll send a patch
> to add a note shortly.

Grazie (thanks in italian), to you and the other maintainers that helped.

- Carlo