This continues prior work done for PPC and RISCV.  Patches 1-4 are some header
rearranging for x86, with the convenient side effect of letting ARM fall out
in the wash in patch 5.

I've done a reasonable amount of Gitlab CI work, but I cant claim to have
tried every possible combination.  RANDCONFIG might find some transitive paths
I haven't spotted.

Andrew Cooper (5):
  x86/build: Rework includes in genapic/probe.c
  xen/build: Drop unused includes of xen/cache.h
  x86/build: Swap cache.h includes for xen/sections.h
  x86/cache: Drop legacy __read_mostly/__ro_after_init definitions
  ARM/cache: Drop legacy __read_mostly/__ro_after_init definitions

 xen/arch/arm/include/asm/cache.h     |  3 ---
 xen/arch/x86/acpi/cpu_idle.c         |  3 ++-
 xen/arch/x86/bzimage.c               |  1 -
 xen/arch/x86/cpu-policy.c            |  2 +-
 xen/arch/x86/dmi_scan.c              |  1 -
 xen/arch/x86/genapic/probe.c         | 34 +++++++++++++---------------
 xen/arch/x86/guest/hypervisor.c      |  2 +-
 xen/arch/x86/include/asm/cache.h     |  3 ---
 xen/arch/x86/include/asm/genapic.h   |  2 ++
 xen/arch/x86/include/asm/processor.h |  1 -
 xen/common/decompress.h              |  1 -
 xen/common/efi/runtime.c             |  3 ++-
 xen/include/acpi/platform/aclinux.h  |  1 -
 xen/include/xen/cache.h              |  5 ----
 xen/include/xen/lib.h                |  1 +
 xen/include/xen/rcupdate.h           |  1 -
 16 files changed, 25 insertions(+), 39 deletions(-)

-- 
2.39.2