This allows for marginally better code generation including the use of BT
rather than SHR/TEST.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
---
xen/arch/x86/include/asm/apic.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/xen/arch/x86/include/asm/apic.h b/xen/arch/x86/include/asm/apic.h
index 1133954e5540..22d949d7bf31 100644
--- a/xen/arch/x86/include/asm/apic.h
+++ b/xen/arch/x86/include/asm/apic.h
@@ -126,10 +126,9 @@ static inline void apic_icr_write(u32 low, u32 dest)
}
}
-static inline bool apic_isr_read(uint8_t vector)
+static inline bool apic_isr_read(unsigned int vector)
{
- return (apic_read(APIC_ISR + ((vector & ~0x1f) >> 1)) >>
- (vector & 0x1f)) & 1;
+ return apic_read(APIC_ISR + (vector / 32 * 0x10)) & (1U << (vector % 32));
}
static inline bool apic_tmr_read(unsigned int vector)
--
2.39.2