Broken out of the subsequent patch for clarity.

Add stub x86_adj_dr{6,7}_rsvd() functions which will be extended in the
following patch to fix bugs, and adjust debugreg.h to compile with a more
minimal set of includes.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Wei Liu <wl@xen.org>
CC: Jinoh Kang <jinoh.kang.kr@gmail.com>
---
 xen/arch/x86/Makefile               |  1 +
 xen/arch/x86/debug.c                | 19 +++++++++++++++++++
 xen/arch/x86/include/asm/debugreg.h | 11 +++++++++++
 3 files changed, 31 insertions(+)
 create mode 100644 xen/arch/x86/debug.c

diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index e642ad6c5578..f3abdf9cd111 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -24,6 +24,7 @@ obj-y += cpuid.o
 obj-$(CONFIG_PV) += compat.o
 obj-$(CONFIG_PV32) += x86_64/compat.o
 obj-$(CONFIG_KEXEC) += crash.o
+obj-y += debug.o
 obj-y += delay.o
 obj-y += desc.o
 obj-bin-y += dmi_scan.init.o
diff --git a/xen/arch/x86/debug.c b/xen/arch/x86/debug.c
new file mode 100644
index 000000000000..9900b555d6d3
--- /dev/null
+++ b/xen/arch/x86/debug.c
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 XenServer.
+ */
+#include <xen/kernel.h>
+
+#include <xen/lib/x86/cpu-policy.h>
+
+#include <asm/debugreg.h>
+
+unsigned int x86_adj_dr6_rsvd(const struct cpu_policy *p, unsigned int dr6)
+{
+    return dr6;
+}
+
+unsigned int x86_adj_dr7_rsvd(const struct cpu_policy *p, unsigned int dr7)
+{
+    return dr7;
+}
diff --git a/xen/arch/x86/include/asm/debugreg.h b/xen/arch/x86/include/asm/debugreg.h
index 86aa6d714347..673b81ec5eda 100644
--- a/xen/arch/x86/include/asm/debugreg.h
+++ b/xen/arch/x86/include/asm/debugreg.h
@@ -77,7 +77,18 @@
     asm volatile ( "mov %%db" #reg ",%0" : "=r" (__val) );  \
     __val;                                                  \
 })
+
+struct vcpu;
 long set_debugreg(struct vcpu *, unsigned int reg, unsigned long value);
 void activate_debugregs(const struct vcpu *);
 
+struct cpu_policy;
+
+/*
+ * Architecturally dr6/7 are full GPR-width, but only the bottom 32 bits may
+ * legally be non-zero.  We avoid avoid storing the upper bits when possible.
+ */
+unsigned int x86_adj_dr6_rsvd(const struct cpu_policy *p, unsigned int dr6);
+unsigned int x86_adj_dr7_rsvd(const struct cpu_policy *p, unsigned int dr7);
+
 #endif /* _X86_DEBUGREG_H */
-- 
2.30.2

On 29.08.2023 15:43, Andrew Cooper wrote:
> Broken out of the subsequent patch for clarity.
> 
> Add stub x86_adj_dr{6,7}_rsvd() functions which will be extended in the
> following patch to fix bugs, and adjust debugreg.h to compile with a more
> minimal set of includes.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Acked-by: Jan Beulich <jbeulich@suse.com>
preferably with (nit) ...

> --- a/xen/arch/x86/include/asm/debugreg.h
> +++ b/xen/arch/x86/include/asm/debugreg.h
> @@ -77,7 +77,18 @@
>      asm volatile ( "mov %%db" #reg ",%0" : "=r" (__val) );  \
>      __val;                                                  \
>  })
> +
> +struct vcpu;
>  long set_debugreg(struct vcpu *, unsigned int reg, unsigned long value);
>  void activate_debugregs(const struct vcpu *);
>  
> +struct cpu_policy;
> +
> +/*
> + * Architecturally dr6/7 are full GPR-width, but only the bottom 32 bits may
> + * legally be non-zero.  We avoid avoid storing the upper bits when possible.

... one "avoid" dropped here.

Jan

On 29/08/2023 3:10 pm, Jan Beulich wrote:
> On 29.08.2023 15:43, Andrew Cooper wrote:
>> Broken out of the subsequent patch for clarity.
>>
>> Add stub x86_adj_dr{6,7}_rsvd() functions which will be extended in the
>> following patch to fix bugs, and adjust debugreg.h to compile with a more
>> minimal set of includes.
>>
>> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> Acked-by: Jan Beulich <jbeulich@suse.com>
> preferably with (nit) ...
>
>> --- a/xen/arch/x86/include/asm/debugreg.h
>> +++ b/xen/arch/x86/include/asm/debugreg.h
>> @@ -77,7 +77,18 @@
>>      asm volatile ( "mov %%db" #reg ",%0" : "=r" (__val) );  \
>>      __val;                                                  \
>>  })
>> +
>> +struct vcpu;
>>  long set_debugreg(struct vcpu *, unsigned int reg, unsigned long value);
>>  void activate_debugregs(const struct vcpu *);
>>  
>> +struct cpu_policy;
>> +
>> +/*
>> + * Architecturally dr6/7 are full GPR-width, but only the bottom 32 bits may
>> + * legally be non-zero.  We avoid avoid storing the upper bits when possible.
> ... one "avoid" dropped here.

Oops.  Will fix.

Thanks.

~Andrew