Hi,
Title: For me "restrict" means that the code macro cannot be used if
!ARM_64. But this is not the case here.
On 20/01/2023 00:19, Stefano Stabellini wrote:
> On Tue, 17 Jan 2023, Ayan Kumar Halder wrote:
>> zeroeth_table_offset is not accessed by ARM_32.
I don't quite understand this sentence. The helper is used by 32-bit
arm. The output may not be used thought.
I would suggest to say that there no zeroeth level on Arm 32-bit. But...
>> Also, when 32 bit physical addresses are used (ie ARM_PA_32=y), this
>> causes an overflow.
... this is the most important part.
>>
>> Signed-off-by: Ayan Kumar Halder <ayan.kumar.halder@amd.com>
>> ---
>> Changes from -
>>
>> v1 - Removed the duplicate declaration for DECLARE_OFFSETS.
>>
>> xen/arch/arm/include/asm/lpae.h | 4 ++++
>> xen/arch/arm/mm.c | 7 +------
>> 2 files changed, 5 insertions(+), 6 deletions(-)
>>
>> diff --git a/xen/arch/arm/include/asm/lpae.h b/xen/arch/arm/include/asm/lpae.h
>> index 3fdd5d0de2..2744e0eebf 100644
>> --- a/xen/arch/arm/include/asm/lpae.h
>> +++ b/xen/arch/arm/include/asm/lpae.h
>> @@ -259,7 +259,11 @@ lpae_t mfn_to_xen_entry(mfn_t mfn, unsigned int attr);
>> #define first_table_offset(va) TABLE_OFFSET(first_linear_offset(va))
>> #define second_table_offset(va) TABLE_OFFSET(second_linear_offset(va))
>> #define third_table_offset(va) TABLE_OFFSET(third_linear_offset(va))
>> +#ifdef CONFIG_ARM_64
>
> Julien was asking for a selectable Kconfig option that would allow us to
> have 32-bit paddr_t even on ARM_64. If we do that, assuming we are on
> aarch64, and we set VTCR_T0SZ to 0x20, hence we get 32-bit IPA, are we
> going to have a 3-level or a 4-level p2m pagetable?
It will start at level 1. So 3-level page-table.
>
> In any case I think this should be:
> #ifndef CONFIG_PADDR_32
+1
>
> And if it doesn't work today on aarch64 due to pagetable levels or other
> reasons, than I would make CONFIG_PADDR_32 not (yet) selectable on
> ARM_64 (until it is fixed).
+1
>> #define zeroeth_table_offset(va) TABLE_OFFSET(zeroeth_linear_offset(va))
>> +#else
>> +#define zeroeth_table_offset(va) 0
>
> Rather than 0 it might be better to have 32, hence zeroing the input
> address
I don't understand why you suggest 32. The macro is meant to return the
index in the 0th table. So return 0 is correct here.
>
>
>> +#endif
>>
>> /*
>> * Macros to define page-tables:
>> diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
>> index fab54618ab..95784e0c59 100644
>> --- a/xen/arch/arm/mm.c
>> +++ b/xen/arch/arm/mm.c
>> @@ -207,12 +207,7 @@ void dump_pt_walk(paddr_t ttbr, paddr_t addr,
>> {
>> static const char *level_strs[4] = { "0TH", "1ST", "2ND", "3RD" };
>> const mfn_t root_mfn = maddr_to_mfn(ttbr);
>> - const unsigned int offsets[4] = {
>> - zeroeth_table_offset(addr),
>> - first_table_offset(addr),
>> - second_table_offset(addr),
>> - third_table_offset(addr)
>> - };
>> + DECLARE_OFFSETS(offsets, addr);
This wants to be explained in the commit message.
>> lpae_t pte, *mapping;
>> unsigned int level, root_table;
>>
>> --
>> 2.17.1
>>
Cheers,
--
Julien Grall