[PATCH v5 0/3] amd/msr: implement MSR_VIRT_SPEC_CTRL for HVM guests

Roger Pau Monne posted 3 patches 1 year, 12 months ago
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CHANGELOG.md                                |   3 +
xen/arch/x86/cpu/amd.c                      | 121 +++++++++++++++++---
xen/arch/x86/cpuid.c                        |  17 +++
xen/arch/x86/hvm/hvm.c                      |   1 +
xen/arch/x86/hvm/svm/entry.S                |   8 ++
xen/arch/x86/hvm/svm/svm.c                  |  39 +++++++
xen/arch/x86/include/asm/amd.h              |   4 +
xen/arch/x86/include/asm/cpufeatures.h      |   1 +
xen/arch/x86/include/asm/msr.h              |  14 +++
xen/arch/x86/msr.c                          |  26 +++++
xen/arch/x86/spec_ctrl.c                    |  12 +-
xen/include/public/arch-x86/cpufeatureset.h |   2 +-
12 files changed, 229 insertions(+), 19 deletions(-)
[PATCH v5 0/3] amd/msr: implement MSR_VIRT_SPEC_CTRL for HVM guests
Posted by Roger Pau Monne 1 year, 12 months ago
Hello,

The following series implements support for MSR_VIRT_SPEC_CTRL
(VIRT_SSBD) on different AMD CPU families.

Note that the support is added backwards, starting with the newer CPUs
that support MSR_SPEC_CTRL and moving to the older ones either using
MSR_VIRT_SPEC_CTRL or the SSBD bit in LS_CFG.

Xen is still free to use it's own SSBD setting, as the selection is
context switched on vm{entry,exit}.

On Zen2 and later, SPEC_CTRL.SSBD should exist and should be used in
preference to VIRT_SPEC_CTRL.SSBD.  However, for migration
compatibility, Xen offers VIRT_SSBD to guests (in the max cpuid policy,
not default) implemented in terms of SPEC_CTRL.SSBD.

On Fam15h thru Zen1, Xen exposes VIRT_SSBD to guests by default to
abstract away the model and/or hypervisor specific differences in
MSR_LS_CFG/MSR_VIRT_SPEC_CTRL.

So the implementation of VIRT_SSBD exposed to HVM guests will use one of
the following underlying mechanisms, in the preference order listed
below:

 * SPEC_CTRL.SSBD: patch 1
 * VIRT_SPEC_CTRL.SSBD: patch 2.
 * Non-architectural way using LS_CFG: patch 3.

NB: patch 3 introduces some logic in GIF=0 context, such logic has been
kept to a minimum due to the special context it's running on.

Roger Pau Monne (3):
  amd/msr: implement VIRT_SPEC_CTRL for HVM guests on top of SPEC_CTRL
  amd/msr: allow passthrough of VIRT_SPEC_CTRL for HVM guests
  amd/msr: implement VIRT_SPEC_CTRL for HVM guests using legacy SSBD

 CHANGELOG.md                                |   3 +
 xen/arch/x86/cpu/amd.c                      | 121 +++++++++++++++++---
 xen/arch/x86/cpuid.c                        |  17 +++
 xen/arch/x86/hvm/hvm.c                      |   1 +
 xen/arch/x86/hvm/svm/entry.S                |   8 ++
 xen/arch/x86/hvm/svm/svm.c                  |  39 +++++++
 xen/arch/x86/include/asm/amd.h              |   4 +
 xen/arch/x86/include/asm/cpufeatures.h      |   1 +
 xen/arch/x86/include/asm/msr.h              |  14 +++
 xen/arch/x86/msr.c                          |  26 +++++
 xen/arch/x86/spec_ctrl.c                    |  12 +-
 xen/include/public/arch-x86/cpufeatureset.h |   2 +-
 12 files changed, 229 insertions(+), 19 deletions(-)

-- 
2.35.1