From: Julien Grall <jgrall@amazon.com>
As part of XSA-385, SUPPORT.MD gained a statement regarding the amount
of physical memory supported.
However, booting Xen on a Arm platform with that amount of memory would
result to a breakage because the frametable area is too small.
The wiki [1] (as of April 2022) claims we were able to support up to
5 TiB on Arm64 and 16 GiB. However, this is not the case because
the struct page_info has always been bigger than expected (56 bytes
for 64-bit and 32-bytes for 32-bit).
I don't have any HW with such amount of memory. So rather than
modifying the code, take the opportunity to use the limit that should
work on Arm (2 TiB for 64-bit and 12 GiB for 32-bit).
Signed-off-by: Julien Grall <jgrall@amazon.com>
---
SUPPORT.md | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/SUPPORT.md b/SUPPORT.md
index 088dda9561c1..1e3c69a07615 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -50,9 +50,10 @@ For the Cortex A57 r0p0 - r1p1, see Errata 832075.
### Physical Memory
- Status: Supported up to 8 TiB
-
-Hosts with more memory are supported, but not security supported.
+ Status, x86: Supported up to 8 TiB. Hosts with more memory are
+ supported but not security support.
+ Status, Arm32: Supported up to 12 GiB
+ Status, Arm64: Supported up to 2 TiB
### Physical Memory Hotplug
--
2.32.0
Hi Julien, > On 27 Apr 2022, at 14:22, Julien Grall <julien@xen.org> wrote: > > From: Julien Grall <jgrall@amazon.com> > > As part of XSA-385, SUPPORT.MD gained a statement regarding the amount > of physical memory supported. > > However, booting Xen on a Arm platform with that amount of memory would > result to a breakage because the frametable area is too small. > > The wiki [1] (as of April 2022) claims we were able to support up to > 5 TiB on Arm64 and 16 GiB. However, this is not the case because > the struct page_info has always been bigger than expected (56 bytes > for 64-bit and 32-bytes for 32-bit). > > I don't have any HW with such amount of memory. So rather than > modifying the code, take the opportunity to use the limit that should > work on Arm (2 TiB for 64-bit and 12 GiB for 32-bit). Sadly I have no hardware either even remotely near this capacity and I think those limits are right for now so... > > Signed-off-by: Julien Grall <jgrall@amazon.com> Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com> #arm part Cheers Bertrand > --- > SUPPORT.md | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/SUPPORT.md b/SUPPORT.md > index 088dda9561c1..1e3c69a07615 100644 > --- a/SUPPORT.md > +++ b/SUPPORT.md > @@ -50,9 +50,10 @@ For the Cortex A57 r0p0 - r1p1, see Errata 832075. > > ### Physical Memory > > - Status: Supported up to 8 TiB > - > -Hosts with more memory are supported, but not security supported. > + Status, x86: Supported up to 8 TiB. Hosts with more memory are > + supported but not security support. > + Status, Arm32: Supported up to 12 GiB > + Status, Arm64: Supported up to 2 TiB > > ### Physical Memory Hotplug > > -- > 2.32.0 >
On 27/04/2022 14:51, Bertrand Marquis wrote: > Hi Julien, Hi Bertrand, >> On 27 Apr 2022, at 14:22, Julien Grall <julien@xen.org> wrote: >> >> From: Julien Grall <jgrall@amazon.com> >> >> As part of XSA-385, SUPPORT.MD gained a statement regarding the amount >> of physical memory supported. >> >> However, booting Xen on a Arm platform with that amount of memory would >> result to a breakage because the frametable area is too small. >> >> The wiki [1] (as of April 2022) claims we were able to support up to >> 5 TiB on Arm64 and 16 GiB. However, this is not the case because >> the struct page_info has always been bigger than expected (56 bytes >> for 64-bit and 32-bytes for 32-bit). >> >> I don't have any HW with such amount of memory. So rather than >> modifying the code, take the opportunity to use the limit that should >> work on Arm (2 TiB for 64-bit and 12 GiB for 32-bit). > > Sadly I have no hardware either even remotely near this capacity and > I think those limits are right for now so... > >> >> Signed-off-by: Julien Grall <jgrall@amazon.com> > Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com> #arm part Thanks! The changes requested by Jan are easy to fix. So instead of resubmitting, I have done the modifications and committed the patch directly. Cheers, -- Julien Grall
On 27.04.2022 15:22, Julien Grall wrote: > --- a/SUPPORT.md > +++ b/SUPPORT.md > @@ -50,9 +50,10 @@ For the Cortex A57 r0p0 - r1p1, see Errata 832075. > > ### Physical Memory > > - Status: Supported up to 8 TiB > - > -Hosts with more memory are supported, but not security supported. > + Status, x86: Supported up to 8 TiB. Hosts with more memory are > + supported but not security support. Nit: "supported" also in the 2nd instance, as it was before. I think retaining the comma would also be beneficial. > + Status, Arm32: Supported up to 12 GiB > + Status, Arm64: Supported up to 2 TiB This really will need to be ack-ed by an Arm person, so I don't see value in me providing an ack. Jan
Hi Jan, On 27/04/2022 14:34, Jan Beulich wrote: > On 27.04.2022 15:22, Julien Grall wrote: >> --- a/SUPPORT.md >> +++ b/SUPPORT.md >> @@ -50,9 +50,10 @@ For the Cortex A57 r0p0 - r1p1, see Errata 832075. >> >> ### Physical Memory >> >> - Status: Supported up to 8 TiB >> - >> -Hosts with more memory are supported, but not security supported. >> + Status, x86: Supported up to 8 TiB. Hosts with more memory are >> + supported but not security support. > > Nit: "supported" also in the 2nd instance, as it was before. I think > retaining the comma would also be beneficial. Agree for both. Sorry, I rewrote the sentence rather than copying/pasting. > >> + Status, Arm32: Supported up to 12 GiB >> + Status, Arm64: Supported up to 2 TiB > > This really will need to be ack-ed by an Arm person, so I don't see > value in me providing an ack. Bertrand and Stefanos should be CCed. I will wait input from them before resending a new version. Cheers, -- Julien Grall
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