From: Julien Grall <jgrall@amazon.com>
Since commit 54c4ae18d158 ("xen/arm32: head: Rework and document
launch()"), the boot code is not using the register r12.
So update the documentation to show r12 has no specific purpose.
Signed-off-by: Julien Grall <jgrall@amazon.com>
---
xen/arch/arm/arm32/head.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
index 13cfc837d39c..78274a1c034f 100644
--- a/xen/arch/arm/arm32/head.S
+++ b/xen/arch/arm/arm32/head.S
@@ -79,7 +79,7 @@
* r9 - paddr(start)
* r10 - phys offset
* r11 - UART address
- * r12 - is_secondary_cpu
+ * r12 -
* r13 - SP
* r14 - LR
* r15 - PC
--
2.32.0
Hi Julien, On 28.02.2022 11:11, Julien Grall wrote: > From: Julien Grall <jgrall@amazon.com> > > Since commit 54c4ae18d158 ("xen/arm32: head: Rework and document > launch()"), the boot code is not using the register r12. > > So update the documentation to show r12 has no specific purpose. > > Signed-off-by: Julien Grall <jgrall@amazon.com> > --- > xen/arch/arm/arm32/head.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S > index 13cfc837d39c..78274a1c034f 100644 > --- a/xen/arch/arm/arm32/head.S > +++ b/xen/arch/arm/arm32/head.S > @@ -79,7 +79,7 @@ > * r9 - paddr(start) > * r10 - phys offset > * r11 - UART address > - * r12 - is_secondary_cpu > + * r12 - > * r13 - SP > * r14 - LR > * r15 - PC > FWICS, there are still 2 instructions in this file assigning #0 or #1 to r12 and each of them has a comment "/* r12 := is_secondary_cpu */". So I have 2 questions: 1. Do we even need these instructions? (I do not think so) 2. If we need these instructions, do we need these comments? Cheers, Michal
On 28/02/2022 13:04, Michal Orzel wrote: > Hi Julien, Hi Michal, Thank you for the review. > > On 28.02.2022 11:11, Julien Grall wrote: >> From: Julien Grall <jgrall@amazon.com> >> >> Since commit 54c4ae18d158 ("xen/arm32: head: Rework and document >> launch()"), the boot code is not using the register r12. >> >> So update the documentation to show r12 has no specific purpose. >> >> Signed-off-by: Julien Grall <jgrall@amazon.com> >> --- >> xen/arch/arm/arm32/head.S | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S >> index 13cfc837d39c..78274a1c034f 100644 >> --- a/xen/arch/arm/arm32/head.S >> +++ b/xen/arch/arm/arm32/head.S >> @@ -79,7 +79,7 @@ >> * r9 - paddr(start) >> * r10 - phys offset >> * r11 - UART address >> - * r12 - is_secondary_cpu >> + * r12 - >> * r13 - SP >> * r14 - LR >> * r15 - PC >> > > FWICS, there are still 2 instructions in this file assigning #0 or #1 to r12 and each of them > has a comment "/* r12 := is_secondary_cpu */". > > So I have 2 questions: > 1. Do we even need these instructions? (I do not think so) We don't need them. I will drop them and respin the patch. Cheers, -- Julien Grall
© 2016 - 2024 Red Hat, Inc.