Commit aa2f5aefa8de ("xen/arm: Rework psr_mode_is_32bit()") modified
the function to take a struct cpu_user_regs instead of psr.
Perform renaming of psr_mode_is_32bit to regs_mode_is_32bit to reflect
that change.
Signed-off-by: Michal Orzel <michal.orzel@arm.com>
---
This change was requested following up a discussion:
https://marc.info/?l=xen-devel&m=156457538423787&w=2
Changes since v1:
-modify commit message
---
xen/arch/arm/include/asm/regs.h | 2 +-
xen/arch/arm/traps.c | 30 +++++++++++++++---------------
2 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/xen/arch/arm/include/asm/regs.h b/xen/arch/arm/include/asm/regs.h
index ec091a28a2..04e821138a 100644
--- a/xen/arch/arm/include/asm/regs.h
+++ b/xen/arch/arm/include/asm/regs.h
@@ -13,7 +13,7 @@
#define psr_mode(psr,m) (((psr) & PSR_MODE_MASK) == m)
-static inline bool psr_mode_is_32bit(const struct cpu_user_regs *regs)
+static inline bool regs_mode_is_32bit(const struct cpu_user_regs *regs)
{
#ifdef CONFIG_ARM_32
return true;
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 9339d12f58..0db8e42d65 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -896,7 +896,7 @@ static void _show_registers(const struct cpu_user_regs *regs,
if ( guest_mode )
{
- if ( psr_mode_is_32bit(regs) )
+ if ( regs_mode_is_32bit(regs) )
show_registers_32(regs, ctxt, guest_mode, v);
#ifdef CONFIG_ARM_64
else
@@ -1631,7 +1631,7 @@ int check_conditional_instr(struct cpu_user_regs *regs, const union hsr hsr)
{
unsigned long it;
- BUG_ON( !psr_mode_is_32bit(regs) || !(cpsr & PSR_THUMB) );
+ BUG_ON( !regs_mode_is_32bit(regs) || !(cpsr & PSR_THUMB) );
it = ( (cpsr >> (10-2)) & 0xfc) | ((cpsr >> 25) & 0x3 );
@@ -1656,7 +1656,7 @@ int check_conditional_instr(struct cpu_user_regs *regs, const union hsr hsr)
void advance_pc(struct cpu_user_regs *regs, const union hsr hsr)
{
register_t itbits, cond, cpsr = regs->cpsr;
- bool is_thumb = psr_mode_is_32bit(regs) && (cpsr & PSR_THUMB);
+ bool is_thumb = regs_mode_is_32bit(regs) && (cpsr & PSR_THUMB);
if ( is_thumb && (cpsr & PSR_IT_MASK) )
{
@@ -2098,37 +2098,37 @@ void do_trap_guest_sync(struct cpu_user_regs *regs)
advance_pc(regs, hsr);
break;
case HSR_EC_CP15_32:
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_cp15_32);
do_cp15_32(regs, hsr);
break;
case HSR_EC_CP15_64:
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_cp15_64);
do_cp15_64(regs, hsr);
break;
case HSR_EC_CP14_32:
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_cp14_32);
do_cp14_32(regs, hsr);
break;
case HSR_EC_CP14_64:
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_cp14_64);
do_cp14_64(regs, hsr);
break;
case HSR_EC_CP14_DBG:
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_cp14_dbg);
do_cp14_dbg(regs, hsr);
break;
case HSR_EC_CP10:
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_cp10);
do_cp10(regs, hsr);
break;
case HSR_EC_CP:
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_cp);
do_cp(regs, hsr);
break;
@@ -2139,7 +2139,7 @@ void do_trap_guest_sync(struct cpu_user_regs *regs)
* ARMv7 (DDI 0406C.b): B1.14.8
* ARMv8 (DDI 0487A.d): D1-1501 Table D1-44
*/
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_smc32);
do_trap_smc(regs, hsr);
break;
@@ -2147,7 +2147,7 @@ void do_trap_guest_sync(struct cpu_user_regs *regs)
{
register_t nr;
- GUEST_BUG_ON(!psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(!regs_mode_is_32bit(regs));
perfc_incr(trap_hvc32);
#ifndef NDEBUG
if ( (hsr.iss & 0xff00) == 0xff00 )
@@ -2162,7 +2162,7 @@ void do_trap_guest_sync(struct cpu_user_regs *regs)
}
#ifdef CONFIG_ARM_64
case HSR_EC_HVC64:
- GUEST_BUG_ON(psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(regs_mode_is_32bit(regs));
perfc_incr(trap_hvc64);
#ifndef NDEBUG
if ( (hsr.iss & 0xff00) == 0xff00 )
@@ -2178,12 +2178,12 @@ void do_trap_guest_sync(struct cpu_user_regs *regs)
*
* ARMv8 (DDI 0487A.d): D1-1501 Table D1-44
*/
- GUEST_BUG_ON(psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(regs_mode_is_32bit(regs));
perfc_incr(trap_smc64);
do_trap_smc(regs, hsr);
break;
case HSR_EC_SYSREG:
- GUEST_BUG_ON(psr_mode_is_32bit(regs));
+ GUEST_BUG_ON(regs_mode_is_32bit(regs));
perfc_incr(trap_sysreg);
do_sysreg(regs, hsr);
break;
--
2.29.0
Hi Michal, On 22/02/2022 10:56, Michal Orzel wrote: > Commit aa2f5aefa8de ("xen/arm: Rework psr_mode_is_32bit()") modified > the function to take a struct cpu_user_regs instead of psr. > Perform renaming of psr_mode_is_32bit to regs_mode_is_32bit to reflect > that change. > > Signed-off-by: Michal Orzel <michal.orzel@arm.com> Acked-by: Julien Grall <jgrall@amazon.com> Cheers, -- Julien Grall
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