[PATCH 0/3] x86/cpuid: Disntangle, and PPIN

Andrew Cooper posted 3 patches 2 years, 3 months ago
Test gitlab-ci failed
Patches applied successfully (tree, apply log)
git fetch https://gitlab.com/xen-project/patchew/xen tags/patchew/20220127160940.19469-1-andrew.cooper3@citrix.com
tools/misc/xen-cpuid.c                      |  6 +++
xen/arch/x86/cpu/common.c                   | 57 +++++++++++++++--------------
xen/arch/x86/cpu/mcheck/mce_intel.c         | 10 ++++-
xen/include/public/arch-x86/cpufeatureset.h |  3 ++
xen/include/xen/lib/x86/cpuid.h             |  7 ++++
xen/tools/gen-cpuid.py                      |  2 +
6 files changed, 56 insertions(+), 29 deletions(-)
[PATCH 0/3] x86/cpuid: Disntangle, and PPIN
Posted by Andrew Cooper 2 years, 3 months ago
Work to disentangle new feature addition, using PPIN as an example.

Andrew Cooper (1):
  x86/cpuid: Disentangle logic for new feature leaves

Jan Beulich (2):
  x86/cpuid: Infrastructure for leaf 0x00000007:1.ebx
  x86/Intel: use CPUID bit to determine PPIN availability

 tools/misc/xen-cpuid.c                      |  6 +++
 xen/arch/x86/cpu/common.c                   | 57 +++++++++++++++--------------
 xen/arch/x86/cpu/mcheck/mce_intel.c         | 10 ++++-
 xen/include/public/arch-x86/cpufeatureset.h |  3 ++
 xen/include/xen/lib/x86/cpuid.h             |  7 ++++
 xen/tools/gen-cpuid.py                      |  2 +
 6 files changed, 56 insertions(+), 29 deletions(-)

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2.11.0