memory_region_set_size() handle the 16 Exabytes limit by
special-casing the UINT64_MAX value.
This is not a problem for the 32-bit maximum, 4 GiB, but
in some places we incorrectly use UINT32_MAX instead of
4 GiB, and end up missing 1 byte in the memory region.
This series fixes the cases I encountered.
Also included few patches while reviewing, I replaced some
magic values by the IEC binary prefix equivalent.
Regards,
Phil.
Philippe Mathieu-Daudé (8):
hw/arm/aspeed: Correct DRAM container region size
hw/pci-host/prep: Correct RAVEN bus bridge memory region size
hw/pci/pci_bridge: Correct pci_bridge_io memory region size
hw/pci/pci_bridge: Use the IEC binary prefix definitions
hw/pci-host: Use the IEC binary prefix definitions
hw/hppa/dino: Use the IEC binary prefix definitions
hw/i386/xen/xen-hvm: Use the IEC binary prefix definitions
target/i386/cpu: Use the IEC binary prefix definitions
hw/arm/aspeed.c | 2 +-
hw/hppa/dino.c | 4 ++--
hw/i386/xen/xen-hvm.c | 3 ++-
hw/pci-host/i440fx.c | 3 ++-
hw/pci-host/prep.c | 2 +-
hw/pci-host/q35.c | 2 +-
hw/pci-host/versatile.c | 5 +++--
hw/pci/pci_bridge.c | 7 ++++---
target/i386/cpu.c | 2 +-
9 files changed, 17 insertions(+), 13 deletions(-)
--
2.21.3